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| Number | Title | Issue Date |
| 7432137 | Method of manufacturing thin film transistor A method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film; forming a bank including a first bank portion and a se... | 10/07/2008 |
| 7425479 | Method of manufacturing a thin film transistor array panel The present invention provides a thin film transistor array panel comprising: an insulating substrate; a first signal line formed on the insulating substrate and extending in a first direction; a second signal line formed on the insulating substrate, extending in a ... | 09/16/2008 |
| 7413966 | Method of fabricating polysilicon thin film transistor with catalyst A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface o... | 08/19/2008 |
| 7410818 | Thin film transistor, liquid crystal display using thin film transistor, and method of manufacturing thin film transistor A semiconductor film, which is located over a gate electrode for forming a channel region between a source electrode and a drain electrode, has a width greater than a width of the source electrode and a width of the drain electrode located over the gate electrode. I... | 08/12/2008 |
| 7410817 | Liquid crystal display device including driving circuit and method of fabricating the same A method of fabricating an array substrate structure for a liquid crystal display device includes defining a display area and a non-display area on a substrate, the display area having a pixel TFT portion and a pixel electrode area, and the non-display area having a... | 08/12/2008 |
| 7387920 | Method of manufacturing thin film transistor array panel A method of manufacturing a thin film transistor array panel is provided, which includes forming a semiconductor layer of poly silicon, forming a gate insulating layer on the semiconductor layer, forming a conductive layer including a first metal layer and a second ... | 06/17/2008 |
| 7382021 | Insulated gate field-effect transistor having III-VI source/drain layer(s) A transistor includes one or more channel taps containing a stack consisting at least in part of a semiconductor an interfacial III-VI layered compound and a conductor. The III-VI compound consists primarily of atoms from Groups IIIA-B and from Group VIA of the Peri... | 06/03/2008 |
| 7371637 | Oxide-nitride stack gate dielectric A method of making a semiconductor structure comprises forming an oxide layer on a substrate; forming a silicon nitride layer on the oxide layer; annealing the layers in NO; and annealing the layers in ammonia. The equivalent oxide thickness of the oxide layer and t... | 05/13/2008 |
| 7361555 | Trench-gate transistors and their manufacture A trench-gate transistor has an integral first layer of silicon dioxide extending from the upper surface of the semiconductor body over top corners of each cell array trench. The integral first layer also provides a thin gate dielectric insulating layer for a thick ... | 04/22/2008 |
| 7358122 | High performance FET devices and methods thereof Structure and methods of fabrication are disclosed for an enhanced FET devices in which dopant impurities are prevented from diffusing through the gate insulator. The structure comprises a Si:C, or SiGe:C, layer which is sandwiched between the gate insulator and a l... | 04/15/2008 |
| 7344926 | Liquid crystal display device and method of manufacturing the same A liquid crystal display device including first and second active layers over a substrate, a storage line over the second active layer, a first insulating layer over the storage line, a gate electrode on the first insulating layer and corresponding to the first acti... | 03/18/2008 |
| 7332385 | Method of manufacturing a semiconductor device that includes gettering regions A catalytic element is added to an amorphous semiconductor film and heat treatment is conducted therefor to produce a crystalline semiconductor film with good quality, a TFT (semiconductor device) with a satisfactory characteristic is realized using the crystalline ... | 02/19/2008 |
| 7323372 | Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors Shorting bars are provided for electrostatic discharge protection as a portion of trace deposition in a photodiode array. During normal processing for etching of the metal layers, the shorting bars are removed without additional processing requirements. Additional s... | 01/29/2008 |
| 7314801 | Semiconductor device having a surface conducting channel and method of forming A semiconductor device including a metal oxide layer, a channel area of the metal oxide layer, a preservation layer formed on the channel area of the metal oxide layer, and at least two channel contacts coupled to the channel area of the metal oxide layer, and a met... | 01/01/2008 |
| 7306979 | Method of fabricating thin film transistor substrate for display device A method of fabricating a thin film transistor substrate for a display device is provided. The method includes the steps of forming a gate line and a gate electrode connected to the gate line; forming a gate insulating film disposed covering the gate line and the ga... | 12/11/2007 |
| 7291516 | Low temperature melt-processing of organic-inorganic hybrid The present invention provides a process for preparing a melt-processed organic-inorganic hybrid material including the steps of maintaining a solid organic-inorganic hybrid material at a temperature above the melting point but below the decomposition temperature of... | 11/06/2007 |
| 7279372 | Manufacturing method of semiconductor device Island-like semiconductor films and markers are formed prior to laser irradiation. Markers are used as positional references so as not to perform laser irradiation all over the semiconductor within a substrate surface, but to perform a minimum crystallization on at ... | 10/09/2007 |
| 7279371 | Thin film transistor array panel and manufacturing method thereof A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a first insulating layer and a semiconductor layer in sequence on the gate line; depositing a conductive layer on the semiconduct... | 10/09/2007 |
| 7268025 | Pixel structure and fabricating method thereof A pixel structure and a fabricating method thereof are described. The method comprises forming a conductive layer, a data line and a source/drain at the same time. The conductive layer has a coupling portion and a connecting portion. The coupling portion is used as ... | 09/11/2007 |
| 7262087 | Dual stressed SOI substrates The present invention provides a strained-Si structure, in which the nFET regions of the structure are strained in tension and the pFET regions of the structure are strained in compression. Broadly the strained-Si structure comprises a substrate; a first layered sta... | 08/28/2007 |
| 7256455 | Double gate semiconductor device having a metal gate A semiconductor device may include a substrate, an insulating layer formed on the substrate and a conductive fin formed on the insulating layer. The conductive fin may include a number of side surfaces and a top surface. The semiconductor device may also include a s... | 08/14/2007 |
| 7253038 | Semiconductor device and method for manufacturing the same It is a problem to realize, by a reduced number of processes than that of the conventional, a reliable active-matrix liquid crystal display device having a high opening ratio for high-definition display. The present invention is characterized by: forming a gate elec... | 08/07/2007 |
| 7235437 | Multi-planar layout vertical thin-film transistor inverter A vertical thin-film transistor (V-TFT) inverter circuit and a method for forming a multi-planar layout TFT inverter circuit have been provided. The method comprising: forming a P-channel TFT with a gate, a first source/drain (S/D) region in a first horizontal plane... | 06/26/2007 |
| 7226817 | Method of manufacturing A method of efficiently forming a circuit using a thin film transistor with a semiconductor layer in which preferable crystallinity is obtained is provided. A location on which stress concentrates according to crystallization of a semiconductor layer formed on a sub... | 06/05/2007 |
| 7208352 | Method of fabricating a thin film transistor with multiple gates using metal induced lateral crystallization A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zi... | 04/24/2007 |
| 7205182 | Method of manufacturing semiconductor device The present invention is characterized in that gettering is performed such that impurity regions to which a noble gas element is added are formed in a semiconductor film and the metallic element included in the semiconductor film is segregated into the impurity regi... | 04/17/2007 |
| 7192813 | Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. An amorphous semiconductor thin film is irradiated with ultraviolet light or infrared light, to obtain a crystalline semiconduct... | 03/20/2007 |
| 7179693 | Method for manufacturing thin film device that includes a chemical etchant process The present invention relates to a method for manufacturing a thin film device. The thin film device is manufactured by bonding a second substrate (106) to a thin film device layer (103) provided on a protective layer (102) formed on a first sub... | 02/20/2007 |
| 7176067 | Methods of fabricating fin field effect transistors A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a portion of the epitaxial layer to form a vertical fin on the active reg... | 02/13/2007 |
| 7163848 | Semiconductor device and manufacturing method thereof OFF current of a TFT is reduced. There is provided a semiconductor device includung: a substrate; a shielding film formed so as to be in contact with the substrate; a planarization insulating film formed on the substrate so as to cover the shielding film; and a semi... | 01/16/2007 |
| 7161212 | Thin film transistor, liquid crystal display using thin film transistor, and method of manufacturing thin film transistor A semiconductor film, which is located over a gate electrode for forming a channel region between a source electrode and a drain electrode, has a width greater than a width of the source electrode and a width of the drain electrode located over the gate electrode. I... | 01/09/2007 |
| 7141456 | Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers Methods for fabricating Fin-Field Effect Transistors (Fin-FETs) are provided. A fin is formed on an integrated circuit substrate. The fin defines a trench on the integrated circuit substrate. A first insulation layer is formed in the trench such that a surface of th... | 11/28/2006 |
| 6690043 | Semiconductor device and method of manufacturing the same A semiconductor device comprises a base substrate, an insulating film formed on the substrate, an undoped first and lattice-relaxed semiconductor layer formed on the insulating film, a second semiconductor layer having a tensile strain and formed on the f... | 02/10/2004 |
| 6667215 | Method of making transistors A method for making transistors comprises depositing source electrode and drain electrode features onto a substrate through a single aperture in a stationary shadow mask, said aperture having at least two opposing edges; wherein the shapes of the features... | 12/23/2003 |
| 6661044 | Method of manufacturing MOSEFT and structure thereof A method of manufacturing an MOSFET. A substrate is provided. A trench is formed in the substrate. A sacrificial layer is formed to fill the trench. A doped semiconductive layer is formed over the substrate. The doped semiconductive layer is patterned to ... | 12/09/2003 |
| 6656775 | Semiconductor substrate, semiconductor device, and manufacturing method thereof A semiconductor substrate that suppresses not only auto doping but also warpage can be provided by disposing an oxide film (4) at a position in a semiconductor substrate (1), so as to be apart from a main surface (1a) and a reverse surface (1b). The oxide... | 12/02/2003 |
| 6642591 | Field-effect transistor A field-effect transistor includes a silicon substrate on which is formed a channel region, a source region and a drain region. A gate insulation layer of a transition metal oxide having a perovskite structure is formed over at least the channel region, a... | 11/04/2003 |
| 6638797 | High performance poly-SiGe thin film transistor and a method of fabricating such a thin film transistor The present invention pertains to a high-performance thin film transistor having a gate and an active region, whose active region comprises a poly-Si1-x Gex alloy material and a channel layer of silicon, in which the channel layer of... | 10/28/2003 |
| 6635909 | Strained fin FETs structure and method A method and structure for a transistor that includes an insulator and a silicon structure on the insulator. The silicon structure includes a central portion and Fins extending from ends of the central portion. A first gate is positioned on a first side o... | 10/21/2003 |
| 6633066 | CMOS integrated circuit devices and substrates having unstrained silicon active layers CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si | 10/14/2003 |
