Class 257/E21.362 - Gat ed-diode structure, e.g., SITh, FCTh, FCD (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.352. This subclass
No. of patents: 25
Last issue date: 04/01/2008

Number	Title	Issue Date
7351599	High-powered light emitting device with improved thermal properties A light emitting device includes a first semiconductor layer of a first conductivity type, an active region, and a second semiconductor layer of a second conductivity type. First and second contacts are connected to the first and second semiconductor layers. In some...	04/01/2008
7344910	Self-aligned photodiode for CMOS image sensor and method of making A method for forming a photodiode that is self-aligned to a transfer gate while being compatible with a metal silicide process is disclosed. The method comprises forming a gate stack of gate oxide, polysilicon, and a sacrificial/disposable cap insulator over the pol...	03/18/2008
7141484	Electrostatic discharge protection circuit of non-gated diode and fabrication method thereof A non-gated diode structure of a silicon-on-insulator, having a silicon-on-insulator substrate, a pair of isolating structures, a first type doped region and a second type doped region. The silicon-on-insulation substrate has a stack of a substrate, an insulation la...	11/28/2006
6624030	Method of fabricating power rectifier device having a laterally graded P-N junction for a channel region A vertical semiconductor rectifier device includes a semiconductor substrate of first conductivity type and having a plurality of gates insulatively formed on a first major surface and a plurality of source/drain regions of the first conductivity type for...	09/23/2003
6537921	Vertical metal oxide silicon field effect semiconductor diodes The present invention includes methods and apparatus as described in the claims. Briefly, semiconductor diodes having a low forward conduction voltage drop, a low reverse leakage current, a high voltage capability and avalanche energy capability, suitable...	03/25/2003
6501146	Semiconductor device and method of manufacturing thereof A plurality of p anode regions are formed at one surface of an n- substrate. A trench is formed in each p anode region. An ohmic junction region is formed between an anode metallic electrode and the p anode region. The p anode region has a mini...	12/31/2002
6420225	Method of fabricating power rectifier device A vertical semiconductor rectifier device includes a semiconductor substrate of first conductivity type and having a plurality of gates insulatively formed on a first major surface and a plurality of source/drain regions of the first conductivity type for...	07/16/2002
6180965	Semiconductor device having a static induction in a recessed portion In a static induction semiconductor device, particular a high power static induction semiconductor device, recessed portions 12 are formed in one surface of a silicon substrate 11 of one conductivity type, gate regions 13 of the other conductivity type ar...	01/30/2001
6159776	Method for manufacturing semiconductor device A normally-off semiconductor device with gate regions formed in a high-quality base is manufactured by forming a P+ layer in a lower surface of an N- substrate, selectively forming P+ gate regions in an upper surface of...	12/12/2000
5956577	Method of manufacturing serrated gate-type or joined structure A method of manufacturing a joined-type semiconductor device having a gate structure. The semiconductor device includes a first and second semiconductor substrates each having a substrate body, and a first and a second main surfaces which are opposite to ...	09/21/1999
5946572	Method of manufacturing a semiconductor device having recessed gate structures A gate structure including semiconductor regions each having a high impurity-concentration and being formed within respective one of recessed portions provided in a surface of a first semiconductor substrate, and then a second semiconductor substrate is b...	08/31/1999
5930651	Method of forming a semiconductor device having a plurality of cavity defined gating regions A P+ layer is formed on the lower surface of an N- substrate, and recesses are defined in the upper surface of the N- substrate. Then, P+ gate regions and bottom gate regions are formed in side walls and bot...	07/27/1999
5894140	Semiconductor device having recessed gate structures and method of manufacturing the same A gate structure including semiconductor regions each having a high impurity-concentration and being formed within respective one of recessed portions provided in a surface of a first semiconductor substrate, and then a second semiconductor substrate is b...	04/13/1999
5847417	Semiconductor device and method of manufacturing same A normally-off semiconductor device with gate regions formed in a high-quality base is manufactured by forming a P+ layer in a lower surface of an N- substrate, selectively forming P+ gate regions in an upper surface of...	12/08/1998
5841155	Semiconductor device containing two joined substrates A method of manufacturing a joined-type semiconductor device having a gate structure. The semiconductor device includes a first and second semiconductor substrates each having a substrate body, and a first and a second main surfaces which are opposite to ...	11/24/1998
5739044	Method of manufacturing semiconductor device After selectively forming P+ -type gate regions 14 in the upper surface of a first N- -type semiconductor substrate 10, gate electrodes 30 are selectively formed on the P+ -type gate regions. A P+ -type layer 12...	04/14/1998
5702962	Fabrication process for a static induction transistor A semiconductor device, by which a base in which gates are buried can be formed by the junction of semiconductor substrates to each other at a lower temperature, and a fabrication process thereof are provided. Recesses are defined in the top of an N-...	12/30/1997
5648665	Semiconductor device having a plurality of cavity defined gating regions and a fabrication method therefor A P+ layer is formed on the lower surface of an N- substrate, and recesses are defined in the upper surface of the N- substrate. Then, P+ gate regions and bottom gate regions are formed in side walls and bot...	07/15/1997
5602405	Semiconductor device with base formed by the junction of two semiconductors of the same conductive type A semiconductor device, by which a base in which gates are buried can be formed by the junction of semiconductor substrates to each other at a lower temperature, and a fabrication process thereof are provided. Recesses are defined in the top of an N-...	02/11/1997
5591991	Semiconductor device and method of manufacturing the same After selectively forming P+ -type gate regions 14 in the upper surface of a first N- -type semiconductor substrate 10, gate electrodes 30 are selectively formed on the P+ -type gate regions. A P+ -type layer 12...	01/07/1997
5485017	Semiconductor device and method of manufacturing same A semiconductor device has an n+ source region, a first n- channel region, a barrier layer, a second n- channel region, a pair of n+ drain regions, an insulating film, and a pair of metal electrodes over the ...	01/16/1996
5360746	Method of fabricating a semiconductor device Between electrodes (9) and (10) are formed a p+ substrate (2), an n- epitaxial layer (1) having a protruding portion (3), an n+ diffusion region (4) and p+ diffusion regions (13). Control electrodes (6) are f...	11/01/1994
5309002	Semiconductor device with protruding portion Between electrodes (9) and (10) are formed a p+ substrate (2), an n- epitaxial layer (1) having a protruding portion (3), an n+ diffusion region (4) and p+ diffusion regions (13). Control electrodes (6) are form...	05/03/1994
4920062	Manufacturing method for vertically conductive semiconductor devices A first semiconductor layer is formed on a semiconductor anode layer containing a high concentration of impurity of a first conductivity type. This first semiconductor layer contains an impurity in a lower concentration than the impurity concentration of ...	04/24/1990
4171995	Epitaxial deposition process for producing an electrostatic induction type thyristor A process of manufacturing a static induction thyristor comprising providing a semiconductor substrate of the first conductivity type which defines a first semiconductor layer and forming a second semiconductor layer thereon of a second conductivity type....	10/23/1979

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Class 257/E21.362 - Gat ed-diode structure, e.g., SITh, FCTh, FCD (EPO)