Class 257/E21.343 - Characterized by the implantation of both electrically active and inactive species in the same semiconductor region to be doped (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.34. This subclass
No. of patents: 23
Last issue date: 01/22/2008

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Number	Title	Issue Date
7320921	Smart grading implant with diffusion retarding implant for making integrated circuit chips A method of making an integrated circuit chip is provided, which combines a smart grading implant with a diffusion retarding implant, e.g., to improve short channel effect controllability and improve dopant grading in the source/drain regions. Using a smart grading ...	01/22/2008
7301221	Controlling diffusion in doped semiconductor regions A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of impurity elements, including at least one dopant element. Selection of a plurality of impurity elements inc...	11/27/2007
7297617	Method for controlling diffusion in semiconductor regions A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of impurity elements, including at least one dopant element. Selection of a plurality of impurity elements inc...	11/20/2007
7250312	Doping method and method for fabricating thin film transistor It is an object of the present invention to provide a doping apparatus, a doping method, and a method for fabricating a thin film transistor that can carry out doping to the carrier concentration which is optimum for obtaining the desired electric characteristic non...	07/31/2007
7163878	Ultra-shallow arsenic junction formation in silicon germanium In one aspect, the present invention provides a method of forming junctions in a silicon-germanium layer (20). In this particular embodiment, the method comprises implanting a dopant (80) into the silicon-germanium layer (20) and implanting fluo...	01/16/2007
6109207	Process for fabricating semiconductor device with shallow p-type regions using dopant compounds containing elements of high solid solubility A semiconductor having at least one p-channel transistor (10) with shallow p-type doped source/drain regions (16 and 18) which contain boron implanted into the doped regions (16 and 18) in the form of a compound which consists of boron and an element (or ...	08/29/2000
5866925	Gallium nitride junction field-effect transistor An all-ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorous co-implantation, in selected III-V semicond...	02/02/1999
5863831	Process for fabricating semiconductor device with shallow p-type regions using dopant compounds containing elements of high solid solubility A semiconductor having at least one p-channel transistor (10) with shallow p-type doped source/drain regions (16 and 18) which contain boron implanted into the doped regions (16 and 18) in the form of a compound which consists of boron and an element (or ...	01/26/1999
5314833	Method of manufacturing GaAs metal semiconductor field effect transistor A method of manufacturing a GaAs field effect transistor comprises depositing a silicon thin film 202 on a semi-insulating semiconductor substrate 201, forming a first sensitive film 203 by a photolithography to define channel areas and ion-implanting n-t...	05/24/1994
5296394	Manufacturing method of GaAs metal semiconductor FET A manufacturing method of GaAs metal semiconductor FET is disclosed. The method comprises the steps of: preparing a GaAs substrate; depositing a silicon layer on the GaAs substrate; forming a first photoresist pattern on the silicon layer by means of well...	03/22/1994
5073507	Producing a plasma containing beryllium and beryllium fluoride A plasma containing both beryllium ions and beryllium fluoride ions is achieved. Beryllium crystals are used as a cathode in an ionization chamber containing boron trifluoride gas. The boron trifluoride gas and the beryllium are ionized to produce both be...	12/17/1991
5053846	Semiconductor bipolar device with phosphorus doping A method of manufacturing semiconductor devices by ion implantation, comprising the steps of, i) implanting P ions and ions selected from Si or Group II elements to the same region of GaAs or AlGaAs material, ii) performing a heat treatment to said ion im...	10/01/1991
4960718	MESFET device having a semiconductor surface barrier layer An InP MESFET having a semiconductor surface barrier layer formed of GaInP or AlInP. The semiconductor surface barrier layer is formed between an active layer and a gate electrode and the barrier height of the gate for the semiconductor surface barrier la...	10/02/1990
4956698	Group III-V compound semiconductor device having p-region formed by Be and Group V ions Implantation of a Group V ion species (e.g., phosphorus or arsenic) into an In-based Group III-V compound semiconductor (e.g., InP, InGaAs) followed by implantation of Be ions produces a shallow p-type surface layer and avoids significant in-diffusion of ...	09/11/1990
4818721	Ion implantation into In-based group III-V compound semiconductors Implantation of a Group V ion species (e.g., phosphorus or arsenic) into an In-based Group III-V compound semiconductor (e.g., InP, InGaAs) followed by implantation of Be ions produces a shallow p-type surface layer and avoids significant in-diffusion of ...	04/04/1989
4717685	Method for producing a metal semiconductor field effect transistor A method for producing a metal semiconductor field effect transistor includes the steps of forming a buffer layer of Alx Ga.sub.(1-x) As in a predetermined region of the semiconductor substrate using a mask pattern by selective Al ion implantat...	01/05/1988
4662060	Method of fabricating semiconductor device having low resistance non-alloyed contact layer A method of forming a semiconductor device having a non-alloyed contact layer. An active region is formed in a substrate and the non-alloyed contact layer is formed in the active region, the barrier height of source and drain electrodes for the non-alloye...	05/05/1987
4489480	Method of manufacturing field effect transistors of GaAs by ion implantation The invention relates to a method of manufacturing field effect transistors of gallium arsenide obtained by ion implantation of light donors, such as silicon or selenium, in a semi-insulating substrate of gallium arsenide. In order to reduce out-diffusion...	12/25/1984
4469528	Method of manufacturing a semiconductor device of GaAs by two species ion implantation The invention relates to a method of treating a substrate of gallium arsenide by a double ion implantation. A first implantation of silicon ions (Si+) is carried out on the entire surface of the substrate, and a second implantation of oxygen io...	09/04/1984
4391651	Method of forming a hyperabrupt interface in a GaAs substrate A method of fabricating improved semiconductor devices, such as FET's, wh require or are improved by a hyperabrupt interface between the active channel and the underlying insulating region. A substrate, such as GaAs, is polished and then implanted with l...	07/05/1983
4385938	Dual species ion implantation into GaAs p- and n- layers in GaAs by dual implants with either Ge and Ga or Ge and As into GaAs have been produced. The amphoteric behavior of Ge implants is modified in a predictable manner through control of ion dose and annealing temperature by dual implantatio...	05/31/1983
4383869	Method for enhancing electron mobility in GaAs The electron mobility in an active layer on a semi-insulating substrate is enhanced by initially performing a high energy implantation of an element which is inert in the semi-insulating material. Donor ions are then implanted so as to form the active lay...	05/17/1983
4045252	Method of manufacturing a semiconductor structure for microwave operation, including a very thin insulating or weakly doped layer The method relates to the production of a very thin insulating or weakly-doped layer in the immediate neighborhood of a highly-doped layer within the body of a semiconductor structure designed to operate in the microwave range. For instance a P+	08/30/1977

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Class 257/E21.343 - Characterized by the implantation of both electrically active and inactive species in the same semiconductor region to be doped (EPO)