Did You Know...
...that "patent leather" got its name because the process of applying the polished black finish to leather was once patented?
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7435658 | Method of manufacturing metal-oxide-semiconductor transistor A method of manufacturing a MOS transistor is provided. A substrate having a gate structure thereon is provided. A first spacer is formed on the sidewall of the gate structure. A pre-amorphization implantation is carried out to amorphize a portion of the substrate. ... | 10/14/2008 |
| 7371648 | Method for manufacturing a transistor device having an improved breakdown voltage and a method for manufacturing an integrated circuit using the same The present invention provides a method for manufacturing a transistor device, and a method for manufacturing an integrated circuit including the same. The method for manufacturing the transistor device, among other elements, includes forming a gate structure over a... | 05/13/2008 |
| 7364971 | Method for manufacturing semiconductor device having super junction construction A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is ... | 04/29/2008 |
| 7326622 | Method of manufacturing semiconductor MOS transistor device A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer... | 02/05/2008 |
| 7282415 | Method for making a semiconductor device with strain enhancement A semiconductor device with strain enhancement is formed by providing a semiconductor substrate and an overlying control electrode having a sidewall. An insulating layer is formed adjacent the sidewall of the control electrode. The semiconductor substrate and the co... | 10/16/2007 |
| 7253054 | One time programmable EPROM for advanced CMOS technology A one time programmable (OTP) electrically programmable read only memory (EPROM) transistor (100) having an increased breakdown voltage (BVdss) is disclosed. The increased breakdown voltage reduces the probability that the OTP EPROM (100) will breakdow... | 08/07/2007 |
| 7238577 | Method of manufacturing self-aligned n and p type stripes for a superjunction device A method is provided for obtaining extremely fine pitch N-type and P-type stripes that form the voltage blocking region of a superjunction power device. The stripes are self-aligned and do not suffer from alignment tolerances. The self-aligned, fine pitch of the alt... | 07/03/2007 |
| 7223663 | MOS transistors and methods of manufacturing the same MOS transistors having a low junction capacitance between their halo regions and their source/drain extension regions and methods for manufacturing the same are disclosed. A disclosed MOS transistor includes: a semiconductor substrate of a first conductivity type; a... | 05/29/2007 |
| 7214577 | Method of fabricating semiconductor integrated circuit device A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target ha... | 05/08/2007 |
| 7202102 | Doped absorption for enhanced responsivity for high speed photodiodes A photodiode with a semiconductor intrinsic light absorption layer has at least one p-doped light absorption layer or an n-doped light absorption layer, and preferably both. The diode also has a cathode electrode and an anode electrode electrically coupled with the ... | 04/10/2007 |
| 7192834 | LDMOS device and method of fabrication of LDMOS device A lateral double diffused metal oxide semiconductor (LDMOS) device, and method of fabricating such a device, are provided. The method comprises the steps of: (a) providing a substrate of a first conductivity type; (b) forming within the substrate a well region of a ... | 03/20/2007 |
| 6699771 | Process for optimizing junctions formed by solid phase epitaxy A method of forming a semiconductor device includes forming at least one amorphous region within an at least partially formed semiconductor device. The method also includes implanting a halogen species in the amorphous region of the at least partially for... | 03/02/2004 |
| 6696729 | Semiconductor device having diffusion regions with different junction depths An aspect of the present invention includes: a gate insulating layer formed on an n-type silicon semiconductor region; a gate electrode formed on the gate insulating layer; a channel region formed immediately below the gate electrode in the semiconductor ... | 02/24/2004 |
| 6693023 | Ion implantation method and ion implantation equipment In an ion implantation method using an ion implantation equipment having an extraction electrode and a post accelerator, ion is uniformly implanted into a shallow region from the surface of a sample by setting an applied volt. of the post accelerator high... | 02/17/2004 |
| 6683356 | Semiconductor device with oxygen doped regions A semiconductor device includes sidewall insulating films formed on sides of the gate electrode layer respectively facing source and drain regions, and silicide layers formed on the source and drain regions. Oxygen-introduced portions are respectively for... | 01/27/2004 |
| 6682992 | Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into t... | 01/27/2004 |
| 6682994 | Methods for transistor gate formation using gate sidewall implantation Methods are disclosed for semiconductor device fabrication in which MOS transistor gates are to be formed. Polysilicon gate structures and sidewall spacers are formed, with upper portions of the gate sidewalls exposed. Angled implantation processing is em... | 01/27/2004 |
| 6680250 | Formation of deep amorphous region to separate junction from end-of-range defects A method of manufacturing a MOSFET semiconductor device includes forming a gate electrode over a substrate and a gate oxide between the gate electrode and the substrate. Inert dopants are then implanted within the substrate to form amorphized source/drain... | 01/20/2004 |
| 6677643 | Super-junction semiconductor device A super-junction semiconductor is provided that facilitates easy mass-production thereof, reducing the tradeoff relation between the on-resistance and the breakdown voltage, obtaining a high breakdown voltage and reducing the on-resistance to increase the... | 01/13/2004 |
| 6670252 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device which reduces the number of impurity implantations. A buffer film for reducing a quantity of an impurity implantation is provided adjacent to an MIS gate structure over a surface of a semiconductor substrat... | 12/30/2003 |
| 6667216 | Semiconductor device and method of fabricating the same A gate electrode is formed on a semiconductor substrate with a gate insulating film interposed therebetween. A channel region composed of a first-conductivity-type semiconductor layer is formed in a region of a surface portion of the semiconductor substra... | 12/23/2003 |
| 6660604 | Method of forming double junction region and method of forming transfer transistor using the same The present invention relates to a method of forming a dual junction region and a method of forming a transfer transistor using the same. A low-concentration junction region is formed. A high-concentration junction region is formed at a portion of the low... | 12/09/2003 |
| 6645838 | Selective absorption process for forming an activated doped region in a semiconductor A process for activating a doped region (80) or amorphized doped region (34) in a semiconductor substrate (10). The process includes the steps of doping a region of the semiconductor substrate, wherein the region is crystalline or previously amorphized. T... | 11/11/2003 |
| 6646304 | Universal semiconductor wafer for high-voltage semiconductor components A universal semiconductor wafer for high-voltage semiconductor components includes at least one layer of a first conductivity type which is provided on a semiconductor substrate of the first conductivity type. A plurality of floating semiconductor zones o... | 11/11/2003 |
| 6638802 | Forming strained source drain junction field effect transistors By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments.... | 10/28/2003 |
| 6639229 | Aluminum implantation method A method of aluminum ion generation for an implantation in a semiconductor wafer, including using nitrogen trifluoride as a gas for ionizing a solid alumina element.... | 10/28/2003 |
| 6633047 | Apparatus and method for introducing impurity An impurity introducing apparatus of the present invention includes: a system for introducing an impurity having charges into a target to be processed, the target being a semiconductor substrate or a film formed on the substrate; a system for supplying el... | 10/14/2003 |
| 6632728 | Increasing the electrical activation of ion-implanted dopants We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device i... | 10/14/2003 |
| 6627955 | Structure and method of MOS transistor having increased substrate resistance Structure and fabrication method of a lateral MOS transistor, positioned on the surface of an integrated circuit fabricated in a semiconductor of a first conductivity type, comprising a source and a drain, each having at the surface a region of the opposi... | 09/30/2003 |
| 6602549 | Indium source reagent composition, and use thereof for deposition of indium-containing films on subtrates and ion implantation of indium-doped shallow junction microelectronic structures An indium precursor composition having utility for incorporation of indium in a microelectronic device structure, e.g., as an indium-containing film on a device substrate by bubbler or liquid delivery MOCVD techniques, or as a dopant species incorporated ... | 08/05/2003 |
| 6583018 | Method of ion implantation An ion implantation method which can accurately control the effective dose amount even in ion implantation at a very low energy. This ion implantation method comprises the steps of carrying out preamorphization ion implantation for a semiconductor substra... | 06/24/2003 |
| 6570169 | Apparatus for manufacturing a semiconductor device and a method for manufacturing a semiconductor device The purpose of the present invention is to avoid a decrease in the mechanical strength of a Si substrate because of the repetition of ion-implantation and annealing processes. As ions are implanted while the Si substrate surface temperature is kept at as ... | 05/27/2003 |
| 6566257 | Method for producing semiconductor device A semiconductor device is produced by forming a gate electrode on a semiconductor substrate, and by then forming source/drain regions by an ion implantation using the gate electrode as a mask. A suicide film is formed on at least the surface of the gate e... | 05/20/2003 |
| 6562705 | Method and apparatus for manufacturing semiconductor element A laser heating apparatus for forming an electrode on one surface of an Si chip provided on an Si wafer, thereby producing a semiconductor element, comprises a high vacuum chamber having a light transmission window, an XY table contained in the high vacuu... | 05/13/2003 |
| 6559328 | Indium source reagent compositions, and use thereof for deposition of indium-containing films on substrates and ion implantation of indium-doped shallow junction microelectronic structures An indium precursor composition having utility for incorporation of indium in a microelectronic device structure, e.g., as an indium-containing film on a device substrate by bubbler or liquid delivery MOCVD techniques, or as a dopant species incorporated ... | 05/06/2003 |
| 6552411 | DC or AC electric field assisted anneal A method for forming a desired junction profile in a semiconductor device. At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate a... | 04/22/2003 |
| 6548363 | Method to reduce the gate induced drain leakage current in CMOS devices A method for forming FET devices with attenuated gate induced drain leakage current. There is provided a silicon semiconductor substrate employed within a microelectronics fabrication. There is formed within the silicon substrate field oxide (FOX) dielect... | 04/15/2003 |
| 6537886 | Ultra-shallow semiconductor junction formation A method for fabricating an ultra-shallow semiconductor junction using a high energy co-implantation step; a low energy dopant implantation step, and a fast isothermal annealing step is provided. Microelectronics devices such as FET and CMOS devices conta... | 03/25/2003 |
| 6528821 | Optimized reachthrough implant for simultaneously forming an MOS capacitor A method of forming a diffusion region in a silicon substrate having low-resistance, acceptable defect density, reliability and process control comprising the steps of: (a) subjecting a silicon substrate to a first ion implantation step, said first ion im... | 03/04/2003 |
| 6521504 | Semiconductor device and method of fabricating the same There is provided a method of fabricating a semiconductor device, including the steps of (a) forming a first conductivity type base region in a second conductivity type collector region by molecular beam epitaxy (MBE), (b) forming an emitter region in the... | 02/18/2003 |
