User-operated amusement apparatus for kicking the user's buttocks
An apparatus including a user-operated and controlled apparatus for self-infliction of repetitive blows to the user's buttocks by a plurality of elongated arms bearing flexible extensions that rotate under the user's control.
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| Number | Title | Issue Date |
| 7396746 | Methods for stable and repeatable ion implantation A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system having a process chamber, a source for producing a plasma in the process chamber, a platen for holding a substrate in the process chamber, an anode spaced from th... | 07/08/2008 |
| 7393784 | Method of manufacturing suspension structure and chamber A method of manufacturing a suspension structure including providing a substrate, forming a hole and a sacrificial layer filling the hole on the substrate, forming a patterned photoresist layer on the substrate and the sacrificial layer, the patterned photoresist la... | 07/01/2008 |
| 7390711 | MOS transistor and manufacturing method thereof A MOS transistor including a gate insulation layer and a gate electrode layer on a channel region of a semiconductor substrate. A gate spacer layer is formed on a sidewall of the electrode layer and the insulation layer. The transistor includes a deep extended sourc... | 06/24/2008 |
| 7378335 | Plasma implantation of deuterium for passivation of semiconductor-device interfaces A method for fabricating a semiconductor-based device includes providing a substrate including a semiconductor layer, forming a gate dielectric layer on the semiconductor layer, forming a plasma including deuterium, plasma implanting deuterium from the plasma into t... | 05/27/2008 |
| 7358127 | Power semiconductor rectifier having broad buffer structure and method of manufacturing thereof Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of t... | 04/15/2008 |
| 7282403 | Temperature stable metal nitride gate electrode An integrated circuit is provided including an FET gate structure formed on a substrate. This structure includes a gate dielectric on the substrate, and a metal nitride layer overlying the gate dielectric and in contact therewith. This metal nitride layer is charact... | 10/16/2007 |
| 7223675 | Method of forming pre-metal dielectric layer A method of forming a pre-metal dielectric (PMD) layer is disclosed. In the method, after a nitride liner layer is formed on a substrate having a transistor, a USG layer is deposited thereon and then planarized. Next, ion implantation and annealing are performed for... | 05/29/2007 |
| 7187057 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor Known techniques to improve metal-oxide-semiconductor field effect transistor (MOSFET) performance is to add a high stress dielectric layer to the MOSFET. The high stress dielectric layer introduces stress in the MOSFET that causes electron mobility drive current to... | 03/06/2007 |
| 7109098 | Semiconductor junction formation process including low temperature plasma deposition of an optical absorption layer and high speed optical annealing A method of forming semiconductor junctions in a semiconductor material of a workpiece includes ion implanting dopant impurities in selected regions of the semiconductor material, introducing an optical absorber material precursor gas into a chamber containing the w... | 09/19/2006 |
| 6677168 | Analysis of ion implant dosage Various methods of determining ion implant dosage are disclosed. In one aspect, a method of processing a semiconductor workpiece that has a device region and an inactive region is provided. A first mask is formed on a first portion of the inactive region.... | 01/13/2004 |
| 6633047 | Apparatus and method for introducing impurity An impurity introducing apparatus of the present invention includes: a system for introducing an impurity having charges into a target to be processed, the target being a semiconductor substrate or a film formed on the substrate; a system for supplying el... | 10/14/2003 |
| 6593181 | Tailored insulator properties for devices A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains ... | 07/15/2003 |
| 6569726 | Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer A method of manufacturing a MOS transistor. A substrate having a gate oxide layer, a gate electrode and spacers attached to the sidewalls of the gate electrode is provided. A source/drain (S/D) implantation is conducted to form a source/drain region in th... | 05/27/2003 |
| 6566257 | Method for producing semiconductor device A semiconductor device is produced by forming a gate electrode on a semiconductor substrate, and by then forming source/drain regions by an ion implantation using the gate electrode as a mask. A suicide film is formed on at least the surface of the gate e... | 05/20/2003 |
| 6534354 | Method of manufacturing MOS transistor with fluorine implantation at a low energy A method of manufacturing a MOS transistor. A substrate having a gate oxide layer, a gate electrode and spacers attached to the sidewalls of the gate electrode is provided. A source/drain (S/D) implantation is conducted to form a source/drain region in th... | 03/18/2003 |
| 6514802 | Method of providing a frontside contact to a substrate of SOI device A method for making frontside contact to a substrate through an SOI structure thereon is provided. An etching step is undertaken to form a trench in the SOI structure so as to expose and define a rug surface of the substrate. Then, a thin insulating layer... | 02/04/2003 |
| 6511925 | Process for forming high dielectric constant gate dielectric for integrated circuit structure In accordance with the invention a high-k gate dielectric is formed by the steps of first forming a silicon oxide layer over a silicon substrate and then exposing the silicon oxide to a flux of low energy plasma containing metal ions which, when inserted ... | 01/28/2003 |
| 6495474 | Method of fabricating a dielectric layer A method of fabricating a semiconductor device having a gate dielectric layer. The method includes the step of ion implanting at least one of Zr, Hf, La, Y, Al, Ti and Ta into the gate dielectric layer at low implant energy level to increase the dielectri... | 12/17/2002 |
| 6469360 | Integrated circuit devices providing reduced electric fields during fabrication thereof A method for fabricating an integrated circuit device includes the steps of forming first and second conductive regions on a substrate. The second conductive region is divided into first and second subregions wherein the first subregion is adjacent the fi... | 10/22/2002 |
| 6451674 | Method for introducing impurity into a semiconductor substrate without negative charge buildup phenomenon A method for introducing an impurity includes the steps of: introducing an impurity having charges into a target to be processed, such as a semiconductor substrate and a film formed on a substrate; and supplying electrons from a filament into the target t... | 09/17/2002 |
| 6358809 | Method of modifying properties of deposited thin film material A method of modifying a layer of thin film composite material to achieve one or more desired properties for the thin film layer which cannot be achieved by heat treatment at all practical temperatures of operation allowable by particular integrated circui... | 03/19/2002 |
| 6355511 | Method of providing a frontside contact to substrate of SOI device A method for making frontside contact to a substrate through an SOI structure thereon is provided. An etching step is undertaken to form a trench in the SOI structure so as to expose and define a rough surface of the substrate. Then, a thin insulating lay... | 03/12/2002 |
| 6222196 | Rotatable workpiece support including cyclindrical workpiece support surfaces for an ion beam implanter In accordance with the present invention, an ion implanter including a rotatable support disposed in an implantation chamber of an ion beam implanter for supporting a plurality of wafer workpieces. The rotatable support includes a hub adapted to be rotate... | 04/24/2001 |
| 6069074 | Method of forming conductor shielding to prevent arcing effect during contact implant process A method preventing the arcing effect during contact implantation by employing a conductive shielding film within the contact opening in the fabrication of an integrated circuit is described. A dielectric layer is provided overlying a semiconductor substr... | 05/30/2000 |
| 6028005 | Methods for reducing electric fields during the fabrication of integrated circuit devices A method for fabricating an integrated circuit device includes the steps of forming first and second conductive regions on a substrate. The second conductive region is divided into first and second subregions wherein the first subregion is adjacent the fi... | 02/22/2000 |
| 6005253 | Scanning energy implantation A process is described for generating, through ion implantation, any desired concentration profile. This is accomplished by providing a set of mono-energetic doping concentration profiles which, when superimposed, generate the desired concentration profil... | 12/21/1999 |
| 5998282 | Method of reducing charging damage to integrated circuits in ion implant and plasma-based integrated circuit process equipment Charging damage to integrated circuits during ion implantation and plasma processing of integrated circuit die in a semiconductor wafer is reduced by processing scribe lanes during wafer fabrication to facilitate the flow of current to and from the wafer ... | 12/07/1999 |
| 5981961 | Apparatus and method for improved scanning efficiency in an ion implanter An ion implanter for implanting ions into a substrate comprises an ion beam generator for generating a beam of ions, support means for carrying a substrate to be implanted with beam ions, scanning means for scanning at least one of the substrate and the i... | 11/09/1999 |
| 5880013 | Method for reducing cross-contamination in ion implantation This ion implantation method reduces the observed levels of cross-contamination and reduces the level of variations in surface conductivity related to the provision of multiple ion implantations into a semiconductor wafer. Reduced levels of cross-contamin... | 03/09/1999 |
| 5476520 | Shield assembly for semiconductor wafer supports A method for preventing cross-contamination of semiconductor wafers during processing comprising covering a surface portion of a support assembly with a process compatible material, engaging a semiconductor wafer with the support assembly, processing the ... | 12/19/1995 |
| 5384268 | Charge damage free implantation by introduction of a thin conductive layer A method is described for fabricating an integrated circuit in which the gate electrodes and gate dielectric silicon oxide are protected from electrical charge damage during ion implantation. A thin conducting layer is deposited over the pattern of gate e... | 01/24/1995 |
| 5384266 | Electronic device manufacture using ion implantation In the manufacture of liquid crystal display devices with drive circuits and of other large area electronics devices, discharge damage of tracks (9) and other parts of a thin-film pattern (12) can result during an ion-implantation step for forming transis... | 01/24/1995 |
| 5354698 | Hydrogen reduction method for removing contaminants in a semiconductor ion implantation process In semiconductor manufacture a method of ion implanting a substrate includes an in-situ hydrogen reduction for removing or outgassing contaminants present on the surface of the substrate. By removing the contaminants, the implantation of "knock ons" into ... | 10/11/1994 |
| 5290717 | Method of manufacturing semiconductor devices having a resist patern coincident with gate electrode A method of manufacturing a semiconductor device including a MOS transistor, wherein a second resist pattern having openings respectively defining gate, source, and drain regions is formed while leaving a first resist pattern on a gate material film, i.e.... | 03/01/1994 |
| 5286978 | Method of removing electric charge accumulated on a semiconductor substrate in ion implantation A method of removing electric charges accumulated on a semiconductor substrate during ion implantation by irradiating a highly accelerated electron beam with an acceleration energy of 1 to 50 KeV into the portion of the substrate irradiated with ion beams... | 02/15/1994 |
| 5244820 | Semiconductor integrated circuit device, method for producing the same, and ion implanter for use in the method The present invention relates to an ion implantation process in a wafer process for a semiconductor integrated circuit device. Particularly, according to the present invention, a shallow junction can be formed by performing the implantation of ion while h... | 09/14/1993 |
| 5185273 | Method for measuring ions implanted into a semiconductor substrate A method is provided for correlating ion implantation from a silicon wafer (13) to a gallium arsenide wafer. A first dose of a predetermined amount of silicon ions is implanted into a silicon wafer (13). The first dose of the implanted silicon ions in the... | 02/09/1993 |
| 5134301 | Ion implanting apparatus, having ion contacting surfaces made of high purity silicon, for fabricating semiconductor integrated circuit devices An ion injecting apparatus and a process for fabricating a semiconductor integrated circuit device by using the ion implanting apparatus is provided. When a wafer, e.g., a Si wafer, is to be implanted with ions, an electrode or the like made of a highly p... | 07/28/1992 |
| 5057444 | Method of fabricating semiconductor device A method of fabricating a semiconductor device comprising a step of forming a trench selectively on a semiconductor substrate, a step of positioning said semiconductor substrate to a first position inclined to a plane vertical to ion beams, a step of inje... | 10/15/1991 |
| 5049514 | Method of making a MOS device having a polycide gate In a method of manufacturing a semiconductor device of polycide gate structure, a polysilicon layer is formed on the gate insulation film. The polysilicon layer and the gate insulation film are selectively removed to form an opening which reaches the semi... | 09/17/1991 |