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| Number | Title | Issue Date |
| 7422634 | Three inch silicon carbide wafer with low warp, bow, and TTV A high quality single crystal wafer of SiC is disclosed. The wafer has a diameter of at least about 3 inches, a warp of less than about 5 μm, a bow less than about 5 μm, and a total thickness variation of less than about 2.0 μm. ... | 09/09/2008 |
| 7410877 | Method for manufacturing SIMOX wafer and SIMOX wafer A method for manufacturing a SIMOX wafer includes: heating a silicon wafer, implanting oxygen ions so as to form a high oxygen concentration layer; implanting oxygen ions into the silicon wafer obtained by the forming of the high oxygen concentration layer to form a... | 08/12/2008 |
| 7397063 | Semiconductor device A semiconductor device comprises a glass substrate serving as a substrate having an insulated surface and a silicon layer located on a position overlapping with this glass substrate. The silicon layer includes an amorphous gettering region. Preferably, the silicon l... | 07/08/2008 |
| 7368823 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device having an interconnection part formed of multiple carbon nanotubes is disclosed. The method includes the steps of (a) forming a growth mode control layer controlling the growth mode of the carbon nanotubes, (b) formin... | 05/06/2008 |
| 7326658 | Method for preparing nitrogen-doped annealed wafer and nitrogen-doped and annealed wafer The present invention provides a method for producing a nitrogen-doped annealed wafer, wherein before a wafer sliced from a silicon single crystal doped with at least nitrogen and polished is subjected to a high temperature heat treatment at 1100° C. to 1350° C. i... | 02/05/2008 |
| 7242075 | Silicon wafers and method of fabricating the same By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. ... | 07/10/2007 |
| 7071079 | Epitaxial wafer and a method for producing it The present invention provides an epitaxial wafer wherein a silicon epitaxial layer is formed on a surface of a silicon single crystal wafer in which nitrogen is doped, and a density of oxide precipitates having such a size that a gettering capability can be achieve... | 07/04/2006 |
| 6833195 | Low temperature germanium transfer A method of bonding a germanium (Ge) wafer to a semiconductor wafer. A Ge wafer having a cleaving plane defined by ion implantation is provided. A surface activation on at least one surface of the Ge wafer is performed. A semiconductor wafer is provided. A surface a... | 12/21/2004 |
| 6686260 | Process for producing thermally annealed wafers having improved internal gettering A process for heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The process includes subjecting the wafer to a ... | 02/03/2004 |
| 6676753 | Czochralski pullers for manufacturing monocrystalline silicon ingots, including heat shield having sloped portions A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxy... | 01/13/2004 |
| 6670261 | Production method for annealed wafer There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in res... | 12/30/2003 |
| 6666915 | Method for the preparation of an epitaxial silicon wafer with intrinsic gettering This invention is directed to a novel process for the preparation of a silicon wafer comprising a surface having an epitaxial layer deposited thereon. In one embodiment, an epitaxial layer is deposited onto a surface of a silicon wafer. The wafer is also ... | 12/23/2003 |
| 6645834 | Method for manufacturing annealed wafer and annealed wafer Provided is a manufacturing process for an annealed wafer capable of elucidating a relationship between a tilt angle from a (100) plane of a wafer to be annealed and haze to set optimal tilt angles for suppression of haze and to improve a characteristic o... | 11/11/2003 |
| 6642123 | Method of fabricating a silicon wafer including steps of different temperature ramp-up rates and cool-down rates A method of fabricating a silicon wafer, which includes the steps of preparing a silicon wafer by slicing, grinding, and cleaning an ingot, inserting the silicon wafer in a diffusion furnace having an ambience of one of Ar, N2 and inert gas inc... | 11/04/2003 |
| 6638357 | Method for revealing agglomerated intrinsic point defects in semiconductor crystals A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defect... | 10/28/2003 |
| 6632278 | Low defect density epitaxial wafer and a process for the preparation thereof The present invention relates to an epitaxial wafer comprising single crystal silicon substrate and an epitaxial layer deposited thereon. The substrate comprises an axially symmetric region which is free of agglomerated intrinsic point defects and wherein... | 10/14/2003 |
| 6605150 | Low defect density regions of self-interstitial dominated silicon The present invention relates to a single crystal silicon, in wafer and ingot form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects. The region extends from a circumferential edge of the wafer or constant d... | 08/12/2003 |
| 6599815 | Method and apparatus for forming a silicon wafer with a denuded zone An apparatus and method for forming an epitaxial layer on and a denuded zone in a semiconductor wafer. A single chamber is used to form both the epitaxial layer and the denuded zone. The denuded zone is formed by heating the wafer in the chamber and then ... | 07/29/2003 |
| 6599816 | Method of manufacturing silicon epitaxial wafer A method is designed to manufacture a silicon epitaxial wafer exhibiting sufficient gettering capability from the initial stage of the device process. Specifically, the method is to manufacture the silicon wafer with a nitrogen concentration of at least 1... | 07/29/2003 |
| 6586068 | Ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile and a process for the preparation thereof A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, and a central plane between the front and bac... | 07/01/2003 |
| 6579589 | Semiconductor wafer with crystal lattice defects, and process for producing this semiconductor wafer A semiconductor wafer has a front side 1, a back side 2, a top layer 3, a bottom layer 4, an upper inner layer 5 lying below the top layer 3, a lower inner layer 6 lying above the bottom layer 4, a central region 7 between the layers 5 and 6 an uneven dis... | 06/17/2003 |
| 6573159 | Method for thermally annealing silicon wafer and silicon wafer According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, an... | 06/03/2003 |
| 6569749 | Silicon and oxygen ion co-implanation for metallic gettering in epitaxial wafers A novel method of generating intrinsic gettering sites in epitaxial wafers employs co-implanting silicon and oxygen into a substrate of the wafer, annealing the substrate at a low temperature, and then depositing the epitaxial layer on a surface of the su... | 05/27/2003 |
| 6555194 | Process for producing low defect density, ideal oxygen precipitating silicon The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipit... | 04/29/2003 |
| 6551398 | Heat treatment method for a silicon monocrystal wafer and a silicon monocrystal wafer There is disclosed a heat treatment method for a silicon monocrystal wafer comprising the steps of heat-treating in a reducing atmosphere a silicon monocrystal wafer manufactured by growing a silicon monocrystal ingot by Czochralski method wherein a wafer... | 04/22/2003 |
| 6548035 | Silicon single crystal wafer for epitaxial wafer, epitaxial wafer, and methods for producing the same and evaluating the same A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 o... | 04/15/2003 |
| 6547875 | Epitaxial wafer and a method for manufacturing the same A wafer of the invention is a silicon wafer of 0.02 Ωcm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0... | 04/15/2003 |
| 6544656 | Production method for silicon wafer and silicon wafer A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 Ω.multidot.cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ing... | 04/08/2003 |
| 6544490 | Silicon wafer and production method thereof and evaluation method for silicon wafer A silicon wafer obtained by slicing a silicon single crystal ingot grown by the Czochralski method with or without nitrogen doping, wherein the silicon wafer has an NV-region, an NV-region containing an OSF ring region or an OSF ring region for its entire... | 04/08/2003 |
| 6544899 | Process for manufacturing silicon epitaxial wafer There is provided a process for manufacturing a silicon epitaxial wafer capable of manufacturing an epitaxial wafer, which exerts a stable IG capability without being affected by a thermal history of a substrate for epitaxial growth and has the IG capabil... | 04/08/2003 |
| 6541117 | Silicon epitaxial wafer and a method for producing it There is disclosed a silicon epitaxial wafer comprising an epitaxial layer formed on a silicon wafer wherein Erratic phenomenon does not occur in a MOS device fabricated on the silicon epitaxial wafer, a silicon epitaxial wafer having oxide dielectric bre... | 04/01/2003 |
| 6537368 | Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor A process for preparing a silicon epitaxial wafer. The wafer has a front surface having an epitaxial layer deposited thereon, a back surface, and a bulk region between the front and back surfaces, wherein the bulk region contains a concentration of oxygen... | 03/25/2003 |
| 6537655 | Epitaxial silicon wafer with intrinsic gettering and a method for the preparation thereof This invention is directed to a novel a single crystal silicon wafer. In one embodiment, this wafer comprises: (a) two major generally parallel surfaces (i.e., the front and back surfaces); (b) a central plane between and parallel to the front and back su... | 03/25/2003 |
| 6531416 | Method for heat treatment of silicon wafer and silicon wafer heat-treated by the method A method for heat treatment of a silicon wafer in a reducing atmosphere through use of a rapid thermal annealer (RTA) is provided. In the method, the silicon wafer is heat-treated at a temperature of 1150° C. to 1300° C. for 1 sec to 60 sec in a mixture... | 03/11/2003 |
| 6503594 | Silicon wafers having controlled distribution of defects and slip A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxy... | 01/07/2003 |
| 6478883 | Silicon single crystal wafer, epitaxial silicon wafer, and methods for producing them A silicon wafer for epitaxial growth consisting of a highly boron-doped silicon single crystal wafer, an antimony-doped silicon single crystal wafer or a phosphorus-doped silicon single crystal wafer, which allows easy oxygen precipitation and exhibits hi... | 11/12/2002 |
| 6448157 | Fabrication process for a semiconductor device A surface of a substrate is oxidized at a temperature equal to or higher than 1050° C., or at a oxidation speed equal to or higher than 7.5 nm/min to form an oxide film with a thickness equal to or more than 1500 nm. when the oxide film is removed, a den... | 09/10/2002 |
| 6447600 | Method of removing defects of single crystal material and single crystal material from which defects are removed by the method A hot isostatic pressing treatment is conducted for a single crystal body (11) in an atmosphere where the single crystal body (11) is stable, under a pressure of 0.2 to 304 MPa at a temperature which is 0.85 or more times the melting point in an absolute ... | 09/10/2002 |
| 6432197 | Process for the preparation of non-oxygen precipitating Czochralski silicon wafers The present invention relates to a process for the treatment of Czochralski single crystal silicon wafers to dissolve existing oxygen clusters and precipitates, while preventing their formation upon a subsequent oxygen precipitation heat treatment. The pr... | 08/13/2002 |
| 6414373 | Semiconductor device and method of fabricating the same A high-resistance substrate with good RF characteristics, which has an interstitial oxygen concentration ([Oi]) of 8E17 cm-3 or less, an oxygen precipitate density ([BMD]) of 1E8 cm-3 or more, and a substrate resistivity of 500 Ω.mu... | 07/02/2002 |
