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| Number | Title | Issue Date |
| 7432564 | Pixel structure A method for fabricating a pixel structure is provided. First, a gate, a scan line, and a first terminal are formed on a substrate. A gate insulating layer is formed over the substrate to cover the gate, the scan line, and the first terminal. After defining the semi... | 10/07/2008 |
| 7413994 | Hydrogen and oxygen based photoresist removal process The present invention provides a photoresist removal process and a method for manufacturing an interconnect using the same. One embodiment of the photoresist removal process includes, among other steps, providing a low dielectric constant (k) substrate having a phot... | 08/19/2008 |
| 7361539 | Dual stress liner A semiconductor device structure is provided which includes a first field effect transistor (“FET”) having a first channel region, a first source region, a first drain region and a first gate conductor overlying the first channel region. A second FET is included... | 04/22/2008 |
| 7348653 | Resistive memory cell, method for forming the same and resistive memory array using the same A resistive memory cell employs a photoimageable switchable material, which is patternable by actinic irradiation and is reversibly switchable between distinguishable resistance states, as a memory element. Thus, the photoimageable switchable material is directly pa... | 03/25/2008 |
| 7297986 | Nitride-based light-emitting device and method of manufacturing the same A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a sin... | 11/20/2007 |
| 7271111 | Shadow mask deposition of materials using reconfigurable shadow masks A shadow mask deposition system includes a plurality of identical shadow masks arranged in a number of stacks to form a like number of compound shadow masks, each of which is disposed in a deposition vacuum vessel along with a material deposition source. Materials f... | 09/18/2007 |
| 6682989 | Plating a conductive material on a dielectric material A surface may be selectively coated with a polymer using an induced surface grafting or polymerization reaction. The reaction proceeds in those regions that are polymerizable and not in other regions. Thus, a semiconductor structure having organic regions... | 01/27/2004 |
| 6465840 | Integrated structure comprising a patterned feature substantially of single grain polysilicon The electrical performance of a dielectric film for capacitive coupling in an integrated structure is enhanced by forming the polycrystalline electrically conductive layer coupled with the dielectric film substantially unigranular over the coupling area, ... | 10/15/2002 |
| 6455372 | Nucleation for improved flash erase characteristics The present invention provides a method for improving the erase speed and the uniformity of erase characteristics in erasable programmable read-only memories. This result is achieved by forming polycrystalline floating gate layers with optimized grain siz... | 09/24/2002 |
| 6444482 | Method of monitoring power supplied to heat a substrate Methods for monitoring power supplied to a substrate to form a doped or undoped crystalline semiconductor material are disclosed. The methods include providing a layer of an amorphous semiconductor material, doped or undoped, on a substrate and heating th... | 09/03/2002 |
| 6225217 | Method of manufacturing semiconductor device having multilayer wiring A first insulating film with a dielectric constant lower than that of a silicon oxide film is formed on a semiconductor substrate. Next, a metal film or a second insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma... | 05/01/2001 |
| 6188116 | Structure of a polysilicon plug A structure of a polysilicon via that includes a semiconductor substrate, a conducting layer on the substrate, a dielectric layer on the conducting layer, a polysilicon plug formed in the dielectric layer, a polysilicon layer on the polysilicon plug, and ... | 02/13/2001 |
| 6140225 | Method of manufacturing semiconductor device having multilayer wiring A first insulating film with a dielectric constant lower than that of a silicon oxide film is formed on a semiconductor substrate. Next, a second insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma process and exp... | 10/31/2000 |
| 5981383 | Method of fabricating a salicide layer of a device electrode Salicide (self-aligned silicide) structures are formed using a process that does not form oxide spacer structures alongside polysilicon gate electrodes and wiring lines. A shaped polysilicon electrode is formed having protrusions extending beyond the side... | 11/09/1999 |
| 5962065 | Method of forming polysilicon having a desired surface roughness A method for reliably forming polysilicon of a desired surface roughness includes providing a layer of doped or undoped amorphous silicon on a substrate and heating said substrate while monitoring the emission of said substrate and comparing the monitored... | 10/05/1999 |
| 5962341 | Semiconductor device and manufacturing method therefor A prescribed region of a polyacetylene film that is provided on the flattened surface of a first interlayer insulating film is doped so as to form an upper wiring layer on the polyacetylene film. A second interlayer insulating film which covers this polya... | 10/05/1999 |
| 5843830 | Capacitor, and methods for forming a capacitor A method for forming a capacitor includes forming a substrate having a node location to which electrical connection to a capacitor is to be made; forming an inner capacitor plate over the node location, the inner capacitor plate having an exposed sidewall... | 12/01/1998 |
| 5844771 | Capacitor construction A capacitor is described which includes an inner capacitor plate having at least one sidewall; an oxidation barrier layer positioned in covering relation relative to the at least one sidewall; a capacitor dielectric plate positioned over the inner capacit... | 12/01/1998 |
| 5824590 | Method for oxidation and crystallization of ferroelectric material A two-step method of low temperature oxidation of a ferroelectric layer followed by high temperature crystallization of the ferroelectric film to protect underlying semiconductor layers against high temperature oxidation which can cause the conductive lay... | 10/20/1998 |
| 5688550 | Method of forming polysilicon having a desired surface roughness A method for reliably forming polysilicon of a desired surface roughness includes providing a layer of doped or undoped amorphous silicon on a substrate and heating said substrate while monitoring the emission of said substrate and comparing the monitored... | 11/18/1997 |
| 5556806 | Spin-on-glass nonetchback planarization process using oxygen plasma treatment An improved method is described for planarizing dielectric layers which are formed between conductor layers in integrated circuits A three layer spin-on-glass sandwich is formed comprising a first silicon oxide layer, a spin-on-glass layer and a second si... | 09/17/1996 |
| 5442213 | Semiconductor device with high dielectric capacitor having sidewall spacers According to a semiconductor device and a method of manufacturing thereof, a sidewall spacer is formed at a sidewall of a contact hole, in a recess portion defined by the sidewall of the contact hole and a buried conductive layer, having a film thickness ... | 08/15/1995 |
| 5397446 | Method of forming a ferroelectric film A method of forming a ferroelectric film on a heated support is provided which includes the steps of forming a first layer on the heated support by sputtering a material including lead at a first pressure; and forming a second layer on the first layer by ... | 03/14/1995 |
| 5348909 | Manufacture of printhead with diamond resistors An thermal ink jet printhead is fabricated with resistors of doped diamond. A diamond substrate is masked in the pattern of the resistors and bombarded with boron ions with high energy to embed the boron with only a negligible amount on the surface. If a ... | 09/20/1994 |
