Class 257/E21.258 - Using masks (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.24. This subclass
No. of patents: 407
Last issue date: 04/08/2008

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Number	Title	Issue Date
7354866	Cluster tool and method for process integration in manufacture of a gate structure of a field effect transistor A method and apparatus for process integration in manufacture of a gate structure of a field effect transistor are disclosed. The method includes assembling an integrated substrate processing system having a metrology module and a vacuumed processing platform to per...	04/08/2008
7348198	Liquid crystal display device and fabricating method thereof A liquid crystal display device and a fabricating method thereof for simplifying a process and improving an aperture ratio are disclosed, including forming a first mask pattern group including a gate line, a gate electrode and a common line; forming a second mask pa...	03/25/2008
7282440	Integrated circuit contact A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices so manufactured. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of ...	10/16/2007
7189619	Process for manufacturing vertically insulated structural components on SOI material of various thickness Vertically insulated active semiconductor regions having different thicknesses in an SOI wafer, which has an insulating layer, is produced. On the wafer, first active semiconductor regions having a first thickness are arranged in a layer of active semiconductor mate...	03/13/2007
6946339	Method for creating a stepped structure on a substrate In a method for creating a stepped structure on a substrate, which at least includes a first portion with a first thickness and a second portion with a second thickness, at first a layer sequence of a first oxide layer, a first nitride layer, and a second oxide laye...	09/20/2005
6703690	Apparatus for reducing isolation stress in integrated circuits Mechanical stress is diminished by forming an oxidation mask with silicon nitride having a graded silicon concentration. Grading is accomplished by changing the silicon content in the silicon nitride. The silicon nitride can be graded in a substantially l...	03/09/2004
6670690	Method of making an improved field oxide isolation structure for semiconductor integrated circuits having higher field oxide threshold voltages A method and structure for forming a modified field oxide region having increased field oxide threshold voltages (Vth) and/or reduced leakage currents between adjacent device areas is achieved. The method involves forming a field oxide using th...	12/30/2003
6660593	Method for fabricating oxide layers with different thicknesses A method for fabricating oxide layers with different thicknesses on a substrate is described. A field oxide layer is formed on the substrate to define a first active region and a second active region therebetween. A first oxide layer is formed over the fi...	12/09/2003
6656845	Method for forming semiconductor substrate with convex shaped active region Within a method for fabricating a semiconductor substrate while employing formed thereover a mask layer there is first employed the mask layer as an etch mask layer for forming a pair of isolation trenches within the semiconductor substrate and then later...	12/02/2003
6649996	In situ and ex situ hardmask process for STI with oxide collar application A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first...	11/18/2003
6627511	Reduced stress isolation for SOI devices and a method for fabricating A method for forming an isolation structure (22) on a SOI substrate (11) is provided. A three layer stack of an etchant barrier layer (16), a stress relief layer (17), and an oxide mask layer (18) is formed on the SOI substrate (11). The three layer stack...	09/30/2003
6605502	Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ...	08/12/2003
6602798	Method and apparatus for reducing isolation stress in integrated circuits Stress resulting from silicon nitride is diminished by forming an oxidation mask with silicon nitride having a graded silicon concentration. Grading is accomplished by changing the silicon content in the silicon nitride by varying the amount of hydride, s...	08/05/2003
6579807	Method for forming isolation regions on semiconductor device A method for forming an isolation region on a semiconductor substrate with a high yield, comprising partially covering the surface of a semiconductor substrate with an oxidation inhibitor film, depositing a material for side-wall parts on the oxidation in...	06/17/2003
6562723	Hybrid stack method for patterning source/drain areas A method of manufacturing an integrated circuit which reduces damage to the underlying base layer and the created oxide structures is disclosed herein. The method includes providing a hybrid stack disposed over an underlying layer, providing an IC structu...	05/13/2003
6497827	Method for etching dielectric films A method for removing a plurality of dielectric films from a supporting substrate by providing a substrate with a second dielectric layer overlying a first dielectric layer, contacting the substrate at a first temperature with a first acid solution exhibi...	12/24/2002
6495431	Semiconductor device and method for manufacturing the same that includes a dual oxidation A first field oxidation is performed by masking an element-isolating region formation-expected region on a substrate by a first oxidation preventing film (silicon nitride film) having therein a first opening to thereby form a first field oxide film, which...	12/17/2002
6495450	Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ...	12/17/2002
6489207	Method of doping a gate and creating a very shallow source/drain extension and resulting semiconductor The present invention relates to a method of forming a very shallow source-drain (S/D) extension while simultaneously highly doping a very narrow polysilicon gate through to the gate dielectric interface. The invention also relates to the resulting semico...	12/03/2002
6479397	Method for forming isolation regions on semiconductor device A method for forming an isolation region on a semiconductor substrate with a high yield, comprising partially covering the surface of a semiconductor substrate with an oxidation inhibitor film, depositing a material for side-wall parts on the oxidation in...	11/12/2002
6461985	Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two por...	10/08/2002
6429151	Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two por...	08/06/2002
6423631	Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ...	07/23/2002
6417113	Material removal method using germanium A germanium and silicon alloy is employed as an antireflective coating material for use in active area lithography and gate area lithography steps in the formation of a semiconductor integrated circuit. A layer composed of an alloy of germanium-silicon is...	07/09/2002
6417551	Semiconductor device and method of manufacturing the same The present invention provides a method of manufacturing a semiconductor device, comprising the steps of forming a gate insulating film, on a semiconductor substrate, forming a gate electrode containing a refractory metal layer on the gate insulation film...	07/09/2002
6414376	Method and apparatus for reducing isolation stress in integrated circuits Stress resulting from silicon nitride is diminished by forming an oxidation mask with silicon nitride having a graded silicon concentration. Grading is accomplished by changing the silicon content in the silicon nitride by varying the amount of hydride, s...	07/02/2002
6380606	Locos isolation process using a layered pad nitride and dry field oxidation stack and semiconductor device employing the same The present invention provides methods of manufacturing a field oxide isolation structure over a semiconductor. One of the methods includes the steps of: (1) depositing a first stack-nitride sublayer over the semiconductor at a first deposition rate and (...	04/30/2002
6380610	Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect A novel design of an oxidation mask for improved control of birds beak and more specifically for tailoring and smoothing the field oxide isolation profile in the vicinity of the birds beak. The mask design is particularly advantageous for narrow field iso...	04/30/2002
6362113	Method of forming pattern A method of forming a desired rectangular pattern in a material layer above a substrate. The method includes providing a substrate having a material layer thereon. A hard mask layer is next formed over the material layer, and then a first photoresist laye...	03/26/2002
6362070	Process for manufacturing a SOI wafer with buried oxide regions without cusps A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions,...	03/26/2002
6340625	Method for simultaneously forming thinner and thicker parts of a dual oxide layer having varying thicknesses A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is forme...	01/22/2002
6316300	Method of manufacturing a semiconductor device having an oxidation process for selectively forming an oxide film A method of manufacturing of a semiconductor device having a thermal oxidation process for selectively forming an oxide film by a thermal oxidation, which can reduce the generation of lattice defects in the semiconductor device during the thermal oxidatio...	11/13/2001
6297130	Recessed, sidewall-sealed and sandwiched poly-buffered LOCOS isolation methods This is a method for forming a recessed LOCOS isolation region, which includes the steps of forming a first silicon nitride layer between the pad oxide layer and a polysilicon buffer layer and a second nitride layer over the polysilicon buffer layer. In a...	10/02/2001
6245685	Method for forming a square oxide structure or a square floating gate structure without rounding effect A method for forming a square oxide structure or a square floating gate without a rounding effect at its corners. A first dielectric layer is formed on a pad layer for a square oxide structure or a polysilicon layer overlying a gate oxide layer for a floa...	06/12/2001
6232207	Doping process for producing homojunctions in semiconductor substrates In doping process for producing homojunctions in a semiconductor substrate, and the semiconductor substrate, dopants penetrate by way of diffusion employing an ultraviolet light source. A mask is introduced between the light source and the semiconductor w...	05/15/2001
6232244	Methodology for achieving dual gate oxide thicknesses Dual gate oxide layer thicknesses are achieved by depositing a thin blocking layer on active regions of a semiconductor substrate, such as silicon nitride, oxynitride, or oxide. Selected active regions are nitridated through a patterned photoresist mask f...	05/15/2001
6228752	Semiconductor device and method of manufacturing the same The present invention provides a method of manufacturing a semiconductor device, comprising the steps of forming a gate insulating film, on a semiconductor substrate, forming a gate electrode containing a refractory metal layer on the gate insulation film...	05/08/2001
6228727	Method to form shallow trench isolations with rounded corners and reduced trench oxide recess A method of fabricating shallow trench isolations has been achieved. A semiconductor substrate is provided. A pad oxide layer is grown overlying the semiconductor substrate. A silicon nitride layer is deposited. The silicon nitride layer and the pad oxide...	05/08/2001
6221737	Method of making semiconductor devices with graded top oxide and graded drift region A method of making a semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide is disclosed, in which the lateral semiconductor device structure includes at least two semiconductor regions separated by a l...	04/24/2001
6207588	Method for simultaneously forming thinner and thicker parts of a dual oxide layer having varying thicknesses A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is forme...	03/27/2001

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Class 257/E21.258 - Using masks (EPO)