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| Number | Title | Issue Date |
| 6656341 | Method of etching, as well as frame element, mask and prefabricated substrate element for use in such etching In a method of etching a substrate having a surface layer of conductive material, a circuit pattern is transferred to the surface layer in a central surface area portion of the substrate by electrochemical etching. To prevent excessive current densities f... | 12/02/2003 |
| 6583062 | Method of improving an aspect ratio while avoiding etch stop A plasma etching method for improving an aspect ratio including an etching profile including providing a substrate including an oxide containing insulating layer in a multilayer semiconductor device having at least a first underlying etching stop layer an... | 06/24/2003 |
| 6458494 | Etching method Etching method applicable to a semiconductor device fabrication and an MEMS(Micro-Electro-Mechanical System) process, including the steps of forming an etching mask on a substrate, forming a plurality of patterns in the etching mask corresponding to depth... | 10/01/2002 |
| 6444524 | Method for forming a trench capacitor A method for manufacturing a deep trench capacitor, which includes forming a layer of silicon nitride over a silicon substrate, depositing a layer of borosilicate glass having a predetermined thickness over the layer of silicon nitride, patterning and def... | 09/03/2002 |
| 6391426 | High capacitance storage node structures A high capacitance storage node structure is created in a substrate by patterning a hybrid resist (12) to produce both negative tone (16) and positive tone (18) areas in the exposed region (14). After removal of the positive tone areas (18), the substrate... | 05/21/2002 |
| 6376300 | Process of manufacturing trench capacitor having a hill structure A process of manufacturing a trench capacitor having a hill structure includes the steps of providing a semiconductor substrate, forming a passivation layer on the semiconductor substrate, etching the passivation layer to form a trench defined by a side w... | 04/23/2002 |
| 6372412 | Method of producing an integrated circuit chip using frequency doubling hybrid photoresist and apparatus formed thereby A photoresist composition is disclosed having both negative tone and positive tone responses, giving rise to spaces being formed in the areas of diffraction which are exposed to intermediate amounts of radiation energy. This resist material may be used to... | 04/16/2002 |
| 6313492 | Integrated circuit chip produced by using frequency doubling hybrid photoresist A photoresist composition is disclosed having both negative tone and positive tone responses, giving rise to spaces being formed in the areas of diffraction which are exposed to intermediate amounts of radiation energy. This resist material may be used to... | 11/06/2001 |
| 6284606 | Process to achieve uniform groove depth in a silicon substrate A process for forming a groove in a semiconductor substrate, to be used to fabricate grooved gate, MOSFET devices, has been developed. The process features the use of an insulator mask, used as an etch mask for definition of the groove feature in the semi... | 09/04/2001 |
| 6265316 | Etching method A method of forming a trench in a semiconductor substrate by gas plasma etching having the steps of detecting and analyzing emission spectrums of gas plasma etching products and controlling the gas plasma etching based on the ratio of the emission spectru... | 07/24/2001 |
| 6242363 | Method of etching a wafer layer using a sacrificial wall to form vertical sidewall One embodiment of the invention is a method for forming a raised structure on a semiconductor wafer. In the method, a patterned masking layer is formed over a wafer layer. The patterned masking layer typically includes a first mask covering a first region... | 06/05/2001 |
| 6139647 | Selective removal of vertical portions of a film A post-etch structure resulting in the inverse of a sidewall spacer etch, i.e. removal of the spacer. A vertical portion of a film is removed while leaving horizontal portions substantially intact. A facet is left in the film in register with an upper cor... | 10/31/2000 |
| 6114082 | Frequency doubling hybrid photoresist having negative and positive tone components and method of preparing the same A photoresist composition is disclosed having both negative tone and positive tone responses, giving rise to spaces being formed in the areas of diffraction which are exposed to intermediate amounts of radiation energy. This resist material may be used to... | 09/05/2000 |
| 5945352 | Method for fabrication of shallow isolation trenches with sloped wall profiles The present invention provides a method for fabricating shallow isolation trenches with sloped walls in semiconductor wafers. The method uses a conformal polysilicon layer to form an etch barrier over trench regions in a semiconductor substrate. This etch... | 08/31/1999 |
| 5776660 | Fabrication method for high-capacitance storage node structures A high capacitance storage node structure is created in a substrate by patterning a hybrid resist (12) to produce both negative tone (16) and positive tone (18) areas in the exposed region (14). After removal of the positive tone areas (18), the substrate... | 07/07/1998 |
| 5767017 | Selective removal of vertical portions of a film A body is provided with a substantially horizontal surface and a substantially vertical surface. A film is formed on the body with a substantially horizontal portion on the substantially horizontal surface, a substantially vertical portion on the substant... | 06/16/1998 |
| 5668023 | Composition for off-axis growth sites on non-polar substrates Nonpolar substrates comprising off-axis growth regions for the growth of polar semiconductors, and a method for making such substrates, are disclosed. According to the invention, an erodible material, such as a photoresist, is applied to a substrate at a ... | 09/16/1997 |
| 5550088 | Fabrication process for a self-aligned optical subassembly A method is disclosed for forming a self-aligned optical subassembly for supporting an optical fiber and associated optical component(s). In particular, sequential masking layer/silicon substrate etch operations are performed so as to etch, in series, the... | 08/27/1996 |
| 5501893 | Method of anisotropically etching silicon A method of anisotropic plasma etching of silicon to provide laterally defined recess structures therein through an etching mask employing a plasma, the method including anisotropic plasma etching in an etching step a surface of the silicon by contact wit... | 03/26/1996 |
| 5443685 | Composition and method for off-axis growth sites on nonpolar substrates Nonpolar substrates comprising off-axis growth regions for the growth of polar semiconductors, and a method for making such substrates, are disclosed. According to the invention, an erodible material, such as a photoresist, is applied to a substrate at a ... | 08/22/1995 |
| 5434447 | Semiconductor device having a trench for device isolation and method of fabricating the same A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizi... | 07/18/1995 |
| 5382314 | Method of shaping a diamond body The disclosed method of shaping a diamond body, typically a polycrystalline diamond (PCD) wafer or film, involves forming a, typically patterned, layer of an "etch-retarding" material on a surface of the diamond body, followed by etching with an appropria... | 01/17/1995 |
| 5356823 | Method of manufacturing a semiconductor device A semiconductor layer undergoes isolation etching and gate recess etching, using a side wall insulating layer having the shape of a forward taper as a mask, by means of the anisotropic etching technique. The shape of the side wall of the semiconductor lay... | 10/18/1994 |
| 5330617 | Method for etching integrated-circuit layers to a fixed depth and corresponding integrated circuit The invention relates to a method for etching an integrated-circuit layer to a fixed depth. The method consists in depositing onto the layer to be etched a protective layer forming a stop layer and then onto the latter a reference layer made of a material... | 07/19/1994 |
| 5298790 | Reactive ion etching buffer mask An improved mask and method of forming a deep and width trench in a substrate and the resulting structure is disclosed. A substrate material such as silicon has deposited thereon a first layer of sacrificial material as a first component of an etch mask, ... | 03/29/1994 |
| 5281550 | Method for etching a deep groove in a silicon substrate In a method for etching a deep groove in a silicon substrate, an oxide mask is delineated according to the shape of the desired groove. The photoresist which served to form the oxide mask is removed. A new photoresist layer is deposited and etched to defi... | 01/25/1994 |
| 5266518 | Method of manufacturing a semiconductor body comprising a mesa In the method according to the invention, the upper and thicker of two semiconductor layers is etched by means of a selective and preferential etchant, substantially no underetching occurring with respect to the mask. Subsequently, the lower and thinner s... | 11/30/1993 |
| 5240512 | Method and structure for forming a trench within a semiconductor layer of material A method and structure for forming a trench within a semiconductor layer (12) of material is provided. A first mask structure comprising a third insulating layer (20) and a fourth insulating layer (22) is formed adjacent a semiconductor layer (12). Sidewa... | 08/31/1993 |
| 5139964 | Method for forming isolation region of semiconductor device An improved LOCOS method for forming an isolation region with a higher breakdown voltage and a reduced width in a semiconductor device, comprising the steps of: (a) forming on a silicon substrate a silicon nitride layer having a predetermined pattern and ... | 08/18/1992 |
| 5131978 | Low temperature, single side, multiple step etching process for fabrication of small and large structures A fabrication process for wafer derived elements such as channel plates for thermal ink jet printers includes formation of a final etchant pattern in first and second masking layers. The second masking layer is a protective layer to prevent removal of the... | 07/21/1992 |
| 5120675 | Method for forming a trench within a semiconductor layer of material A method and structure for forming a trench within a semiconductor layer (12) of material is provided. A first mask structure comprising a third insulating layer (20) and a fourth insulating layer (22) is formed adjacent a semiconductor layer (12). Sidewa... | 06/09/1992 |
| 5110408 | Process for etching The present invention relates to the etching of a gate film, a tungsten film, a silicon film, etc. In the present invention, use is made of an etching gas comprising a mixture composed of a reductive fluoride gas, a hydrocarbon gas and a halogen gas havin... | 05/05/1992 |
| 5110407 | Surface fabricating device Anisotropic etching can be obtained in the direction of the incident heated beam of reactive gas with the introduction of a second material for controlling reactivity.... | 05/05/1992 |
| 5096846 | Method of forming a quantum effect switching device A method for forming a quantum effect switching device is disclosed which comprises the step of forming a heterostructure substrate 10. A silicon nitride layer 22 is formed on an outer surface of the substrate 10. An aluminum mask body 30 is formed using ... | 03/17/1992 |
| 5078833 | Dry etching method A dry etching process utilizes a gas to form a side wall protecting layer, which gas has added at least chlorine trifluoride, or in the alternative silicon and fluorine as component.... | 01/07/1992 |
| 5030316 | Trench etching process A trench etching process comprises the steps of: preparing a substrate, forming a mask pattern for the trench etching having a material different from that of the substrate, on the substrate, and detecting changes in results of emission spectroanalyses ge... | 07/09/1991 |
| 5010378 | Tapered trench structure and process A plasma dry etch process for etching deep trenches in single crystal silicon material with controlled wall profile, for trench capacitors or trench isolation structures. HCl is used as an etchant under RIE conditions with a SiO2 hard mask. The... | 04/23/1991 |
| 5006202 | Fabricating method for silicon devices using a two step silicon etching process Disclosed is a method of fabricating a precision etched, three dimensional device from a silicon wafer, wherein the etching is done from one side of the wafer using a two step silicon etching process. A two-sided deposition of a robust protective layer, s... | 04/09/1991 |
| 5004703 | Multiple trench semiconductor structure method A method of fabricating multiple trench semiconductor structures wherein a preferred embodiment includes forming an epitaxial silicon layer on a silicon substrate and a dielectric layer on the epitaxial silicon layer. An opening is then formed which exten... | 04/02/1991 |
| 4999312 | Doping method using an oxide film and a nitride film on the trench wall to manufacture a semiconductor device and the manufactured device A doping method using an oxide film and a nitride film on a trench wall as a protective film to prevent the impurity from diffusing into the silicon wafer adjacent to the outer wall and to enable the formation of a substantially flat interface between the... | 03/12/1991 |
