Class 257/E21.22 - Etching of Group III-V compound (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.219. This subclass
No. of patents: 111
Last issue date: 08/19/2008

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Number	Title	Issue Date
7413958	GaN-based permeable base transistor and method of fabrication An etched grooved GaN-based permeable-base transistor structure is disclosed, along with a method for fabrication of same. ...	08/19/2008
7405096	Manufacturing method of nitride semiconductor device and nitride semiconductor device Provided is a manufacturing method of a nitride semiconductor device having a nitride semiconductor substrate (e.g. GaN substrate) in which dislocation concentrated regions align in stripe formation, the dislocation concentrated regions extending from a front surfac...	07/29/2008
7371694	Semiconductor device fabrication method and fabrication apparatus The flatness of the surface of a Si substrate is requested as the present gate length is miniaturized. The present invention is a semiconductor device fabrication method for flattening a silicon surface by continuously supplying a high-temperature fluoride ammonium ...	05/13/2008
7316961	Method of manufacturing semiconductor device Provided is a method of manufacturing a semiconductor device with enhancements of electrical characteristics. The method includes sequentially forming a lower electrode and an insulating layer on a semiconductor substrate, dry-etching a region of the insulating laye...	01/08/2008
7282455	Method of producing a diffraction grating In an embodiment, a method of producing a diffraction grating comprises steps of: forming, on a man surface of a first member, a first mask having a plurality of resist patterns arranged at a Bragg diffraction period; etching the first member by use of the first mas...	10/16/2007
7259080	Glass-type planar substrate, use thereof, and method for the production thereof The invented method is distinguished by a combination of the following method steps: provision of a semiconductor planar substrate composed of a semiconductor material, reduction of the thickness of the semiconduct...	08/21/2007
7202122	Cobalt silicidation process for substrates with a silicon—germanium layer A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a...	04/10/2007
6703639	Nanofabrication for InAs/AlSb heterostructures A heterostructure comprising: a buffer layer; a bottom barrier layer formed on the buffer layer; a quantum well layer formed on the bottom barrier layer; a top barrier layer formed on the quantum well layer; and a p-doped cap layer formed on the top barri...	03/09/2004
6524899	Process for forming a large area, high gate current HEMT diode A method of manufacturing a HEMT IC using a citric acid etchant. In order that gates of different sizes may be formed with a single etching step, a citric acid etchant is used which includes potassium citrate, citric acid and hydrogen peroxide. The wafer ...	02/25/2003
6239033	Manufacturing method of semiconductor device After making a GaN FET by growing GaN semiconductor layers on the surface of a sapphire substrate, the bottom surface of the sapphire substrate is processed by lapping, using an abrasive liquid containing a diamond granular abrasive material and reducing ...	05/29/2001
6235547	Semiconductor device and method of fabricating the same In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave secti...	05/22/2001
6103542	Method of manufacturing an optoelectronic semiconductor device comprising a mesa An optoelectronic device, such as a laser of the ridge waveguide type, can be provided with the necessary mesa (14) by means of wet or dry etching with a mask (20). The etching process is stopped when an etching stopper layer (5) is reached. A laser obtai...	08/15/2000
6093657	Fabrication process of semiconductor device A compound semiconductor wafer is dipped into water at a temperature of 5° C. for about 10 seconds to preliminarily adjust to a temperature substantially equal to a temperature of etching agent. Next, with taking a photoresist as a mask, etching is perfo...	07/25/2000
6083841	Method of etching gallium-nitride based compound semiconductor layer and method of manufacturing semiconductor light emitting device utilizing the same A GaN-based compound semiconductor layer is formed on a substrate. An etch mask of a Ti film is formed on a surface of said gallium-nitride based compound semiconductor. The gallium-nitride based compound semiconductor is selectively etched through an ope...	07/04/2000
6060402	Process for selective recess etching of epitaxial field effect transistors with a novel etch-stop layer A process for selective recess etching of GaAs field-effect transistors. A selected etch stop layer (Inx Ga1-x P) maintains what is commonly referred to as lattice-match with the GaAs substrate material. By using this etch stop, a si...	05/09/2000
6011271	Semiconductor device and method of fabricating the same In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave secti...	01/04/2000
6004881	Digital wet etching of semiconductor materials A room temperature wet chemical digital etching technique for, gallium arsenide or other semiconductor material. Hydrogen peroxide and an acid are used in a two step etching cycle to remove the gallium arsenide in approximately 15 Å limited increments. I...	12/21/1999
5923951	Method of making a flip-chip bonded GaAs-based opto-electronic device In a method of making a flip-chip bonded GaAs-based opto-electronic device, removal of the GaAs substrate is facilitated by provision of a lattice matched (Alx Ga1-x)InP etch stop layer, exemplarily a Ga0.51 In0.49	07/13/1999
5872022	Method for etching a semiconductor method for fabricating semiconductor device method for fabricating semiconductor laser and semiconductor laser A method of etching a III-V compound semiconductor uses an etching gas including the group V element of the III-V compound semiconductor substrate layer while keeping the III-V compound semiconductor layer at a temperature higher than the crystal growth t...	02/16/1999
5843849	Semiconductor wafer etching process and semiconductor device A first semiconductor layer and a second semiconductor layer are laminated on a semiconductor wafer in that order. A resist pattern having an opening is formed on the second semiconductor layer. The second semiconductor layer is etched through the opening...	12/01/1998
5824206	Photoelectrochemical etching of p-InP Photoelectrochemical etching of p-InP in various nitric acid solutions demonstrates that the semiconductor undergoes etching with favorable etch rates in the negative potential region. The etch rate increases with decreasing potentials to -1.0 V and exhib...	10/20/1998
5772907	Lactic acid treatment of InP materials The use of lactic acid or its derivative in compositions to etch or polish materials containing indium phosphide results in treated surfaces that have reduced surface roughness compared to the surfaces treated with compositions devoid of lactic acid or it...	06/30/1998
5770525	Method of fabricating semiconductor device and method of fabricating high-frequency semiconductor device A superlattice buffer layer, an AlGaAs layer, an InGaAs layer, an AlGaAs layer, and an N+GaAs layer are successively deposited on a GaAs layer by epitaxial growth. Using an electron-beam resist as a mask, a patterning layer in the form of an SiO2 film is ...	06/23/1998
5756403	Method of preferentially etching a semiconductor substrate with respect to epitaxial layers An etching composition and method for its use in etching a semiconductor structure, the semiconductor structure comprising a substrate and one or more epitaxial layers. The etching composition comprises a solvent, an etchant, and first and second complexi...	05/26/1998
5737351	Semiconductor laser including ridge structure extending between window regions A method of fabricating a semiconductor laser includes successively growing a lower cladding layer of a first conductivity type, an active layer having a superlattice structure, a first upper cladding layer of a second conductivity type, an etch stopping ...	04/07/1998
5641381	Preferentially etched epitaxial liftoff of InP material The present invention is directed toward a method of removing epitaxial substrates from host substrates. A sacrificial release layer of ternary material is placed on the substrate. A layer of InP is then placed on the ternary material. Afterward a layer o...	06/24/1997
5567659	Method of etching patterns in III-V material with accurate depth control A method of accurately controlling the depth of etched gratings in uniform or layered quaternary III-V material. A native oxide is selectively grown on the area of the quaternary to be patterned and this native oxide is subsequently removed to engrave the...	10/22/1996
5436201	Dual etchant process, particularly for gate recess fabrication in GaAs MMIC chips A semiconductor substrate is etched in a two-step sequence, with two different liquid etchants that have different lateral etch rates. The relative time periods for which the etchants are applied are selected to achieve a close match between the actual et...	07/25/1995
5435856	Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication A method is provided for forming selective electrical contacts on a structure of alternating ultrathin semiconductor layers of two different types, so that electrical connection can be made separately to the layers of a given type. Selective etching of fi...	07/25/1995
5419808	Etching solution and etching method for semiconductors An etchant includes an organic acid and hydrogen peroxide mixed in a volume ratio of 1:1 to 200:1 with a basic material added to adjust the pH. The etching solution presents an eminent difference in the etching rates between GaAs/AlGaAs, GaAs/InGaAs, AlGa...	05/30/1995
5411632	Method for the etching of a heterostructure of materials of the III-V group Disclosed is a method for the etching of at least two layers of semiconductor materials having different natures, with a view to making a mesa for the self-alignment of the metallizations of a transistor. The heterojunction must comprise a first layer of ...	05/02/1995
5374328	Method of fabricating group III-V compound A solution of hydrogen peroxide [H2 O2 ], citric acid [HOC(CH2 COOH)2 COOH.H2 O], and a salt of citric acid such as potassium citrate [HOC(CH2 COOK)2 COOK.H2 O], and h...	12/20/1994
5372675	Method for producing fine structure for electronic device In a method for producing a fine semiconductor structure, a first layer is formed on a second layer, an etching-resistant mask is formed on the first layer, the second layer is etched in an etchant to form a desired shape thereof, a composition of the fir...	12/13/1994
5334284	Surface treatment of indium phosphide utilizing chemical roughening of the surface A surface (30) of a wafer of indium phosphide (22) is treated by first etching the surface (30) with an aqueous solution of nitric acid and ceric ammonium nitrate. A toughening solution of about 4 parts by volume of acetic acid, about 4 parts by volume ni...	08/02/1994
5334865	MODFET structure for threshold control A MODFET structure having a semi-insulating substrate overlayed with an undoped semiconductor buffer layer of a first composition. The buffer layer is overlayed with an undoped semiconductor layer having a second composition different from the composition...	08/02/1994
5330932	Method for fabricating GaInP/GaAs structures In one form of the invention, a method is disclosed for removing portions of successive layers of GaAs 34 and GaInP 32 comprising the steps of: performing an anisotropic reactive ion etch on the GaAs layer; and performing an isotropic wet etch on the GaIn...	07/19/1994
5322814	Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication A method is provided for forming selective electrical contacts on a structure of alternating ultrathin semiconductor layers of two different types, so that electrical connection can be made separately to the layers of a given type. Selective etching of fi...	06/21/1994
5279704	Method of fabricating semiconductor device A wafer comprising a GaAs substrate and an AlGaAs layer deposited thereon is rotated in a spin etching process. To the GaAs substrate of the rotating wafer, there is supplied an ammoniacal etching solution for selectively etching the GaAs substrate to for...	01/18/1994
5272105	Method of manufacturing an heteroepitaxial semiconductor structure Heteroepitaxial semiconductor structures of, for example, GaAs on InP or Si. The epitaxially grown GaAs is in the form of individual spaced-apart islands having maximum dimensions in the plane of the surface of the substrate of no greater than 10 micromet...	12/21/1993
5270245	Method of forming a light emitting diode A method of forming a III-V semiconductor device (10, 20) utilizes a III-V semiconductor substrate (11) having a plurality of III-V semiconductor layers (12, 14, 15, 16, 17). A pattern layer ( 19, 24) is formed on the plurality of layers (12, 14, 15, 16, ...	12/14/1993

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Class 257/E21.22 - Etching of Group III-V compound (EPO)