Celebrity Inventors
Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Number | Title | Issue Date |
| 7443001 | Preparation of microelectromechanical system device using an anti-stiction material and selective plasma sputtering A method for preparing a microelectromechanical system (MEMS) device for subsequent processing is disclosed. The method includes establishing an anti-stiction material on exposed surfaces of the MEMS device. The exposed surfaces include at least an interior surface ... | 10/28/2008 |
| 7439185 | Method for fabricating semiconductor device and semiconductor device A method of fabricating a semiconductor device having an air-gapped multilayer interconnect wiring structure is disclosed. After having formed a first thin film on or above a substrate, define a first opening in the first thin film. Then, deposit a conductive materi... | 10/21/2008 |
| 7435674 | Dielectric interconnect structures and methods for forming the same Dielectric interconnect structures and methods for forming the same are provided. Specifically, the present invention provides a dielectric interconnect structure having a noble metal layer (e.g., Ru, Ir, Rh, Pt, RuTa, and alloys of Ru, Ir, Rh, Pt, and RuTa) that is... | 10/14/2008 |
| 7435681 | Methods of etching stacks having metal layers and hard mask layers Methods which comprise: providing a stack to be etched, the stack comprising a metal interconnect layer disposed above a substrate, a barrier layer disposed above the metal interconnect layer, a hard mask layer disposed on the barrier layer, and a patterning layer d... | 10/14/2008 |
| 7432208 | Method of manufacturing suspension structure A method of manufacturing a suspension structure including providing a substrate, forming a first photoresist pattern on the substrate, heating the first photoresist pattern to harden it as a sacrificial layer, forming a second photoresist pattern on the substrate a... | 10/07/2008 |
| 7427519 | Method of detecting end point of plasma etching process A method of detecting an end point of a plasma etching process for etching a first layer on a second layer is described, the first layer producing a first etching product and the second layer a second etching product. Time-dependent intensity [Ij=1 to m(t... | 09/23/2008 |
| 7427559 | Method of reducing the surface roughness of spin coated polymer films According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer ... | 09/23/2008 |
| 7416987 | Semiconductor device and method of fabricating the same According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectr... | 08/26/2008 |
| 7405484 | Semiconductor device containing stacked semiconductor chips and manufacturing method thereof An adhesive film is formed on an electrode film, and a coating film is formed thereon. Nickel, chrome, molybdenum, tungsten, aluminum or an alloy of them is used as a constituent material of the adhesive film. Gold, silver, platinum or an alloy of them is used as a ... | 07/29/2008 |
| 7396725 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming an insulating layer, a first conductive layer, a dielectric layer and a capping conductive layer over a semiconductor substrate in which a cell region is defined. The capping conductive layer and the ... | 07/08/2008 |
| 7393746 | Post-silicide spacer removal A method forms a gate conductor over a substrate, forms spacers (e.g., nitride spacers) on sides of the gate conductor, and implants an impurity into exposed regions of the substrate not protected by the gate conductor and the spacers. Then the method forms a silici... | 07/01/2008 |
| 7378703 | Semiconductor device having step gates and method for fabricating the same The semiconductor device includes a substrate including a first active region and a second active region having a greater height than that of the first active region. A gate pattern has a step structure, which is formed on a border region between the first active re... | 05/27/2008 |
| 7371692 | Method for manufacturing a semiconductor device having a W/WN/polysilicon layered film A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first e... | 05/13/2008 |
| 7371689 | Backside unlayering of MOSFET devices for electrical and physical characterization A method and system for backside unlayering a semiconductor device to expose FEOL semiconductor features of the device for subsequent electrical and/or physical probing. A window is formed within a backside substrate layer of the semiconductor. A collimated ion plas... | 05/13/2008 |
| 7371688 | Removal of transition metal ternary and/or quaternary barrier materials from a substrate A process for the selective removal of a substance from a substrate for etching and/or cleaning applications is disclosed herein. In one embodiment, there is provided a process for removing a substance from a substrate comprising: providing the substrate having the ... | 05/13/2008 |
| 7338887 | Plasma control method and plasma control apparatus A method that controls the distribution of plasma generated in a vacuum chamber, for example, as part of a plasma thin film deposition or plasma etching process. For thin film deposition, the method serves to minimize variations in film thickness caused by the varia... | 03/04/2008 |
| 7294552 | Electrical contact for a MEMS device and method of making A method for making a subsurface electrical contact on a micro-electrical-mechanical-systems (MEMS) device. The contact is formed by depositing a layer of polycrystalline silicon onto a surface within a cavity buried under a device silicon layer. The polycrystalline... | 11/13/2007 |
| 7288458 | SOI active layer with different surface orientation A wafer having an SOI configuration and active regions having different surface orientations for different channel type transistors. In one example, semiconductor structures having a first surface orientation are formed on a donor wafer. Semiconductor structures hav... | 10/30/2007 |
| 7288484 | Photoresist strip method for low-k dielectrics The present invention pertains to methods for removing unwanted material from a semiconductor wafer during wafer manufacturing. More specifically, the invention pertains to stripping photo-resist material and removing etch-related residues from a semiconductor wafer... | 10/30/2007 |
| 7285497 | Mask, method for manufacturing a mask, method for manufacturing an electro-optical device, and electronic equipment A mask includes a silicon member, and a portion defining an opening penetrating the silicon member; and the corner of the opening is rounded. ... | 10/23/2007 |
| 7282425 | Structure and method of integrating compound and elemental semiconductors for high-performance CMOS A method for fabricating a semiconductor substrate includes epitaxially growing an elemental semiconductor layer on a compound semiconductor substrate. An insulating layer is deposited on top of the elemental semiconductor layer, so as to form a first substrate. The... | 10/16/2007 |
| 7276794 | Junction-isolated vias A process for forming a junction-isolated, electrically conductive via in a silicon substrate and a conductive apparatus to carry electrical signal from one side of a silicon wafer to the other side are provided. The conductive via is junction-isolated from the bulk... | 10/02/2007 |
| 7271063 | Method of forming FLASH cell array having reduced word line pitch A method of forming a NAND Flash memory device includes forming a control gate polysilicon layer over a substrate, forming a mask layer over the control gate polysilicon layer, the mask layer including a mask pattern defining a plurality of spaced word lines of the ... | 09/18/2007 |
| 7256111 | Pretreatment for electroless deposition Embodiments of the present invention relate to an apparatus and method of annealing substrates in a thermal anneal chamber and/or a plasma anneal chamber before electroless deposition thereover. In one embodiment, annealing in a thermal anneal chamber includes heati... | 08/14/2007 |
| 7253092 | Tungsten plug corrosion prevention method using water Disclosed herein is a method of making integrated circuits. In one embodiment the method includes forming tungsten plugs in the integrated circuit and forming electrically conductive interconnect lines in the integrated circuit after formation of the tungsten plugs.... | 08/07/2007 |
| 7241639 | Color filter, manufacturing method thereof, electrooptical device and electronic equipment A method for manufacturing a color filter having a picture element part surrounded by a partition wall and provided in the plural number on a substrate including a step of forming the partition wall that has a lyophobic quality on the substrate, step of forming a ly... | 07/10/2007 |
| 7241670 | Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen A method of forming a relaxed SiGe layer having a high germanium content in a semiconductor device includes preparing a silicon substrate; depositing a strained SiGe layer; implanting ions into the strained SiGe layer, wherein the ions include silicon ions and ions ... | 07/10/2007 |
| 7235420 | Process for removing an organic layer during fabrication of an organic electronic device and the organic electronic device formed by the process A process for forming an organic electronic device includes the steps of: (a) forming a first conductive member and a conductive lead over a substrate, wherein the first conductive member and conductive lead are spaced apart from each other; (b) forming an organic l... | 06/26/2007 |
| 7232767 | Slotted electrostatic shield modification for improved etch and CVD process uniformity A more uniform plasma process is implemented for treating a treatment object using an inductively coupled plasma source which produces an asymmetric plasma density pattern at the treatment surface using a slotted electrostatic shield having uniformly spaced-apart sl... | 06/19/2007 |
| 7232772 | Substrate processing method A substrate processing method comprises the step of forming an oxide film on a silicon substrate surface, and introducing nitrogen atoms into the oxide film by exposing the oxide film to nitrogen radicals excited in plasma formed by a microwave introduced via a plan... | 06/19/2007 |
| 7232746 | Method for forming dual damascene interconnection in semiconductor device A method for forming a dual damascene interconnection in a semiconductor device, which is capable of preventing a lower metal film from being corroded. The method includes the steps of forming an etch stop film and an intermetal insulating film sequentially on a low... | 06/19/2007 |
| 7226870 | Forming of oblique trenches A method for forming an oblique recess of minimum dimension smaller than 10 μm in a wafer arranged in a plasma etch reactor in which the plasma extends along the wafer surface, including forming discontinuities in the contour of the plasma and of its sheath in the ... | 06/05/2007 |
| 7223700 | Method for fabricating fine features by jet-printing and surface treatment A method and system for masking a surface to be etched is described. The method includes the operation of heating a phase-change masking material and using a droplet source to eject droplets of a masking material for deposit on a thin-film or other substrate surface... | 05/29/2007 |
| 7217666 | Reactive ion milling/RIE assisted CMP A method for forming a high aspect ratio magnetic structure in a magnetic write head using a combination of chemical mechanical polishing and reactive ion etching. ... | 05/15/2007 |
| 7215006 | Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provi... | 05/08/2007 |
| 7205250 | Plasma processing method and apparatus A Plasma processing method and apparatus exhibit excellent characteristics of reducing the amount of electric charge on a plasma-processed processing-object substrate and of preventing plasma damage and dielectric breakdown. Before the processing-object substrate is... | 04/17/2007 |
| 7189655 | Method of correcting amplitude defect in multilayer film of EUVL mask By entering a low acceleration Si ion beam of 500 V or lower or a low acceleration Si ion beam of 500 V-2000 V having been slanted such that an injection depth becomes shallow, which has been mass-separated from a liquid alloy ion source containing Si by a mass sepa... | 03/13/2007 |
| 7166488 | Metal MEMS devices and methods of making same Metal MEMS structures are fabricated from metal substrates, preferably titanium, utilizing micromachining processes with a new deep etching procedure to provide released microelectromechanical devices. The deep etch procedure includes metal anisotropic reactive ion ... | 01/23/2007 |
| 7163896 | Biased Hetch process in deposition-etch-deposition gap fill Biased plasma etch processes incorporating H2 etch chemistries. In particular, high density plasma chemical vapor etch-enhanced (deposition-etch-deposition) gap fill processes incorporating etch chemistries which incorporate hydrogen as the etchant that c... | 01/16/2007 |
| 7148125 | Method for manufacturing semiconductor power device A semiconductor device, which has a relatively low ON resistance, is manufactured using the following steps. First, a semiconductor wafer that includes a semiconductor layer and a semiconductor element layer, which is located on the semiconductor layer, is formed. T... | 12/12/2006 |
