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| Number | Title | Issue Date |
| 7436075 | Ion beam irradiation apparatus and ion beam irradiation method The ion beam irradiation apparatus has a vacuum chamber 10, an ion source 2, a substrate driving mechanism 30, rotation shafts 14, arms 12, and a motor. The ion source 2 is disposed inside the vacuum chamber 10, and e... | 10/14/2008 |
| 7429526 | Method of forming silicide gate with interlayer A field-effect transistor (“FET”) or similar device has a fully silicided (“FUSI”) gate electrode. The gate electrode has a gate interface silicide portion between the gate dielectric and a bulk gate silicide portion. The gate interface silicide is formed by... | 09/30/2008 |
| 7399670 | Methods of forming different gate structures in NMOS and PMOS regions and gate structures so formed A method of forming transistor gate structures in an integrated circuit device can include forming a high-k gate insulating layer on a substrate including a first region to include PMOS transistors and a second region to include NMOS transistors. A polysilicon gate ... | 07/15/2008 |
| 7358181 | Method for structuring a semiconductor device A method for structuring a laterally extending first layer in a semiconductor device with the aid of a reactive second layer, which together with the first layer to be structured forms first reaction products, which products are removed by material removal that acts... | 04/15/2008 |
| 7341933 | Method for manufacturing a silicided gate electrode using a buffer layer The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit. The method for manufacturing the semiconductor device, among other steps, includes providing a capped polysilicon gate electrode ( | 03/11/2008 |
| 7271455 | Formation of fully silicided metal gate using dual self-aligned silicide process An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the thickness of the silicided source/drain regions is provided. A method of for... | 09/18/2007 |
| 7256123 | Method of forming an interface for a semiconductor device In a semiconductor device using a polysilicon contact, such as a poly plug between a transistor and a capacitor in a container cell, an interface is provided where the poly plug would otherwise contact the bottom plate of the capacitor. The interface bars silicon fr... | 08/14/2007 |
| 7256125 | Method of manufacturing a semiconductor device For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a polycrystalline silicon film, a tungsten silicide film and an insulating film s... | 08/14/2007 |
| 7235472 | Method of making fully silicided gate electrode A method of making a semiconductor device for an integrated circuit chip. An interim gate electrode stack formed includes a top silicon portion patterned from a second silicon layer, a sandwiched oxide portion patterned from an etch stop oxide layer, and a bottom si... | 06/26/2007 |
| 7220662 | Fully silicided field effect transistors Fully silicided planar field effect transistors are formed by avoiding the conventional chemical-mechanical polishing step to expose the silicon gate by etching the sidewalls down to the silicon; depositing a sacrificial oxide layer thinner on the top of gate and si... | 05/22/2007 |
| 7208409 | Integrated circuit metal silicide method Fluorine containing regions (70) are formed in the source and drain regions (60) of the MOS transistor. A metal layer (90) is formed over the fluorine containing regions (70) and the source and drain regions (60). The metal layer i... | 04/24/2007 |
| 7183187 | Integration scheme for using silicided dual work function metal gates The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device, among other possible steps, includes form... | 02/27/2007 |
| 6794713 | Semiconductor device and method of manufacturing the same including a dual layer raised source and drain SiGe or SiC films are selectively grown on source/drain regions, followed by selectively growing silicon. A monocrystalline film having a high dislocation density or a polycrystalline film can be grown in growing the silicon film by making the C or Ge concentration ... | 09/21/2004 |
| 6664154 | Method of using amorphous carbon film as a sacrificial layer in replacement gate integration processes An exemplary embodiment relates to a method of using amorphous carbon in replacement gate integration processes. The method can include depositing an amorphous carbon layer above a substrate, patterning the amorphous carbon layer, depositing a dielectric ... | 12/16/2003 |
| 6635570 | PECVD and CVD processes for WNx deposition Improvements to chemical vapor deposition processes are taught for depositing tungsten nitride in semiconductor manufacturing processes. In one irmproved process NF3 is used as a source of nitrogen, and a plasma is introduced under controlled c... | 10/21/2003 |
| 6632731 | Structure and method of making a sub-micron MOS transistor A method of fabricating a sub-micron MOS transistor includes preparing a substrate, including isolating an active region therein; depositing a gate oxide layer; depositing a first selective etchable layer over the gate oxide layer; depositing a second sel... | 10/14/2003 |
| 6613654 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6614082 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6518154 | Method of forming semiconductor devices with differently composed metal-based gate electrodes MOS transistors and CMOS devices comprising a plurality of transistors including metal-based gate electrodes of different composition are formed by a process comprising: depositing a first blanket layer of a first metal on a thin gate insulator layer exte... | 02/11/2003 |
| 6475874 | Damascene NiSi metal gate high-k transistor A method for implementing a self-aligned low temperature metal silicide gate is achieved by confining amorphous silicon within a recess overlying a channel and annealing to cause the amorphous silicon with its overlying low temperature silicidation metal ... | 11/05/2002 |
| 6465309 | Silicide gate transistors A semiconductor structure and method for making the same provides a gate dielectric formed of oxynitride or a nitride/oxide stack formed within a recess. Amorphous silicon is deposited on the gate dielectric within the recess and a metal is deposited on t... | 10/15/2002 |
| 6372563 | Self-aligned SOI device with body contact and NiSi2 gate A self-aligned SOI device with body contact and silicide gate. The SOI device is formed using an ordinary substrate such as silicon. A silicide gate is self-aligned and formed from re-crystallization of nickel and amorphous silicon. The self-aligned silic... | 04/16/2002 |
| 6368950 | Silicide gate transistors A method for implementing a self-aligned metal silicide gate is achieved by confining amorphous silicon within a recess overlying a channel and annealing to cause the amorphous silicon with its overlying metal to interact to form the self-aligned metal si... | 04/09/2002 |
| 6342414 | Damascene NiSi metal gate high-k transistor A method for implementing a self-aligned low temperature metal silicide gate is achieved by confining a low temperature silicidation metal within a recess overlying a channel and annealing to cause the low temperature silicidation metal and its overlying ... | 01/29/2002 |
| 6339246 | Tungsten silicide nitride as an electrode for tantalum pentoxide devices The specification describes a process for making gate electrodes for silicon MOS transistor devices having tantalum pentoxide gate dielectrics. The gate electrode includes a layer of tungsten silicide, and, preferably a layer of tungsten suicide nitride. ... | 01/15/2002 |
| 6284636 | Tungsten gate method and apparatus A tungsten gate electrode and method of fabricating the same are provided. In one aspect, a method of fabricating a gate electrode stack on a substrate is provided that includes forming an insulating film on the substrate and forming a conductor film on t... | 09/04/2001 |
| 6274421 | Method of making metal gate sub-micron MOS transistor A MOS transistor is formed on a single crystal silicon substrate doped to form a conductive layer of a first type, and includes: an active region formed on said substrate; a source region and a drain region located in said active region, doped to form con... | 08/14/2001 |
| 6265749 | Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant A transistor is provided having a metal silicide gate spaced above a semiconductor substrate by a high-dielectric-constant ceramic gate dielectric. The entire gate conductor is preferably composed of a metal silicide. In an embodiment, the metal silicide ... | 07/24/2001 |
| 6239452 | Self-aligned silicide gate technology for advanced deep submicron MOS device A deep submicron MOS device having a self-aligned silicide gate structure and a method for forming the same is provided so as to overcome the problems of poly-Si depletion and boron penetration. A first Nickel silicide layer is formed between a gate oxide... | 05/29/2001 |
| 6228724 | Method of making high performance MOSFET with enhanced gate oxide integration and device formed thereby Transistors formed according to the present invention include an oxide layer/nitride layer gate insulator and a silicide gate conductor. An oxide layer is formed to a thickness of between 15 and 25 Angstroms across a substrate and partially removed so tha... | 05/08/2001 |
| 6211000 | Method of making high performance mosfets having high conductivity gate conductors A method of fabricating an integrated circuit includes forming a gate stack upon an active region of a substrate which includes a gate dielectric, a polysilicon gate conductor and a polysilicon consumption metal layer portion. The polysilicon consumption ... | 04/03/2001 |
| 6204173 | Multiple implantation and grain growth method A method of controlling stresses in thin films that are deposited over semiconductor device substrates. During anneal process steps, grain growth of the film creates stresses in that can damage or destroy it. The stresses lead to warping and bowing and ul... | 03/20/2001 |
| 6103607 | Manufacture of MOSFET devices The specification describes a process for making gate electrodes for silicon MOS transistor devices. The gate electrode is a composite of a first layer of tungsten suicide, a second layer of tungsten silicide nitride, and a third layer of tungsten silicid... | 08/15/2000 |
| 6100173 | Forming a self-aligned silicide gate conductor to a greater thickness than junction silicide structures using a dual-salicidation process An integrated circuit fabrication process is provided for using a dual salicidation process to form a silicide gate conductor to a greater thickness than silicide structures formed upon source and drain regions of a transistor. A high K gate dielectric re... | 08/08/2000 |
| 6091123 | Self-aligned SOI device with body contact and NiSi2 gate A self-aligned SOI device with body contact and silicide gate. The SOI device is formed using an ordinary substrate such as silicon. A silicide gate is self-aligned and formed from re-crystallization of nickel and amorphous silicon. The self-aligned silic... | 07/18/2000 |
| 6078089 | Semiconductor device having cobalt niobate-metal silicide electrode structure and process of fabrication thereof A semiconductor device having a cobalt niobate-cobalt silicide gate electrode structure is provided. A semiconductor device, consistent with one embodiment of the invention, is formed by forming a cobalt niobate gate insulating layer over the substrate an... | 06/20/2000 |
| 6057576 | Inverse-T tungsten gate apparatus A technique for fabricating an integrated circuit device 100 using an inverse-T tungsten gate structure 121 overlying a silicided layer 119 is provided. This technique uses steps of forming a high quality gate oxide layer 115 overlying a semiconductor sub... | 05/02/2000 |
| 6054744 | Metal silicide film stress control by grain boundary stuffing A method of controlling stresses in thin films that are deposited over semiconductor device substrates. During anneal process steps, grain growth of the film creates stresses in that can damage or destroy it. The stresses lead to warping and bowing and ul... | 04/25/2000 |
| 5943596 | Fabrication of a gate electrode stack using a patterned oxide layer A semiconductor device having a gate electrode stack formed using a patterned oxide layer is disclosed. The device is formed by forming an oxide layer over a surface of a substrate and forming at least one opening in the oxide layer. A high permittivity p... | 08/24/1999 |
| 5937315 | Self-aligned silicide gate technology for advanced submicron MOS devices A deep submicron MOS device having a self-aligned silicide gate structure and a method for forming the same is provided so as to overcome the problems of poly-Si depletion and boron penetration. A first Nickel silicide layer is formed between a gate oxide... | 08/10/1999 |
