Class 257/E21.194 - Characterized by treatment after formation of definitive gate conductor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.193. This subclass
No. of patents: 193
Last issue date: 10/28/2008

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Number	Title	Issue Date
7442983	Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperat...	10/28/2008
7300833	Process for producing semiconductor integrated circuit device When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WNx film and a W film are stacked on a polysilicon film, a wafer 1 is heated and c...	11/27/2007
7268047	Semiconductor device and method for manufacturing the same A gate insulating film on a silicon substrate of includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the t...	09/11/2007
7189623	Semiconductor processing method and field effect transistor A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed ...	03/13/2007
7105411	Methods of forming a transistor gate A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer are formed ...	09/12/2006
6703327	High-pressure anneal process for integrated circuits An improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of the chamber reduces the ...	03/09/2004
6703326	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized, sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of...	03/09/2004
6703325	High pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of ...	03/09/2004
6700170	Insulated gate transistor having a gate insulator containing nitrogen atoms and fluorine atoms An insulated gate transistor in which nitride oxide film having a nitrogen concentration of 1×1020 (/cm3) or more and containing a halogen element is used as a gate insulator. Because the gate insulator has a nitrogen concentration ...	03/02/2004
6693048	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of ...	02/17/2004
6693313	Field effect transistors, field effect transistor assemblies, and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a...	02/17/2004
6680244	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device comprises the steps of forming a gate oxide film on a surface of a semiconductor substrate, subjecting the gate oxide film to a nitriding treatment, forming a gate electrode film over the surface of the se...	01/20/2004
6673726	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of ...	01/06/2004
6674151	Deuterium passivated semiconductor device having enhanced immunity to hot carrier effects A semiconductor device having trap sites passivated with deuterium has enhanced immunity to hot carrier effects. The trap sites which are passivated with deuterium are encapsulated beneath a barrier film and are therefore resistant to having the deuterium...	01/06/2004
6670289	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized, sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of...	12/30/2003
6660587	Method for forming a gate electrode in a semiconductor device A semiconductor device and method of production are disclosed, the method including forming a preliminary gate electrode on a semiconductor substrate, the preliminary gate electrode including a gate oxide layer pattern and a conductive layer pattern stack...	12/09/2003
6632729	Laser thermal annealing of high-k gate oxide layers A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate having a surface; (b) forming a gate oxide layer on at least a portion of the surface and including an interface therewith, the gate oxide lay...	10/14/2003
6624052	Process for annealing semiconductors and/or integrated circuits A method of making a semiconductor structure, includes annealing a structure in a deuterium-containing atmosphere. The structure includes (i) a substrate, (ii) a gate dielectric on the substrate, (iii) a gate on the gate dielectric, (iv) an etch-stop laye...	09/23/2003
6603181	MOS device having a passivated semiconductor-dielectric interface A MOS structure processed to have a semiconductor-dielectric interface that is passivated to reduce the interface state density. An example is a MOSFET having a gate dielectric on which an electrode is present that is substantially impervious to molecular...	08/05/2003
6593181	Tailored insulator properties for devices A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains ...	07/15/2003
6593196	Methods of forming a transistor gate A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate oxide layer. In another method, a gate and a gate oxide layer ...	07/15/2003
6579767	Method for forming aluminum oxide as a gate dielectric A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. A thin SiO2 layer is thermally grown on top of the semiconductor device by using a wet H2 /O2	06/17/2003
6576522	Methods for deuterium sintering A method for deuterium sintering to improve the hot carrier aging of an integrated circuit includes (a) providing a partially fabricated integrated circuit structure comprising a semiconductor substrate and a dielectric layer formed on at least a portion ...	06/10/2003
6544908	Ammonia gas passivation on nitride encapsulated devices A method for passivating at least interfaces between structures formed from a material including silicon and adjacent dielectric structures so as to reduce a concentration of dangling silicon bonds at these interfaces and to reduce or eliminate the occurr...	04/08/2003
6541373	Manufacture method for semiconductor with small variation in MOS threshold voltage After a MOS type transistor is formed on the surface of a semiconductor substrate, an interlayer insulating film covering the transistor is formed. The insulating film includes a silicon oxide film made of hydrogen silsesquioxane resin in a ceramic state....	04/01/2003
6525380	CMOS with a fixed charge in the gate dielectric A semiconductor device--which includes surface-type n-channel and p-channel single gate transistors by formation of fixed charges within a gate oxide film--and a manufacturing method therefor. A voltage is applied between an electrode connected to a gate ...	02/25/2003
6521544	Method of forming an ultra thin dielectric film A method of forming an ultra thin dielectric film or dielectric layer on a semiconductor device is disclosed. In one embodiment of the present invention, an oxide layer is formed over a substrate. A silicon-containing material is deposited over the oxide ...	02/18/2003
6521527	Semiconductor device and method of fabricating the same Obtained are a semiconductor device which can prevent diffusion of an impurity contained in a gate electrode and a method of fabricating the same. In this semiconductor device, a gate oxide film and a P+ -type gate electrode which are formed on...	02/18/2003
6500740	Process for fabricating semiconductor devices in which the distribution of dopants is controlled In accordance with the invention, a silicon gate field effect device is provided with improved control over the distribution of dopants by forming thin buried layer of oxide within the silicon gate. In essence, a silicon gate device is fabricated by the s...	12/31/2002
6498378	Methods of forming field effect transistors and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a...	12/24/2002
6492285	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of ...	12/10/2002
6486030	Methods of forming field effect transistors and integrated circuitry including TiN gate element The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a...	11/26/2002
6483172	Semiconductor device structure with hydrogen-rich layer for facilitating passivation of surface states A process for fabricating a device including the step of forming a structure for facilitating the passivation of surface states is disclosed. The structure comprises an oxynitride layer formed as part of the device structure. The oxynitride facilitates th...	11/19/2002
6451676	Method for setting the threshold voltage of a MOS transistor A method for setting the threshold voltage of a MOS transistor having a gate composed of polysilicon includes the step of implanting germanium ions into the gate composed of polysilicon in order to change the work function of the gate....	09/17/2002
6444533	Semiconductor devices and methods for same Described are preferred processes for conditioning semiconductor devices with deuterium to improve operating characteristics and decrease depassivation which occurs during the course of device operation. Also described are semiconductor devices which can ...	09/03/2002
6440829	N-profile engineering at the poly/gate oxide and gate oxide/SI interfaces through NH3 annealing of a layered poly/amorphous-silicon structure A method and structure providing N-profile engineering at the poly/gate oxide and gate oxide/Si interfaces of a layered polysilicon/amorphous silicon structure of a semiconductor device. NH3 annealing provides for the introduction of nitrogen t...	08/27/2002
6436799	Process for annealing semiconductors and/or integrated circuits A method of making a semiconductor structure, includes annealing a structure in a deuterium-containing atmosphere. The structure includes (i) a substrate, (ii) a gate dielectric on the substrate, (iii) a gate on the gate dielectric, (iv) an etch-stop laye...	08/20/2002
6432786	Method of forming a gate oxide layer with an improved ability to resist the process damage A method of forming a gate oxide layer with improved ability to resist process damage increases the reliability and yield of a transistor device. First, a nitrogen-containing gate oxide layer is formed on an element area of a silicon substrate. Then, a po...	08/13/2002
6420236	Hydrogen treatment for threshold voltage shift of metal gate MOSFET devices A system for producing metal gate MOSFETs having relatively low threshold voltages is disclosed, comprising the steps of forming 200 a gate oxide layer on a semiconductor substrate, forming 210 a dummy gate on the substrate, removing 260 the dummy gate af...	07/16/2002
6410382	Fabrication method of semiconductor device A fabrication method of a semiconductor device improves the hot carrier immunity and prevents the deterioration of electrical characteristics of p-channel transistors. The fabrication method of the semiconductor device includes: sequentially forming a gat...	06/25/2002

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Class 257/E21.194 - Characterized by treatment after formation of definitive gate conductor (EPO)