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Napoleon Bonaparte ; When told of the Robert Fulton steamboat
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| Number | Title | Issue Date |
| 7417321 | Via structure and process for forming the same Via structure and process flow for interconnection in a semiconductor product. A bottom metal layer is provided to represent a connection layer in the semiconductor product. An isolation layer on the bottom metal layer comprises a via hole exposing a portion of the ... | 08/26/2008 |
| 7393782 | Process for producing layer structures for signal distribution Structures for signal distribution are produced by applying a metallic seed layer over a semiconductor body. An insulating layer is applied over the metallic seed layer and openings in the insulating layer are produced by photolithographic patterning of the insulati... | 07/01/2008 |
| 7385290 | Electrochemical reaction cell for a combined barrier layer and seed layer Methods and apparatus for forming conductive interconnect layers useful in articles such as semiconductor chips, memory devices, semiconductor dies, circuit modules, and electronic systems. An electrochemical cell may be used in the reduction of oxides on a dual-pur... | 06/10/2008 |
| 7317253 | Cobalt tungsten phosphate used to fill voids arising in a copper metallization process A semiconductor device includes a substrate, at least one layer of functional devices formed on the substrate, a first dielectric layer formed over the functional device layer and a first trench/via located in the first dielectric layer. A copper conductor fills the... | 01/08/2008 |
| 7238615 | Formation method for metal element, production method for semiconductor device, production method for electronic device, semiconductor device, electronic device, and electronic equipment A metal element formation method includes a seed layer formation step for forming a seed layer on a treatment surface of a substrate, and a plating formation step for forming a plating layer on the seed layer, wherein in the seed layer formation step, a liquid repel... | 07/03/2007 |
| 7229853 | Method of making a semiconductor chip assembly using multiple etch steps to form a pillar after forming a routing line A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that... | 06/12/2007 |
| 7229916 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device is to be provided, which improves filling performance of a conductive layer to be formed by an electrolytic plating process in an interconnect trench or a via hole, and achieves a higher in-plane uniformity in bottom-... | 06/12/2007 |
| 7195700 | Method of electroplating copper layers with flat topography A method of electrochemically filling features on a wafer surface to form a substantially planar copper layer is provided. The features to be filled includes a first feature that is an unfilled feature with the smallest width and a second feature having the next lar... | 03/27/2007 |
| 7179741 | Electroless plating method and semiconductor wafer on which metal plating layer is formed It is an object of the present invention to provide a semiconductor wafer on which a thin, smooth, uniform and good adhesive electroless plating layer that can be suitable for a seed layer is formed, and to provide an electroless plating method which is suitable for... | 02/20/2007 |
| 7169705 | Plating method and plating apparatus A plating method is capable of depositing a plated film having excellent in-plane uniformity with respect to a thin seed layer and excellent embeddability with respect to fine damascene structures. The plating method includes: positioning an electric resistor betwee... | 01/30/2007 |
| 7064012 | Method of making a semiconductor chip assembly with a pillar and a routing line using multiple etch steps A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that... | 06/20/2006 |
| 6800950 | Microstructure array, mold for forming a microstructure array, and method of fabricating the same In a fabrication method of a microstructure array, such as a mold for forming a microlens array, a first insulating mask layer is formed on a conductive portion of s substrate, an array of openings for the microstructure array and at least an opening for an alignmen... | 10/05/2004 |
| 6703712 | Microelectronic device layer deposited with multiple electrolytes A microelectronic device (24) is formed by plating a layer of material (36) to fill a cavity (28) formed in a substrate (26). The layer of material has a plurality of regions (42, 44, 46) with respective chemical compositions formed by varying the chemica... | 03/09/2004 |
| 6699769 | Method for fabricating capacitor using electrochemical deposition and wet etching Provided is a method for fabricating a capacitor using an electrochemical deposition method and Ce(NH4)2 (NO3)6 solution. The method includes the steps of: a) forming a contact hole in an insulation layer on a s... | 03/02/2004 |
| 6699396 | Methods for electroplating large copper interconnects A method for forming conductive features in dielectric materials is disclosed which includes providing a dielectric layer and forming a release layer over the dielectric layer. Then a feature is defined into the each of the release layer and the dielectri... | 03/02/2004 |
| 6699373 | Apparatus for processing the surface of a microelectronic workpiece A reactor for plating a metal onto a surface of a workpiece is set forth. The reactor comprises a reactor bowl including an electroplating solution disposed therein and an anode disposed in the reactor bowl in contact with the electroplating solution. A c... | 03/02/2004 |
| 6695962 | Anode designs for planar metal deposits with enhanced electrolyte solution blending and process of supplying electrolyte solution using such designs An anode assembly by which a solution can be supplied to a surface of a semiconductor substrate includes a housing defining an internal housing volume into which the solution can flow. A closure is provided for the internal housing volume, and the solutio... | 02/24/2004 |
| 6695957 | Simultaneous electrical and fluid connection for anode A plating cell base design that utilizes a single connection that provides both fluid communication and electrical communication to the cell. The design eliminates many of the components previously necessary to effectuate fluid and electrical seals. With ... | 02/24/2004 |
| 6692629 | Flip-chip bumbing method for fabricating solder bumps on semiconductor wafer A flip-chip bumping method is proposed for the fabrication of solder bumps on a semiconductor wafer for flip-chip application. The proposed flip-chip bumping method is intended for use on a semiconductor wafer predefined with a plurality of chip regions w... | 02/17/2004 |
| 6682642 | Seed repair and electroplating bath Disclosed are compositions useful for repair and electroplating of seed layers. Also disclosed are methods of repairing and electroplating such seed layers.... | 01/27/2004 |
| 6680514 | Contact capping local interconnect A method and structure for forming a metallic capping interface between damascene conductive wires/studs and damascene conductive wiring line structures. The method forms a first insulative layer on a substrate layer, followed by forming damascene conduct... | 01/20/2004 |
| 6680540 | Semiconductor device having cobalt alloy film with boron In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barr... | 01/20/2004 |
| 6677233 | Material deposition from a liquefied gas solution Introduction of a liquefied gas solution for deposition of a material on a semiconductor substrate. The substrate can have a trench etched thereinto with the solution including ions of the material to be deposited in the trench. The substrate can have a b... | 01/13/2004 |
| 6676822 | Method for electro chemical mechanical deposition The present invention deposits a conductive material from an electrolyte solution to a predetermined area of a wafer. The steps that are used when making this application include applying the conductive material to the predetermined area of the wafer usin... | 01/13/2004 |
| 6673216 | Apparatus for providing electrical and fluid communication to a rotating microelectronic workpiece during electrochemical processing A method and apparatus for transmitting electrical signals and fluids to and/or from a microelectronic workpiece. An apparatus in accordance with one embodiment of the invention includes a shaft rotatable about a shaft axis and having a first end with a f... | 01/06/2004 |
| 6670271 | Growing a dual damascene structure using a copper seed layer and a damascene resist structure The present invention involves a method for fabricating interconnecting lines and vias. According to the invention, copper is grown from a seed layer to substantially fill openings in a two layer structure wherein the two layers are independently either d... | 12/30/2003 |
| 6666959 | Semiconductor workpiece proximity plating methods and apparatus The present invention relates to methods and apparatus for plating a conductive material on a semiconductor substrate by rotating pad or blade type objects in close proximity to the substrate, thereby eliminating/reducing dishing and voids. This is achiev... | 12/23/2003 |
| 6662673 | Linear motion apparatus and associated method A guide apparatus comprising a plurality of guide linkages. Each one of the plurality of guide linkages comprises a pair of linkage members, each pair of the linkage members are rotatably connected about a guide pivot axis. The guide pivot axis of each gu... | 12/16/2003 |
| 6664175 | Method of forming ruthenium interconnect for an integrated circuit A multi-layered metal bond pad for a semiconductor die having a conductive metal layer and an overlying ruthenium electrode layer. The ruthenium electrode layer protects the conductive metal from oxidation due to ambient environmental conditions. An inter... | 12/16/2003 |
| 6664633 | Alkaline copper plating A method for depositing a metal conduction layer in a feature of a substrate is provided. The method includes forming the feature in the substrate, the feature having a width dimension of less than about a tenth of a micron. A barrier layer is deposited o... | 12/16/2003 |
| 6660154 | Seed layer Disclosed are methods for repairing or enhancing discontinuous metal seed layers prior to subsequent metallization during the manufacture of electronic devices. Such repair methods do not require the use of a second electroplating bath.... | 12/09/2003 |
| 6660153 | Seed layer repair bath Disclosed are methods for repairing seed layers prior to subsequent metallization during the manufacture of electronic devices.... | 12/09/2003 |
| 6660941 | Electronic parts mounting board and production method thereof An electronic parts mounting board includes an electrode circuit base member having electrodes on at least one surface; projecting electrodes bonded to the electrodes of the electrode circuit base member; an insulating member provided on the electrode cir... | 12/09/2003 |
| 6660633 | Method of reducing electromigration in a copper line by electroplating an interim copper-zinc alloy thin film on a copper surface and a semiconductor device thereby formed A method of fabricating a semiconductor device, having an interim reduced-oxygen Cu-Zn alloy thin film (30) electroplated on a blanket Cu surface (20) disposed in a via (6) by electroplating, using an electroplating apparatus, the Cu surface (20) in a uni... | 12/09/2003 |
| 6660610 | Devices having improved capacitance and methods of their fabrication A capacitor formed by a process using only two deposition steps and a dielectric formed by oxidizing a metal layer in an electrolytic solution. The capacitor has first and second conductive plates and a dielectric is formed from the first conductive plate... | 12/09/2003 |
| 6661642 | Dielectric structure Multilayer dielectric structures particularly suitable for use in capacitors and having a plating dopant in an amount sufficient to promote plating of a conductive layer are provided, together with methods of forming such structures. Such dielectric struc... | 12/09/2003 |
| 6656829 | Semiconductor integrated circuit device and manufacturing method of that A laser beam is irradiated onto a photocurable resin layer formed on an electrode part before rearrangement. By scanning the resin on the periphery of a metal wiring formation area extending from the electrode part before rearrangement to a bump electrode... | 12/02/2003 |
| 6652726 | Method for reducing wafer edge defects in an electrodeposition process A method for reducing or avoiding semiconductor wafer peripheral defects and contamination during and following electrodeposition including providing a wafer chuck assembly sealably attached to a back side of a semiconductor wafer leaving an exposed perip... | 11/25/2003 |
| 6649038 | Electroplating method Disclosed is a method of electroplating substrate such that small recessed features are completely filled with minimum thickness of the deposited metal over fields.... | 11/18/2003 |
| 6638410 | Apparatus and method for electrolytically depositing copper on a semiconductor workpiece A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ult... | 10/28/2003 |
