Famous Patents
The ice cream cone was invented at the St. Louis Worlds Fair by Ernest Hamwi in 1904. His waffle booth was next to an ice cream vendor who ran short of dishes. Hamwi rolled a waffle to hold ice cream and the cone was born.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7417290 | Air break for improved silicide formation with composite caps Disclosed is a structure and method for tuning silicide stress and, particularly, for developing a tensile silicide region on a gate conductor of an n-FET in order to optimize n-FET performance. More particularly, a first metal layer-protective cap layer-second meta... | 08/26/2008 |
| 7381612 | Method for manufacturing semiconductor device with recess channels and asymmetrical junctions Disclosed is a method for manufacturing a semiconductor device having recess channels and asymmetrical junctions. The method includes forming an impurity region for adjusting the threshold voltage by implanting ions into a bit line junction of a semiconductor substr... | 06/03/2008 |
| 7374977 | Droplet discharge device, and method for forming pattern, and method for manufacturing display device It is an object of the present invention to improve the usability of a material, and to provide a display device which can be manufactured by simplifying the manufacturing process and a manufacturing technique thereof. It is also an object of the invention to provid... | 05/20/2008 |
| 7361597 | Semiconductor device and method of fabricating the same A semiconductor device incorporating an alloy layer formed on a substrate; a gate electrode, a source electrode, and a drain electrode formed on the alloy layer at predetermined intervals therebetween; a gate insulating layer formed on the gate electrode in a gate e... | 04/22/2008 |
| 7319068 | Method of depositing low k barrier layers A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as ... | 01/15/2008 |
| 7314792 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo... | 01/01/2008 |
| 7307018 | Method of fabricating conductive lines A method of forming a conductive line suitable for decreasing a sheet resistance of the conductive lines. The method comprises steps of providing a material layer having a conductive layer formed thereon and forming a patterned mask layer on the conductive layer. In... | 12/11/2007 |
| 7226854 | Methods of forming metal lines in semiconductor devices Methods of forming metal lines in semiconductor devices are disclosed. One example method may include forming lower metal lines and forming an insulation layer on the lower metal lines; etching said insulation layer to a depth; and depositing a material for upper me... | 06/05/2007 |
| 7205208 | Method of manufacturing a semiconductor device In a method of manufacturing a semiconductor device, a first trench is formed in a first region of a substrate and a second trench is formed in a second region of the substrate different from the first region. A depth of the first trench is less than that of the sec... | 04/17/2007 |
| 7199043 | Method of forming copper wiring in semiconductor device Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing proces... | 04/03/2007 |
| 7148143 | Semiconductor device having a fully silicided gate electrode and method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a silicided gate electrode (150) loca... | 12/12/2006 |
| 7119030 | Process for lining a surface using an organic film The present invention relates to a method for cladding a simple or complex surface, electrically conducting or semiconducting, by means of an organic film from at least one precursor of said organic film, characterized in that the cladding of the surface by the orga... | 10/10/2006 |
| 7112512 | Method of manufacturing liquid crystal display On a substrate, the pattern of the first conductive layer is defined, that is, a gate line combination including gate pads, scanning lines and gate electrodes. A gate insulating layer, a semiconductor layer, a doped semiconductor layer and a second conductive layer ... | 09/26/2006 |
| 6794713 | Semiconductor device and method of manufacturing the same including a dual layer raised source and drain SiGe or SiC films are selectively grown on source/drain regions, followed by selectively growing silicon. A monocrystalline film having a high dislocation density or a polycrystalline film can be grown in growing the silicon film by making the C or Ge concentration ... | 09/21/2004 |
| 6703279 | Semiconductor device having contact of Si-Ge combined with cobalt silicide The present invention provides a metal contact of SiGe combined with cobalt silicide and cobalt. The contact resistance is greatly lowered due to both the low Schottky Barrier Height of SiGe and the low sheet resistance of cobalt silicide. The cobalt laye... | 03/09/2004 |
| 6696759 | Semiconductor device with diamond-like carbon layer as a polish-stop layer A semiconductor structure includes a diamond-like carbon layer as a polish-stop for patterning a metal level into an inter-level dielectric substrate in a damascene process flow. The semiconductor structure includes a substrate having a dielectric layer f... | 02/24/2004 |
| 6689654 | Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad An integrated circuit device includes a substrate that has a source region and a drain region formed therein. A gate pattern is disposed on the substrate between the source region and the drain region. A lower pad layer is disposed on the source region an... | 02/10/2004 |
| 6677212 | Elevated source/drain field effect transistor and method for making the same A gate oxide film (23), a gate electrode (24) and a gate cap insulating film (25) are stacked on an active region of a p-type semiconductor substrate (21), and an insulating side wall (29) is formed, followed by BF2 ion implantation. Thus, a su... | 01/13/2004 |
| 6670682 | Multilayered doped conductor A memory device addressing reliability and refresh characteristics through the use of a multilayered doped conductor, and a method making are disclosed. The multilayered doped conductor creates a high dopant concentration in the active area close to the c... | 12/30/2003 |
| 6667220 | Method for forming junction electrode of semiconductor device A method for forming a junction electrode of a semiconductor device where a gate is formed on a semiconductor substrate by using a predetermined device structure, a contact hole is formed by stacking an interlayer insulation film on the gate, and n-type a... | 12/23/2003 |
| 6660572 | Thin film semiconductor device and method for producing the same In order to fabricate a high performance thin film semiconductor device using a temperature process in which it is possible to use inexpensive glass substrates, a highly crystalline mixed-crystallinity semiconductor film is deposited by means of PECVD usi... | 12/09/2003 |
| 6646320 | Method of forming contact to poly-filled trench isolation region Existing polysilicon emitter technology is used to contact poly fill in a trench isolation structure. A standard single poly emitter window process is followed. An "emitter window" is masked directly over the polysilicon trench fill. Heavily doped single ... | 11/11/2003 |
| 6645835 | Semiconductor film forming method and manufacturing method for semiconductor devices thereof A method for forming a semiconductor film capable allowing easy cleaning of the processing equipment and capable of forming an epitaxial film at low temperatures as well as a manufacturing method for semiconductor devices utilizing this forming method is ... | 11/11/2003 |
| 6627919 | Thermally stable nickel germanosilicide formed on SiGe A thermally stable nickel germanosilicide on SiGe integrated circuit device, and a method of making the same, is disclosed. During fabrication of the device iridium or cobalt is added at the Ni/SiGe interface to decrease the sheet resistance of the device... | 09/30/2003 |
| 6620665 | Method for fabricating semiconductor device A process control is performed for fabricating both a wafer for a device including a Ge-containing semiconductor film and a wafer for a device, for example, including no Ge-containing semiconductor film on a common fabrication line. When the wafer includi... | 09/16/2003 |
| 6621145 | Semiconductor device having a metal-semiconductor junction with a reduced contact resistance A metal-semiconductor junction comprises a wiring metal layer and a semiconductor layer. To reduce the contact resistance of the junction, a region doped with an n- or p-type impurity and having a high carrier concentration of 1021 cm-3 | 09/16/2003 |
| 6610361 | Multi-layer assemblies with predetermined stress profile and method for producing same Multi-layer assemblies of polysilicon thin films having predetermined stress characteristics and techniques for forming such assemblies are disclosed. In particular, a multi-layer assembly of polysilicon thin films may be produced that has a stress level ... | 08/26/2003 |
| 6599840 | Material removal method for forming a structure Methods are disclosed for forming shaped structures from silicon and/or germanium containing material with a material removal process that is selective to low stress portions of the material. In general, the method initially provides a layer of the materi... | 07/29/2003 |
| 6596642 | Material removal method for forming a structure Methods are disclosed for forming shaped structures from silicon and/or germanium containing material with a material removal process that is selective to low stress portions of the material. In general, the method initially provides a layer of the materi... | 07/22/2003 |
| 6596648 | Material removal method for forming a structure Methods are disclosed for forming shaped structures from silicon and/or germanium containing material with a material removal process that is selective to low stress portions of the material. In general, the method initially provides a layer of the materi... | 07/22/2003 |
| 6573197 | Thermally stable poly-Si/high dielectric constant material interfaces The present invention provides a method of fabricating a thermally stable polysilicon/high-k dielectric film stack utilizing a deposition method wherein Si-containing precursor gas which includes silicon and hydrogen is diluted with an inert gas such as H... | 06/03/2003 |
| 6570233 | Method of fabricating an integrated circuit The invention provides a technology for reducing the direct contact resistance and for reducing the junction leak while maintaining the punch through margin. A semiconductor integrated circuit device is provided which comprises: a substrate; a transistor ... | 05/27/2003 |
| 6563179 | MOS transistor and method for producing the transistor Terminal regions of source/drain zones of an MOS transistor are configured over the substrate in the form of conductive structures, are separated from the substrate by separating layers, and exhibit a larger horizontal cross-section than doped regions for... | 05/13/2003 |
| 6562707 | Method of forming a semiconductor device using selective epitaxial growth A method of forming a semiconductor device using selective epitaxial growth (SEG) is provided. This method includes forming an insulating layer pattern having a window on a semiconductor substrate. The window exposes a predetermined region of the semicond... | 05/13/2003 |
| 6559037 | Process for producing semiconductor device having crystallized film formed from deposited amorphous film A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced ... | 05/06/2003 |
| 6555880 | Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby A semiconductor structure includes raised source and drain regions, where the raised source and drain regions are facet free and unconstrained to have a shape conforming to a same crystallographic axes with respect to each other.... | 04/29/2003 |
| 6544822 | Method for fabricating MOSFET device A method for fabricating a MOSFET device having a metal gate with an ultra shallow junction and allowing the application of a self-aligned contact. A sacrificial gate is formed on a silicon substrate, as is a first silicon epitaxial layer, which is thinne... | 04/08/2003 |
| 6534815 | Semiconductor device with stack electrode formed using HSG growth A semiconductor memory device includes an interlayer insulating film, a contact film, a crystallization preventing film and a conductive film. The interlayer insulating film is formed on a semiconductor substrate to cover a source/drain region of a MOS tr... | 03/18/2003 |
| 6531781 | Fabrication of transistor having elevated source-drain and metal silicide A method of forming a transistor, the method comprises following steps: provides a substrate; covers part of the substrate by a doped amorphous silicon layer and covers part of the substrate by a first dielectric layer; forms a metal silicide layer on the... | 03/11/2003 |
| 6521505 | Manufacturing method of semiconductor device In forming transistor electrodes, after a polysilicon film is formed, RF plasma etching is applied to the surface thereof to remove a natural oxidation film on the surface of the polysilicon film.... | 02/18/2003 |
