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| Number | Title | Issue Date |
| 8174130 | Laser dicing sheet and manufacturing method for chip body Disclosed herein is a laser dicing sheet comprising a base material comprising a polyurethane acrylate film and a shape-restoring film; and an adhesive layer formed on a surface of said polyurethane acrylate film of the base material. ... | 05/08/2012 |
| 8148827 | Quad flat no lead (QFN) package The present invention relates to a quad flat no lead (QFN) package is provided. In the invention, a plurality of first pads are disposed outside an extension area of a conductive circuit layer, and a plurality of second pads are disposed inside a die bonding area of... | 04/03/2012 |
| 8138613 | Microelectronic devices Microelectronic devices and methods for manufacturing microelectronic devices are described herein. An embodiment of one such method includes attaching a plurality of singulated microelectronic dies to a removable support member with an active side of the individual... | 03/20/2012 |
| 8134238 | Semiconductor device having a wafer level chip size package structure A semiconductor device having a wafer level chip size package may include a semiconductor substrate having an integrated circuit formed thereon; a plurality of electrode pads formed on the semiconductor substrate; at least one rewiring layer which may include rewiri... | 03/13/2012 |
| 8115321 | Separate probe and bond regions of an integrated circuit An integrated circuit includes a number of probe pads arranged in a staggered manner in a core region of the integrated circuit and a number of bond pads in an Input/Output (I/O) region surrounding the core region. The core region includes logic circuitry therein, a... | 02/14/2012 |
| 7994644 | Package stacking through rotation A packaged microelectronic element includes a package element that further includes a dielectric element having a bottom face and a top face, first and second bond windows extending between the top and bottom faces, a plurality of chip contacts disposed at the top f... | 08/09/2011 |
| 7964974 | Electronic chip package with reduced contact pad pitch An apparatus and method, the apparatus includes an electronic chip package including an electronic chip having a first and a second contact pad formed thereon, a first dielectric layer coupled to the electronic chip, a second dielectric layer coupled to the first di... | 06/21/2011 |
| 7956473 | Semiconductor device Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed ... | 06/07/2011 |
| 7928586 | Semiconductor device with multiple designation marks The semiconductor device having a bonding pad is provided. The bonding pad enables highly reliable connection and high flexibility of the selection of the area to be bonded. The semiconductor device includes a bonding pad and an area designation marking. The bonding... | 04/19/2011 |
| 7906856 | Semiconductor device and method for manufacturing semiconductor device A semiconductor device has a semiconductor chip provided with an insulating layer formed so as to be thinner in a first secondary-wire-free area than in a first secondary-wire-containing area. Further, the semiconductor chip has an edge extending further outward tha... | 03/15/2011 |
| 7851929 | Semiconductor device A semiconductor device having a wafer level chip size package may include a semiconductor substrate having an integrated circuit formed thereon; a plurality of electrode pads formed on the semiconductor substrate; at least one rewiring layer which may include rewiri... | 12/14/2010 |
| 7839001 | Methods for making substrates and substrates formed therefrom A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving suppor... | 11/23/2010 |
| 7755204 | Stacked die module including multiple adhesives that cure at different temperatures A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked up by the stacking tip. The first die is coated with an adhesive on the underside of the die. The first d... | 07/13/2010 |
| 7750485 | Semiconductor device and method for manufacturing the same According to the method for manufacturing a semiconductor device, a surface of a lower insulating film (55) is planarized by CMP or the like, and an upper insulating film (56) and a protective metal film (59) are formed on the lower insulating f... | 07/06/2010 |
| 7663251 | Semiconductor device, semiconductor package for use therein, and manufacturing method thereof A semiconductor package includes a substrate for mounting and fixing a semiconductor chip thereon and a connecting pattern. The substrate is provided with an elongate opening formed therein. The semiconductor chip is fixed with its surface being mounted on the subst... | 02/16/2010 |
| 7652382 | Micro chip-scale-package system A micro chip-scale-package system including providing a metal pattern on an adhesion material, attaching an integrated circuit die to the metal pattern, and molding an encapsulant over the integrated circuit die and the metal pattern. ... | 01/26/2010 |
| 7646103 | Dicing/die-bonding film, method of fixing chipped work and semiconductor device A dicing/die-bonding film including a pressure-sensitive adhesive layer (2) on a supporting base material (1) and a die-bonding adhesive layer (3) on the pressure-sensitive adhesive layer (2), wherein a releasability in an interface betwe... | 01/12/2010 |
| 7612457 | Semiconductor device including a stress buffer An integrated circuit includes a first surface configured for mounting to a carrier, an active area of the integrated circuit spaced from the first surface, a bond pad disposed over and in electrical communication with the active area, and a ceramic inorganic stress... | 11/03/2009 |
| 7566977 | Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electro... | 07/28/2009 |
| 7511382 | Semiconductor chip arrangement and method A semiconductor chip arrangement and method is disclosed. In one embodiment, the invention provides a method for providing a semiconductor chip arrangement including providing a semiconductor chip having a first connecting area, and providing a chip carrier having a... | 03/31/2009 |
| 7508081 | Dicing die-bonding film The invention relates to a dicing die-bonding film having a pressure-sensitive adhesive layer (2) on a substrate material (1) and a die-bonding adhesive layer (3) on the pressure-sensitive adhesive layer (2), wherein the adhesion of the p... | 03/24/2009 |
| 7498679 | Package substrate and semiconductor package using the same A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation layer. A window may be provided in, for example, the center of the pack... | 03/03/2009 |
| 7476979 | Chip scale surface mounted device and process of manufacture A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as ... | 01/13/2009 |
| 7476980 | Die configurations and methods of manufacture A die configuration includes a die having an active side and an inactive side being opposed to the active side. The inactive side is connected to a heat sink. The connecting members can be provided on the active side. ... | 01/13/2009 |
| 7462942 | Die pillar structures and a method of their formation A die, comprising a substrate and one or more pillar structures formed over the substrate in a pattern and the method of forming the die. ... | 12/09/2008 |
| 7443043 | Circuit device and method of manufacture thereof A circuit device 10 comprises a die pad 11, bonding pads 12, a circuit element 9, affixed onto die pad 11, and an insulating resin 14, which seals die pad 11, bonding pads 12, and circuit element 9, and ... | 10/28/2008 |
| 7443041 | Packaging of a microchip device A method of packaging a microchip device, an interposer for packaging, and a packaged microchip device. An interposer is placed on microchip devices. The interposer includes an aperture which extends from the interposer surface where external electrical contacts are... | 10/28/2008 |
| 7443013 | Flexible substrate for package of die The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a p... | 10/28/2008 |
| 7439475 | Thermally conductive body and method of manufacturing the same The thermally conductive body for use by being placed between a heat generating body and a heat radiating body, in which the body is molded from a thermally conductive polymer composition. The thermally conductive polymer composition contains a polymer matrix and a ... | 10/21/2008 |
| 7427811 | Semiconductor substrate A semiconductor wafer having a high degree of thinness and exhibiting an enhanced strength state. A layer of tenacious reinforcement material is disposed over a back side of the wafer while in a rough state from backgrinding without prior, conventional polishing or ... | 09/23/2008 |
| 7423349 | Semiconductor device The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) i... | 09/09/2008 |
| 7420280 | Reduced stress under bump metallization structure An improved under bump structure for use in semiconductor devices is described. The under bump structure includes a passivation layer having a plurality of vias. The vias are positioned such that a plurality of vias are associated with (i.e., located over) each cont... | 09/02/2008 |
| 7417295 | Insulated gate semiconductor device and manufacturing method thereof Two metal electrode layers are provided. A first electrode layer is patterned with a minute separation distance according to an element region as in the case of the conventional case. Meanwhile, it suffices that a second electrode layer be in contact with the first ... | 08/26/2008 |
| 7417324 | Semiconductor device and method for manufacturing the same A semiconductor device is composed of a semiconductor chip, aluminum pads formed on the semiconductor chip, alloy ball bumps, which are formed on the aluminum pads, containing gold and Pd, and gold wires, which are connected to the alloy ball bumps, having a surface... | 08/26/2008 |
| 7417299 | Direct connection multi-chip semiconductor element structure A direct connection multi-chip semiconductor element structure is proposed. A plurality of semiconductor chips are mounted and supported on a metal heat sink, such that heat generated by the chips during operation can be dissipated via the heat sink. A circuit struc... | 08/26/2008 |
| 7417323 | Neo-wafer device and method A neo-wafer made from integrated circuit die and methods for making a neo-wafer are disclosed. A substrate is provided and includes a dielectric layer with conductive pads for the receiving of one or more integrated circuit die. Die are flip-chip bonded to the condu... | 08/26/2008 |
| 7414301 | Printed circuit board with soldering lands The present invention provides a printed circuit board having an area of non-resist portion, where each non-resist portion expands gradually toward the back end of a land array in the dipping direction A. Thus the area of solder deposition also expands in the region... | 08/19/2008 |
| 7402503 | Dicing sheet, manufacturing method thereof, and manufacturing method of semiconductor apparatus A dicing sheet which supports electronic-component aggregation with adhesive in the case of separating the electronic-component aggregation in which a plurality of electronic components are integrated, has a substrate and an adhesion layer which is formed at one sur... | 07/22/2008 |
| 7400032 | Module assembly for stacked BGA packages Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrange... | 07/15/2008 |
| 7394164 | Semiconductor device having bumps in a same row for staggered probing A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of irregular bumps. The regular bumps and the irregular bumps are intersperse... | 07/01/2008 |
