Neuroimaging as a Marketing Tool
Neuroimaging as a means for validating whether a stimulus such as advertisement, communication, or product evokes a certain mental response such as emotion, preference, or memory, or to predict the consequences of the stimulus on later behavior such as consumption or purchasing.
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| Number | Title | Issue Date |
| 7361846 | High electrical performance semiconductor package A high electrical performance semiconductor package is proposed. A carrier is provided having a first surface, an opposite second surface, and conductive vias for electrically connecting the first surface to the second surface. A chip is attached to the first surfac... | 04/22/2008 |
| 7362580 | Electronic assembly having an indium wetting layer on a thermally conductive body Embodiments include electronic packages and methods for forming electronic packages. One method includes providing a die and a thermal interface material on the die. A metal body is adapted to fit over the die. A wetting layer of a material comprising indium is form... | 04/22/2008 |
| 7361972 | Chip packaging structure for improving reliability A novel chip packaging structure is disclosed. The chip packaging structure includes a flip chip having a chip backside, at least one concave stress-relieving structure provided in the chip backside, a carrier substrate bonded to the flip chip and an adhesive materi... | 04/22/2008 |
| 7361981 | Pad layout A pad layout suitable for being applied on a metal interconnection structure of an integrated circuit chip is provided. The pad layout includes a first signal pad, a second signal pad, a first non-signal pad, a second non-signal pad, a first trace, a second trace, a... | 04/22/2008 |
| 7358541 | Flip-chip light emitting diode and method of manufacturing the same Provided are a flip-chip light emitting diode (FCLED) and a method of manufacturing the same. The provided FCLED is formed by sequentially depositing an n-type cladding layer, an active layer, a p-type cladding layer, and a reflective layer on a substrate. The refle... | 04/15/2008 |
| 7358606 | Apparatus to compensate for stress between heat spreader and thermal interface material A device and method identify and compensate for tensile stress due to heat-caused expansion and contraction between an integrated heat spreader and thermal interface material. This device and method change the shape of the integrated heat spreader based upon the ide... | 04/15/2008 |
| 7358618 | Semiconductor device and manufacturing method thereof A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce s... | 04/15/2008 |
| 7358539 | Flip-chip light emitting diode with indium-tin-oxide based reflecting contacts A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light... | 04/15/2008 |
| 7358600 | Interposer for interconnecting components in a memory card A circuit module for use in a memory card. The circuit module comprises a base substrate including a plurality of contacts. Attached to the base substrate is a memory die, while attached to the memory die is an interposer having a plurality of terminals electrically... | 04/15/2008 |
| 7355284 | Semiconductor light emitting devices including flexible film having therein an optical element Semiconductor light emitting devices include a substrate having a face, a flexible film that includes therein an optical element, on the face, and a semiconductor light emitting element between the substrate and the flexible film and configured to emit light through... | 04/08/2008 |
| 7354782 | Group III nitride based flip-chip integrated circuit and method for fabricating A flip-chip integrated circuit and method for fabricating the integrated circuit are disclosed. A method according to the invention comprises forming a plurality of active semiconductor devices on a wafer and separating the active semiconductor devices. Passive comp... | 04/08/2008 |
| 7355285 | Structure of mounting electronic component The structure of mounting an electronic component on a circuit board is capable of securely flip-chip-bonding the electronic component having bumps, whose separations are very short, to the circuit board without displacement. The structure of mounting an electronic ... | 04/08/2008 |
| 7354794 | Printed conductive connectors Methods of connecting a circuit device to a semiconductor substrate and micro-fluid ejection devices made by the methods. One method includes printing an elongate strip of an electrically conductive fluid to electrically interconnect a first contact pad on a semicon... | 04/08/2008 |
| 7355286 | Flip chip bonded package applicable to fine pitch technology A flip chip bonded package applicable to a fine pitch technology uses, inter alia, insulative posts instead of using conductive bumps, which correspond to electrodes one by one. The insulative posts are assigned to every two bonding pads for the sake of flip chip bo... | 04/08/2008 |
| 7353591 | Method of manufacturing coreless substrate A method for manufacturing coreless substrates is provided herein. The method first provides a base whose top and bottom sides are covered with metal layers respectively that are detachable from the base. From the two metal layers, the method then develops the bump-... | 04/08/2008 |
| 7355288 | Low fabrication cost, high performance, high reliability chip scale package The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elast... | 04/08/2008 |
| 7355272 | Semiconductor device with stacked semiconductor chips of the same type A semiconductor device includes a wiring board, a first semiconductor chip (e.g. DRAM) that is flip-chip connected on the wiring board, a second semiconductor chip (e.g. DRAM) that is of the same type as the first semiconductor chip and is mounted face up on the fir... | 04/08/2008 |
| 7354799 | Methods for anchoring a seal ring to a substrate using vias and assemblies including an anchored seal ring Disclosed are embodiments of a method for forming a seal ring on a substrate that is anchored to the substrate by a number of vias. Also disclosed are embodiments of an assembly including such an anchored seal ring. In some embodiments, a seal ring may extend around... | 04/08/2008 |
| 7355282 | Post passivation interconnection process and structures A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of poly... | 04/08/2008 |
| 7352070 | Polymer encapsulated electrical devices Improved encapsulated, overmolded and/or underfilled electrical components having a complete encapsulation, overmolding and/or underfilling with a coefficient of thermal expansion that is uniform and substantially free of gradients includes a polymeric matrix and an... | 04/01/2008 |
| 7352069 | Electronic component unit An object of the present invention is to provide an electronic part device which can be repaired even in the case of an electronic part device having a malfunction in electrical connection after carrying out underfill. The present invention is an electronic p... | 04/01/2008 |
| 7352067 | Stacked semiconductor device A stacked semiconductor device includes a plurality of semiconductor chips and a conductive path extending through at least one of the semiconductor chips. The semiconductor chips are stacked together. The semiconductor chips are electrically connected by the conduc... | 04/01/2008 |
| 7350684 | Apparatus and method for forming bump A preheat device (160) is provided to execute, before forming bumps (16) to electrode parts (15), a pre-formation temperature control for bonding promotion to promote bonding between the electrode parts and the bumps during bump formation. Metal... | 04/01/2008 |
| 7352060 | Multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring substrate A multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring structure is disclosed. The multilayer wiring substrate includes a dielectric layer including a resin material mixed with an inorganic filler, wherein the inorganic filler i... | 04/01/2008 |
| 7352061 | Flexible core for enhancement of package interconnect reliability An IC package is disclosed that comprises a core region disposed between upper and lower build-up layer regions. In one embodiment, the core region comprises a low modulus material. In an alternative embodiment the core region comprises a medium modulus material. In... | 04/01/2008 |
| 7348669 | Bump structure of semiconductor device and method of manufacturing the same In connection with a bump of a semiconductor device and a manufacturing method thereof, a groove is formed in a bump pad region of a semiconductor substrate. An under bump metal layer is then formed in the groove, and a lower end portion of the bump fills the groove... | 03/25/2008 |
| 7348678 | Integrated circuit package to provide high-bandwidth communication among multiple dice A system may include a microprocessor die, an integrated circuit package substrate, and a die disposed between the microprocessor die and the integrated circuit package substrate. In some embodiments, the integrated circuit package substrate defines a first cavity, ... | 03/25/2008 |
| 7348261 | Wafer scale thin film package A chip module having a chip with a flexible multilayer redistribution thin film attached thereto for connection to a substrate. The thin film acts as both a redistribution medium with multiple layers of redistribution metallurgy for chip power and signals and as a c... | 03/25/2008 |
| 7348661 | Array capacitor apparatuses to filter input/output signal An apparatus for filtering noise from an input/output (I/O) signal is disclosed. In various embodiments, the apparatus may be an array capacitor, and may be disposed between an electronic package and an underlying substrate such as a printed circuit board. ... | 03/25/2008 |
| 7349223 | Enhanced compliant probe card systems having improved planarity Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more ... | 03/25/2008 |
| 7349626 | Imaging apparatus The imaging apparatus 1 comprises: a semiconductor imaging device 5 which converts incident light to an electrical signal; an optical filter 4 which is opposed to an incident surface of the semiconductor imaging device 5 and transmits lig... | 03/25/2008 |
| 7350160 | Method of displaying a guard ring within an integrated circuit The invention displays a guard ring within an integrated circuit design by determining positions of the logic devices within the integrated circuit design, incorporating the guard ring into the integrated circuit design, and displaying the logic devices and the guar... | 03/25/2008 |
| 7348183 | Self-contained microelectrochemical bioassay platforms and methods Methods and devices for improved chemical and biomass detection assays combined well defined microstructures having independently addressable electrodes with various surface immobilization electrochemical assays. Combining known chemical detection immobilization ass... | 03/25/2008 |
| 7348193 | Hermetic seals for micro-electromechanical system devices The invention is directed to a hermetically sealed device and a method for making such device. The device includes optical, micro-electromechanical, electronic and opto-electronic devices, having a substrate with one or a plurality of optical, opto-electronic, elect... | 03/25/2008 |
| 7346982 | Method of fabricating printed circuit board having thin core layer A method is directed towards fabricating a printed circuit board (PCB) having a thin core layer. In the method, a substrate, where a copper foil is formed on a release film and a prepreg, is employed as a base substrate and a core insulating layer is removed after t... | 03/25/2008 |
| 7347354 | Metallic solder thermal interface material layer and application of the same A method of bonding a thermal interface layer to a heat dissipating member and the resulting device are described. The method may involve plating a bonding surface of the heat dissipating member, and bonding a metallic solder onto the plating under vacuum or inert c... | 03/25/2008 |
| 7348215 | Methods for assembly and packaging of flip chip configured dice with interposer A method for assembly and packaging of one or more flip chip-configured semiconductor dice with an interposer substrate to form a flip chip-type semiconductor device assembly. The flip chip-type semiconductor device assembly includes a conductively bumped semiconduc... | 03/25/2008 |
| 7344969 | Stacked die in die BGA package Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recess... | 03/18/2008 |
| 7342320 | Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connectio... | 03/11/2008 |
| 7342318 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 03/11/2008 |