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| Number | Title | Issue Date |
| 8084864 | Electromigration resistant aluminum-based metal interconnect structure A vertical metallic stack, from bottom to top, of an elemental metal liner, a metal nitride liner, a Ti liner, an aluminum portion, and a metal nitride cap, is formed on an underlying metal interconnect structure. The vertical metallic stack is annealed at an elevat... | 12/27/2011 |
| 8053896 | IC chip coating material and vacuum fluorescent display device using same An IC chip coating material includes first metal oxide particles; a metal alkoxide; an organic solvent; and second metal oxide particles and/or flat particles of a composite oxide, the second metal oxide particles having a composition identical to or different from ... | 11/08/2011 |
| 8049336 | Interconnect structure One or more embodiments relate to a semiconductor device, comprising: a Si-containing layer; a barrier layer disposed over the Si-containing layer, the barrier layer comprising a compound including a metallic element; a metallic nucleation_seed layer disposed over t... | 11/01/2011 |
| 7944056 | Hillock-free aluminum layer and method of forming the same A hillock-free conductive layer comprising at least two aluminum (Al) layers formed on a substrate, wherein said at least two Al layers comprise a barrier Al layer formed on the substrate, and a pure Al layer formed on the barrier Al layer. The barrier Al layer coul... | 05/17/2011 |
| 7928575 | Electronic device, method of manufacture of the same, and sputtering target In an electronic device comprising a first electrodes consisting of a metal oxide and a second electrode consisting of an aluminum alloy film directly contacted and electrically connected to the first electrode, the contact interface between the aluminum alloy film ... | 04/19/2011 |
| 7825515 | Semiconductor device, display device, and method of manufacturing semiconductor device A semiconductor device includes a film containing silicon as the main ingredient, and an aluminum alloy film, such as a source electrode and a drain electrode, that is directly connected to the film containing silicon as the main ingredient, such as an ohmic low-res... | 11/02/2010 |
| 7622809 | Display device and sputtering target for producing the same A display device in which an Al alloy film and a conductive oxide film are directly connected without interposition of refractory metal and some or all of Al alloy components deposit or are concentrated at the interface of contact between the Al alloy film and the c... | 11/24/2009 |
| 7615868 | Electrode, method for producing same and semiconductor device using same There is provided a technology for obtaining an electrode having a low contact resistance and less surface roughness. There is provided an electrode comprising a semiconductor film 101, and a first metal layer 102 and a second metal layer 103 se... | 11/10/2009 |
| 7495339 | Connection structure and method for fabricating the same There is provided a connection structure between a Si electrode (Si member) and an Al wire (Al member). Between the Si electrode and the Al wire, a first part and second parts are present in interposed relation. Each of the first and second parts is in contact with ... | 02/24/2009 |
| 7470992 | Barrier layer stack to prevent Ti diffusion A barrier layer stack. The barrier layer stack includes a semiconductor process wafer comprising an exposed conductive region, a first barrier layer stack comprising at least one TiN and one Ti layers overlying and contacting the conductive region, wherein the TiN l... | 12/30/2008 |
| 7436065 | Electrode contact structure An electrode contact structure having a high reliability is provided. The structure comprises an Au electrode formed on a GaAs substrate, a contact hole open in an insulating film on the Au electrode, and an Al wiring being in contact with the Au electrode through t... | 10/14/2008 |
| 7425765 | Zinc-aluminum solder alloy A high melting point solder alloy superior in oxidation resistance, in particular a solder alloy provided with both a high oxidation resistance and high melting point suitable for filling fine through holes of tens of microns in diameter and high aspect ratios and f... | 09/16/2008 |
| 7420277 | System for heat dissipation in semiconductor devices The present disclosure provides a method and system for heat dissipation in semiconductor devices. In one example, an integrated circuit semiconductor device includes a semiconductor substrate; one or more metallurgy layers connected to the semiconductor substrate, ... | 09/02/2008 |
| 7368380 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device is disclosed in which a metallic deposit is stably formed on the anode side with small variation in film thickness, and plating is prevented on the cathode side without carrying out any additional processing on the ca... | 05/06/2008 |
| 7358611 | System and method for adjusting the ratio of deposition times to optimize via density and via fill in aluminum multilayer metallization A system and method is disclosed for adjusting the ratio of deposition times to optimize via density and via fill in an aluminum multilayer metallization process during a manufacturing process of a semiconductor wafer. In a two-step cold/hot aluminum sputtering proc... | 04/15/2008 |
| 7351651 | Structure and method for contact pads having a recessed bondable metal plug over of copper-metallized integrated circuits A metal structure for an integrated circuit, which has copper interconnecting metallization (311) protected by an overcoat layer (320). A portion of the metallization is exposed in a window (301) opened through the thickness of the overcoat laye... | 04/01/2008 |
| 7335990 | Process of forming a composite diffusion barrier in copper/organic low-k damascene technology A semiconductor device, having a composite barrier layer, comprising the following. A substrate has a dielectric layer formed thereover and having an opening within the dielectric layer. The opening exposes a first portion of the substrate. A composite barrier layer... | 02/26/2008 |
| 7323783 | Electrode, method for producing same and semiconductor device using same There is provided a technology for obtaining an electrode having a low contact resistance and less surface roughness. There is provided an electrode comprising a semiconductor film 101, and a first metal layer 102 and a second metal layer 103 se... | 01/29/2008 |
| 7323409 | Method for forming a void free via A multilevel metal and via structure is described. The metal conductors include a base or seed layer, a bulk conductor layer, a capping layer, and a barrier layer, and the via structure include a seed layer, a diffusion barrier layer and a metal plug. The via... | 01/29/2008 |
| 7307344 | Semiconductor device including a discontinuous film and method for manufacturing the same Disclosed is a semiconductor device comprising a semiconductor substrate, a first insulating film formed above the semiconductor substrate, Cu wiring buried in the first insulating film, a second insulating film formed above the Cu wiring, and a discontinuous film m... | 12/11/2007 |
| 7303988 | Methods of manufacturing multi-level metal lines in semiconductor devices Methods of forming a multi-level metal line of a semiconductor device are disclosed. One example method includes subsequently stacking first and second metal layers, wherein a conductive etching stopper layer is interposed at an interface between the first and secon... | 12/04/2007 |
| RE39932 | Semiconductor interconnect formed over an insulation and having moisture resistant material A plurality of metal wires are formed on an underlying interlayer insulating film. Areas among the metal wires are filled with a buried insulating film of a silicon oxide film with a small dielectric constant (i.e., a first dielectric film), and thus, a parasitic ca... | 12/04/2007 |
| 7301241 | Semiconductor device for preventing defective filling of interconnection and cracking of insulating film The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 | 11/27/2007 |
| 7300829 | Low temperature process for TFT fabrication Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subject... | 11/27/2007 |
| 7298021 | Electronic device and method for manufacturing the same An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm−3 or less, carbon atoms at a concentration of 5Ã... | 11/20/2007 |
| 7294518 | Composition for stripping photoresist and method for manufacturing thin film transistor array panel using the same The present invention provides a photoresist stripper including about 5 wt % to about 20 wt % alcohol amine, about 40 wt % to about 70 wt % glycol ether, about 20 wt % to about 40 wt % N-methyl pyrrolidone, and about 0.2 wt % to about 6 wt % chelating agent. ... | 11/13/2007 |
| 7294565 | Method of fabricating a wire bond pad with Ni/Au metallization A method for sealing an exposed surface of a wire bond pad with a material that is capable of preventing a possible chemical attack during electroless deposition of Ni/Au pad metallurgy is provided. Specifically, the present invention provides a method whereby a TiN... | 11/13/2007 |
| 7294858 | Semiconductor device and method of manufacturing the same A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy an... | 11/13/2007 |
| 7294851 | Dense seed layer and method of formation Methods of forming dense seed layers and structures thereof. Seed layers comprising a monolayer of molecules having a density of about 0.5 or greater may be manufactured over a metal layer, resulting in a well defined interface region between the metal layer and a s... | 11/13/2007 |
| 7294570 | Contact integration method A method of making a contact plug and a metallization line structure is disclosed in which a substrate is provided with at least one contact hole within an insulation layer situated on a semiconductor substrate of a semiconductor wafer. A first metal layer is deposi... | 11/13/2007 |
| 7276795 | Small grain size, conformal aluminum interconnects and method for their formation A first layer of titanium nitride (TiN) is formed on a semiconductor structure, such as an interconnect via. Then, a second layer of TiN is formed on the first layer of TiN. The first layer of TiN is amorphous. The second layer of TiN is polycrystalline, having a mi... | 10/02/2007 |
| 7261856 | Electromigration effect-insignificant alloys and the alloys' designing method This invention takes advantage of the characteristics that the effective charge numbers of different metals have different values and even with different signs, and alloys are prepared with the metals of different signs of effective charge numbers. The effective cha... | 08/28/2007 |
| 7253519 | Chip packaging structure having redistribution layer with recess A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. ... | 08/07/2007 |
| 7253501 | High performance metallization cap layer A semiconductor device having a nonconductive cap layer comprising a first metal element. The nonconductive cap layer comprises a first metal nitride, a first metal oxide, or a first metal oxynitride over conductive lines and an insulating material between the condu... | 08/07/2007 |
| 7247557 | Method and composition to minimize dishing Processes are disclosed for producing electronic interconnect devices, particularly semi-conductor wafers, with metal interconnect traces thereon wherein the surface of said device has improved planarity. Said planarity is achieved initially through the use of pulse... | 07/24/2007 |
| 7241685 | Semiconductor device and method of manufacturing the same There is provided a semiconductor device having a wiring structure which reduces possibility of a short circuit, and method of making the device. Besides, there is provided a semiconductor device having high reliability. Further, there is provided a semiconductor de... | 07/10/2007 |
| 7235494 | CMP cleaning composition with microbial inhibitor An antimicrobial cleaning composition and methods for cleaning semiconductor substrates, particularly after chemical mechanical planarization or polishing, are provided. In one embodiment, the cleaning composition combines a solvent, a cleaning agent such as a hydro... | 06/26/2007 |
| 7235844 | Power composite integrated semiconductor device and manufacturing method thereof A high-reliability power composite integrated semiconductor device uses thick copper electrodes as current collecting electrodes of a power device portion to resist wire resistance needed for reducing ON-resistance. Furthermore, wire bonding connection of the copper... | 06/26/2007 |
| 7226858 | Submicron contact fill using a CVD TiN barrier and high temperature PVD aluminum alloy deposition A submicron contact opening fill using a chemical vapor deposition (CVD) TiN liner/barrier and a high temperature, e.g., greater than about 385° C., physical vapor deposition (PVD) aluminum alloy layer that substantially fills the submicron contact. ... | 06/05/2007 |
| 7224066 | Bonding material and circuit device using the same A circuit device is provided in which the bonding reliability of a brazing material such as soft solder is improved. A circuit device of the present invention includes conductive patterns, a bonding material which fixes circuit elements to the conductive patterns, a... | 05/29/2007 |
