Did You Know...
...that one person who claimed to be the inventor of the television is Russian emigre Vladimir Zworykin? In 1929 David Sarnoff, founder of RCA, asked Zworykin what it would take to develop TV for commercial use. He said: a year and a half and $100,000. In reality, it took 20 years and $50 million! Before his death in 1982 at the age of 92, Zworykin said of his invention: "The technique is wonderful. It is beyond my expectations. But the programs! I would never let my children even come close to this thing."
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| Number | Title | Issue Date |
| 8183694 | Reversing tone of patterns on integrated circuit and nanoscale fabrication A process to produce an airgap on a substrate having a dielectric layer comprises defining lines by lithography where airgaps are required. The lines' dimensions are shrunk by a trimming process (isotropic etching). The tone of the patterns is reversed by applying a... | 05/22/2012 |
| 8174122 | Semiconductor device A trench is formed in an insulation film formed on top of a semiconductor substrate, and a barrier metal film is formed on the surface of the trench. After a copper or copper alloy film is formed on the barrier metal film, an oxygen absorption film in which a standa... | 05/08/2012 |
| 8164192 | Thermo-compression bonded electrical interconnect structure An electrical structure and method for forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mec... | 04/24/2012 |
| 8154129 | Electrode structure and semiconductor device In a power MOS transistor, for example, a source electrode is formed so as to be commonly connected to a plurality of source regions formed on the front surface. Thus, a current density varies based on in-plane resistance of the source electrode, thereby providing t... | 04/10/2012 |
| 8148821 | Dense seed layer and method of formation Methods of forming dense seed layers and structures thereof are provided. Seed layers including a monolayer of molecules having a density of about 0.5 or greater may be manufactured over a metal layer, resulting in a well-defined interface region between the metal l... | 04/03/2012 |
| 8125086 | Substrate for semiconductor package A method for manufacturing a substrate for a semiconductor package includes the steps of attaching first and second insulation layers which have first surfaces and second surfaces and are formed with conductive layers on the first surfaces, by the medium of a releas... | 02/28/2012 |
| 8110925 | Power semiconductor component with metal contact layer and production method therefor A power semiconductor component having a basic body and at least one contact area. At least one first thin metallic layer of a first material is arranged on the contact area. A second metallic layer—thicker than the first—of a second material is arranged on the ... | 02/07/2012 |
| 8089158 | Liquid crystal display device and manufacturing method therefor The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, an... | 01/03/2012 |
| 8058731 | Technique for forming metal lines in a semiconductor by adapting the temperature dependence of the line resistance By moderately introducing defects into a highly conductive material, such as copper, the resistance versus temperature behavior may be significantly modified so that enhanced electromigration behavior and/or electrical performance may be obtained in metallization st... | 11/15/2011 |
| 8053894 | Surface treatment of metal interconnect lines Apparatus for forming a semiconductor structure comprising a first layer on top of a substrate wherein the first layer defines conductive regions such as copper interconnect lines and non-conductive regions such as dielectric materials. The conductive regions are co... | 11/08/2011 |
| 8030777 | Protection of Cu damascene interconnects by formation of a self-aligned buffer layer Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit structure having damascene regions with exposed metal surfaces is pr... | 10/04/2011 |
| 8018062 | Production of a self-aligned CuSiN barrier A semiconductor product includes a portion made of copper, a portion made of a dielectric and a self-aligned barrier between the copper portion and the dielectric portion. The self-aligned barrier includes a first copper silicide layer comprising predominantly first... | 09/13/2011 |
| 8004087 | Semiconductor device with dual damascene wirings and method for manufacturing same A multilayered wiring is formed in a prescribed area in an insulating film that is formed on a semiconductor substrate. Dual damascene wiring that is positioned on at least one layer of the multilayered wiring is composed of an alloy having copper as a principal com... | 08/23/2011 |
| 7999387 | Semiconductor element connected to printed circuit board A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit boar... | 08/16/2011 |
| 7973411 | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods Microfeature workpieces having conductive vias formed by chemically reactive processes, and associated systems and methods are disclosed. A method in accordance with one embodiment includes disposing a conductive lining on walls of a via in a microfeature workpiece,... | 07/05/2011 |
| 7960834 | Electronic element that includes multilayered bonding interface between first electrode having aluminum-containing surface and second electrode composed of metal nanoparticle sintered body An electronic element including an electronic element base and electrodes each of which has a first electrode having a surface composed of at least Al or an Al alloy and a second electrode composed of a metal nanoparticle sintered body and bonded to the first electr... | 06/14/2011 |
| 7956468 | Semiconductor device A semiconductor device where an outside connection terminal of a semiconductor element and an electrode of a wiring board are connected to each other via a conductive adhesive, the conductive adhesive includes a first conductive adhesive; and a second conductive adh... | 06/07/2011 |
| 7936070 | Semiconductor device and method for fabricating semiconductor device A semiconductor device includes: a copper (Cu) wire having a first region and a second region in which densities of silicon (Si) and oxygen (O) atoms are higher than in the first region; a compound film that is selectively formed on the Cu wire and contains Cu and S... | 05/03/2011 |
| 7928574 | Semiconductor package having buss-less substrate A ball grid array device with an insulating substrate (110) having metal traces (106, for example copper, about 18 μm thick) with sidewalls (108) at right angles to the trace top. The traces are grouped in a first (120) and a second set ... | 04/19/2011 |
| 7928573 | Metal thin film for interconnection of semiconductor device A metal thin film used in fabricating a damascene interconnection of a semiconductor device which exhibits excellent high temperature fluidity during high pressure annealing, and which can fabricate an interconnection for a semiconductor device which has a low elect... | 04/19/2011 |
| 7911061 | Semiconductor device A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a copper connector configured for attachment to the contact area, and a ... | 03/22/2011 |
| 7902670 | Display panel structure and manufacture method thereof A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conducti... | 03/08/2011 |
| 7868457 | Thermo-compression bonded electrical interconnect structure and method An electrical structure and method for forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mec... | 01/11/2011 |
| 7855458 | Electronic component An electronic component includes a substrate, and a capacitor unit on the substrate. The capacitor unit has a laminate structure including a first electrode layer provided on the substrate, a second electrode layer opposed to the first electrode layer, and a dielect... | 12/21/2010 |
| 7851920 | Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating thin film transistor substrate Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate, and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper nitride and a copper conducti... | 12/14/2010 |
| 7843067 | Method and structure of integrated rhodium contacts with copper interconnects The present disclosure relates to a microelectronic structure and the manufacture of the microelectronic structure. Specifically, the disclosure relates to an interconnect barrier layer between a rhodium contact structure and a copper interconnect structure in a mic... | 11/30/2010 |
| 7830015 | Memory device with improved data retention The present memory device include first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrodes and into which ions from the passive layer may be provided, and from which the ions ma... | 11/09/2010 |
| 7821135 | Semiconductor device with improved stress migration resistance and manufacturing process therefor A semiconductor device of improved stress-migration resistance and reliability includes an insulating film having formed therein a lower interconnection consisting of a barrier metal film and a copper-silver alloy film, on which is then formed an interlayer insulati... | 10/26/2010 |
| 7821136 | Conductive layers and fabrication methods thereof Methods for forming conductive layers. A layer of metal composite is applied on a substrate, comprising a plurality of metal flakes, a plurality of nanometer metal spheres, and a plurality of mixed metal precursors. The plurality of mixed metal precursors comprises ... | 10/26/2010 |
| 7808108 | Thin film conductor and method of fabrication A thin film conductor having improved adhesion and superior conductivity, a method for fabricating the same, a thin film transistor (TFT) plate including the thin film conductor, and a method for fabricating the TFT plate are provided. The thin film conductor includ... | 10/05/2010 |
| 7808109 | Fretting and whisker resistant coating system and method An electrically conductive material coated with a plurality of layers, includes a metal or metal alloy substrate; a barrier layer deposited on said substrate effective to inhibit diffusion of constituents of said substrate to said plurality of layers; a sacrificial ... | 10/05/2010 |
| 7800229 | Semiconductor device and method for manufacturing same An improved SIV resistance and an improved EM resistance are achieved in the coupling structure containing copper films. A semiconductor device includes: a semiconductor substrate; a second insulating layer formed on or over the semiconductor substrate; a second bar... | 09/21/2010 |
| 7772704 | Semiconductor device As a discrete semiconductor chip, there has been known one that enables flip-chip mounting by providing first and second electrodes in a current path above a first surface of a semiconductor substrate. However, there is a problem that a horizontal current flow in th... | 08/10/2010 |
| 7745937 | Semiconductor device and method of manufacturing the same A first gas including a silicon-containing compound is introduced into a vacuum chamber, to expose a semiconductor substrate placed in the chamber to the first gas atmosphere (silicon processing step). Then the pressure inside the vacuum chamber is reduced to a leve... | 06/29/2010 |
| 7709958 | Methods and structures for interconnect passivation One or more embodiments of the present invention relate to structures obtained by methods (a) for growing a film by an intermixing growth process, or (b) by depositing a film, which film includes chalcogenides of copper and/or silver (but excluding oxides), such as,... | 05/04/2010 |
| 7709959 | Article with a metal layer on a substrate An article includes a substrate and a metal layer adhered to a surface of the substrate so as to form an interface. The interface comprises an atomic concentration of carbon that is about 10% or less and of oxygen that is about 10% or less as determined by x-ray pho... | 05/04/2010 |
| 7683488 | Semiconductor device A semiconductor device is provided having an insulating layer structure with a low dielectric constant and excellent barrier properties against copper. This semiconductor device has a copper wiring layer and includes at least one layered structure having a copper wi... | 03/23/2010 |
| 7683489 | Semiconductor device and fabricating method thereof A semiconductor device and a fabricating method thereof are provided. A PMD layer and at least one IMD layer are formed on a semiconductor substrate. A through-electrode penetrates through the PMD layer and the IMD layer, and a connecting electrode connects to the t... | 03/23/2010 |
| 7679194 | Method of fabricating semiconductor memory device and semiconductor memory device driver Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent elem... | 03/16/2010 |
| 7679193 | Use of AIN as cooper passivation layer and thermal conductor A copper interconnect structure is disclosed as comprising a copper layer and an aluminum nitride layer formed over the copper layer. The aluminum nitride layer passivates the copper layer surface and enhances the thermal conductivity of a semiconductor substrate by... | 03/16/2010 |
