Class 257/760 - Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein there is at least one separating
No. of patents: 903
Last issue date: 12/13/2011

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Number	Title	Issue Date
8076780	Semiconductor device with pads of enhanced moisture blocking ability A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circ...	12/13/2011
8053893	Semiconductor device and manufacturing method thereof The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon car...	11/08/2011
8008777	Method for manufacturing semiconductor device and the semiconductor device An etching stopper film is formed on top of a first insulating film. The etching stopper film is a film formed by depositing at least two films, made of constituent materials identical in quality to each other, one another. Subsequently, a first opening pattern is f...	08/30/2011
7982315	Semiconductor structure and method of making the same A semiconductor device is provided. An amorphous silicon layer that acts as a UV blocking layer replaces a conventional silicon-rich oxide (SRO) layer or the super silicon-rich oxide (SSRO) layer. By doing this, the process window is increased. In addition, silicon ...	07/19/2011
7977797	Integrated circuit with contact region and multiple etch stop insulation layer The present invention is a semiconductor contact formation system and method. Contact insulation regions are formed with multiple etch stop sublayers that facilitate formation of contacts. This contact formation process provides relatively small substrate connection...	07/12/2011
7956467	Semiconductor device and method of manufacturing the same A method includes burying a conductive pattern in an insulating film made of SiOH, SiCOH or organic polymer, treating surfaces of the insulating film and the conductive pattern with plasma which includes a hydrocarbon gas as a treatment gas, and forming a diffusion ...	06/07/2011
7830014	Method for fabricating semiconductor device and semiconductor device A method for fabricating a semiconductor device includes the steps of: forming a plurality of lower interconnections at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming ...	11/09/2010
7786587	Semiconductor device and method for manufacturing thereof A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which...	08/31/2010
7777343	Semiconductor device and manufacturing method thereof The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon car...	08/17/2010
7768129	Metal etching method for an interconnect structure and metal interconnect structure obtained by such method A metal interconnects structure, comprises a substrate (11), a dielectric layer (12) lying above the substrate, a stop layer (13) for metal etching lying above the dielectric layer, a metal layer (15′) lying above the stop layer, said m...	08/03/2010
7768130	BEOL interconnect structures with simultaneous high-k and low-k dielectric regions A method for fabricating and back-end-of-line (BEOL) metalization structures includes simultaneous high-k and low-k dielectric regions. An interconnect structure includes a first inter-level dielectric (ILD) layer and a second ILD layer with the first ILD layer unde...	08/03/2010
7755197	UV blocking and crack protecting passivation layer A semiconductor device comprises a substrate, a patterned metal conductor layer over the substrate, and a passivation layer. The passivation layer may comprise a UV blocking, protection layer, over at least a portion of the substrate and patterned metal conductor la...	07/13/2010
7732923	Impurity doped UV protection layer An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging underlying material layers and electrical devices. The UV protection ...	06/08/2010
7671474	Integrated circuit package device with improved bond pad connections, a lead-frame and an electronic device A semiconductor device package (10) with a substantially rectangular shape comprising: a die attach pad (12) having a top surface and a bottom surface; a plurality of contact pads (26i-26n) provided in at least four rows tha...	03/02/2010
7622808	Semiconductor device and having trench interconnection A semiconductor device includes a first interconnection layer and a interlayer insulating layer. The first interconnection layer is formed on a upper side of a substrate, and includes a first interconnection. The interlayer insulating layer is formed on the first in...	11/24/2009
7608928	Laminated body and semiconductor device A laminate includes a copper wiring layer (20) provided over a semiconductor layer and having a specific pattern, a protective layer (30) formed of a polybenzoxazole resin layer provided on the copper wiring layer (20), and an insulating layer (...	10/27/2009
7605472	Interconnections having double capping layer and method for forming the same Provided are an interconnection of a semiconductor device which includes a capping layer and a method for forming the interconnection. The interconnection of the semiconductor device is a copper damascene interconnection where the capping layer is formed as a dual l...	10/20/2009
7602067	Hetero-structure variable silicon rich nitride for multiple level memory flash memory device Charge storage stacks containing hetero-structure variable silicon richness nitride for memory cells and methods for making the charge storage stacks are provided. The charge storage stack can contain a first insulating layer on a semiconductor substrate; n charge s...	10/13/2009
7602066	Method of filling structures for forming via-first dual damascene interconnects A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided. After application to a substrate, the bottom anti-reflective coating ...	10/13/2009
7595556	Semiconductor device and method for manufacturing the same Embodiments relate to a semiconductor device and a method for manufacturing the same. According to embodiments, the semiconductor device may include a semiconductor substrate formed with a metal interconnection, a first interlayer dielectric layer formed on the meta...	09/29/2009
7554200	Semiconductor devices including porous insulators Semiconductor devices with porous insulative materials are disclosed. The porous insulative materials may include a consolidated material with voids dispersed therethrough. The voids may be defined by shells of microcapsules. The voids impart the dielectric material...	06/30/2009
7535107	Tiled construction of layered materials A method is described for combining the diverse strengths of two materials in a tiled film construction. The first material provides a foundation of intersecting grid lines on a substrate and the second material is contained within the grid lines and has a valued pr...	05/19/2009
7518246	Atomic layer deposition of CeO/AlOfilms as gate dielectrics The use of atomic layer deposition (ALD) to form a nanolaminate layered dielectric layer of cerium oxide and aluminum oxide acting as a single dielectric layer with a ratio of approximately two to one between the cerium oxide and the aluminum oxide, and a method of ...	04/14/2009
7498677	Semiconductor device A semiconductor device has a first interlayer insulating film formed on a substrate, having a first interconnection buried therein, and having a depressed portion and an insulating barrier film formed on the first interlayer insulating film. A second interlayer insu...	03/03/2009
7495337	Dual-gate device and method A dual-gate device is formed over and insulated from a semiconductor substrate which may include additional functional circuits that can be interconnected to the dual-gate device. The dual-gate device includes two semiconductor devices formed on opposite surfaces of...	02/24/2009
7470989	Technique for perfecting the active regions of wide bandgap semiconductor nitride devices This invention pertains to electronic/optoelectronic devices with reduced extended defects and to a method for making it. The device includes a substrate, a semiconductor active material deposited on said substrate, and electrical contacts. The semiconductor active ...	12/30/2008
7466026	Passivation layer assembly on a substrate and display substrate having the same A passivation layer assembly and a display substrate having the same are presented. The passivation layer assembly is positioned on a substrate having a thin film assembly and protects the thin film assembly. The thin film assembly includes a first passivation layer...	12/16/2008
7443031	Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between up...	10/28/2008
7429793	Semiconductor device having an electronic circuit disposed therein A semiconductor device and a fabrication method thereof are provided. A semiconductor device which is packaged as it includes a semiconductor in which an electronic circuit is disposed, the semiconductor device including: a substrate; a semiconductor chip which has ...	09/30/2008
7425735	Multi-layer phase-changeable memory devices A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase...	09/16/2008
7425764	Top layers of metal for high performance IC's A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an ...	09/16/2008
7423346	Post passivation interconnection process and structures A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of poly...	09/09/2008
7423300	Single-mask phase change memory element A memory device. An array of memory elements is formed on a semiconductor chip. A parallel array of word lines extends in a first direction, connecting each memory element to a data source, and a parallel array of bit lines extends in a second direction, connecting ...	09/09/2008
7420275	Boron-doped SIC copper diffusion barrier films Copper diffusion barrier films having a boron-doped silicon carbide layer with at least 25% boron by atomic weight of the layer composition have advantages for semiconductor device integration schemes. The films have an integration worthy etch selectivity to carbon ...	09/02/2008
7416996	Method of making circuitized substrate A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part ...	08/26/2008
7414315	Damascene structure with high moisture-resistant oxide and method for making the same A semiconductor device includes a substrate, an inter-metal dielectric (IMD) layer over the substrate, and either a nitrogen-containing tetraethoxysilane (TEOS) oxide layer or an oxygen-rich TEOS oxide layer over the IMD layer. The molecular ratio of oxygen in the o...	08/19/2008
7411301	Semiconductor integrated circuit device In a semiconductor integrated circuit device having plural layers of buried wirings, it is intended to prevent the occurrence of a discontinuity caused by stress migration at an interface between a plug connected at a bottom thereof to a buried wiring and the buried...	08/12/2008
7408260	Microelectronic assemblies having compliant layers A microelectronic assembly includes a microelectronic element such as a semiconductor chip or wafer having a first surface and contacts accessible at the first surface, a compliant layer overlying the first surface of the microelectronic element, and conductive prot...	08/05/2008
7405482	High-k dielectric film, method of forming the same and related semiconductor device A high-k dielectric film, a method of forming the high-k dielectric film, and a method of forming a related semiconductor device are provided. The high-k dielectric film includes a bottom layer of metal-silicon-oxynitride having a first nitrogen content and a first ...	07/29/2008
7402846	Electrostatic discharge (ESD) protection structure and a circuit using the same An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one bod...	07/22/2008

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Class 257/760 - Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride)