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| Number | Title | Issue Date |
| 6004878 | Method for silicide stringer removal in the fabrication of semiconductor integrated circuits Sidewall spacers, adjacent a gate electrode and source/drain regions of a MOS transistor are formed of a dielectric material that can be etched selectively to the material selected as the isolation dielectric. A layer of silicide forming metal is deposite... | 12/21/1999 |
| 5998871 | Metal plug electrode in semiconductor device and method for forming the same A semiconductor device, has a TiN plug is formed to filled up a contact hole which is formed to penetrate through an insulator film on a conductive silicon layer in a surface region of a silicon substrate. A first titanium silicide film is formed on a bot... | 12/07/1999 |
| 5982036 | Multi-layered structure for ohmic electrode fabrication An ohmic electrode for III-V compound semiconductors such as GaAs semiconductors which has practically satisfactory characteristics is disclosed. A non-single crystal InAs layer, Ni film, WSi film and W film are sequentially deposited on an n+ ... | 11/09/1999 |
| 5945739 | Semiconductor device having a conductor through an inter-level layer and a spin-on-glass in the inter-level layer with substantially planar upper surfaces of the conductor, the inter-level layer, and the spin-on-glass A multi-layered wiring structure includes a lower wiring having an upper surface, a first inter-level insulating layer having a first flat upper surface substantially coplanar with the upper surface of the lower conductive wiring and a recess contiguous t... | 08/31/1999 |
| 5945719 | Semiconductor device having metal silicide layer A gate oxide film is formed on an element region at the surface of a silicon substrate. A polycrystalline silicon film doped with a large amount of phosphorus is formed on the gate oxide by the CVD method. A titanium nitride layer with about 10 nm thickne... | 08/31/1999 |
| 5942767 | Thin film transistors including silicide layer and multilayer conductive electrodes Thin film transistors include a silicide layer between a doped amorphous silicon layer and source/drain electrodes. The source/drain electrodes include a first non-silicidable layer and a second non-oxidizing layer. In order to form the silicide layer, a ... | 08/24/1999 |
| 5907188 | Semiconductor device with conductive oxidation preventing film and method for manufacturing the same A semiconductor device includes a semiconductor substrate, and a laminated film insulatively formed over the semiconductor substrate, wherein the laminated film includes a semiconductor film, a metal film of refractory metal formed on the semiconductor fi... | 05/25/1999 |
| 5895953 | Ohmic contact to lightly doped islands from a conductive rapid diffusion buried layer A buried silicide layer 111 in a bonded wafer 105 makes ohmic contact to a heavily doped buried layer 125. A dopant rapidly diffuses through the silicide layer and into the adjacent semiconductor to form the buried layer.... | 04/20/1999 |
| 5883412 | Low gate resistance high-speed MOS-technology integrated structure A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a se... | 03/16/1999 |
| 5880505 | C49-structured tungsten-containing titanium salicide structure A C49-structured titanium silicide film contains at least a refractory metal having a higher melting point than titanium in the form of a substitutional solid solution, wherein a concentration of the refractory metal to a total amount of titanium and the ... | 03/09/1999 |
| 5877086 | Metal planarization using a CVD wetting film The present invention is a process for planarization of substrate layers comprising apertures to form continuous, void-free contacts or vias in sub-half micron applications. A CVD silicon or metal silicide wetting layer is deposited onto the substrate lay... | 03/02/1999 |
| 5872385 | Conductive interconnect structure and method of formation In one embodiment, delamination of a patterned silicon nitride anti-reflective layer (26) from an underlying patterned tungsten silicide layer (32), is prevented by forming a thin silicon layer (30) between the patterned tungsten silicide layer (32) and t... | 02/16/1999 |
| 5844284 | Damage free buried contact using salicide technology A semiconductor cell with a buried contact uses highly selective etching techniques in combination with a thin oxide etching stop to prevent damage to the buried contact during the etching process. A cavity is formed in the oxide layer between the buried ... | 12/01/1998 |
| 5834846 | Semiconductor device with contact structure and method of manufacturing the same A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of a high melting point metal deposited on the diffusion region, an insulating film formed on th... | 11/10/1998 |
| 5828131 | Low temperature formation of low resistivity titanium silicide Low resistivity titanium silicide, and semiconductor devices incorporating the same, may be formed by titanium alloy comprising titanium and 1-20 atomic percent refractory metal deposited in a layer overlying a silicon substrate, the substrate is then hea... | 10/27/1998 |
| 5825090 | High power semiconductor device and method of making same This high-power semiconductor device comprises (a) a disk of refractory metal having flat faces at its opposite sides and (b) two wafers of a semiconductor material having a coefficient of expansion similar to that of the refractory metal, the wafers bein... | 10/20/1998 |
| 5818092 | Polycide film A method of forming a polycide thin film. First, a silicon layer is formed. Next, a thin barrier layer is formed on the first silicon layer. A second silicon layer is then formed on the barrier layer. Next, a metal layer is formed on the second silicon la... | 10/06/1998 |
| 5796166 | Tasin oxygen diffusion barrier in multilayer structures A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon an... | 08/18/1998 |
| 5793788 | Semiconductor light emitting element with p-type non-alloy electrode including a platinum layer and method for fabricating the same A semiconductor light emitting element includes a p-type electrode which in turn includes a contact electrode layer including at least a Pt layer. Particularly, the semiconductor light emitting element further includes a layered structure including at lea... | 08/11/1998 |
| 5793111 | Barrier and landing pad structure in an integrated circuit A method is provided for forming an improved landing pad with barrier of a semiconductor integrated circuit, and an integrated circuit formed according to the same. An opening is formed through a first dielectric layer to expose a portion of a diffused re... | 08/11/1998 |
| 5780929 | Formation of silicided junctions in deep submicron MOSFETS by defect enhanced CoSi2 formation Deep submicran mosfets with defect enhanced CoSi2 formation and improved silicided junctions. A silicon wafer having a diffusion window is first precleaned with hydrofluoric acid. After the HF precleaning, the silicon wafer is transferred to a conventiona... | 07/14/1998 |
| 5767558 | Structures for preventing gate oxide degradation The degradation of integrity of the gate oxide in a CMOS transistor due to the formation of a tungsten silicide strapping layer on the polycrystalline silicon gate as a result of the migration of fluorine atoms from the tungsten hexafluoride used to form ... | 06/16/1998 |
| 5736776 | Semiconductor device and method of manufacturing the same On a p+ diffused region which is to be a lower electrode of a capacitor, a silicon nitride film which is a capacitor insulating layer is formed. An upper electrode is formed on this silicon nitride film. The upper electrode has a non-doped poly... | 04/07/1998 |
| 5734200 | Polycide bonding pad structure A bonding pad adapted for use with an Aluminum wire that resists stresses that would otherwise peel the pad from the substrate. The pad has a polysilicon layer adhered to an insulating layer on a semiconductor substrate, a overlying refractory metal polyc... | 03/31/1998 |
| 5729054 | Conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an noble-metal-insulator-alloy barrier layer (e.g. Pd-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the noble-metal-insula... | 03/17/1998 |
| 5717253 | Structure for forming an improved quality silicidation layer A semiconductor device having a silicide layer with substantially even thickness, and a method for making a silicide layer having substantially even thickness in a semiconductor device are disclosed. A prefereably doped polycrystalline silicon layer is formed ... | 02/10/1998 |
| 5708291 | Silicide agglomeration fuse device A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections. The fusible link device of the invention includes a silicide layer and a polysilicon layer formed on the silicide layer and has a first un-prog... | 01/13/1998 |
| 5693979 | Semiconductor device A semiconductor device having a first insulation film, a base contact and a second insulation film on a semiconductor substrate. The first and second insulation films and the base contact respectively have openings which forms a hole extending therethroug... | 12/02/1997 |
| 5686760 | Eutectic Cu-alloy wiring structure in a semiconductor device In a semiconductor device having a wiring groove in alignment with a contact hole, a wiring structure includes a diffusion preventing film formed on the bottom and side walls of the wiring groove, the diffusion preventing film being composed of a barrier ... | 11/11/1997 |
| 5670820 | Semiconductor element incorporating a resistive device In a semiconductor polycide resistive element having a first region of polysilicon of one conductivity type and second regions of polysilicon of opposite conductivity type, with silicide overlying the polysilicon but not the first region, the edges of the... | 09/23/1997 |
| 5670794 | Thin film transistors A semiconductor processing method of forming a conductive polysilicon line relative to a substrate includes, a) providing a line of silicon on a substrate, the line having an outer top surface and outwardly exposed opposing outer sidewall surfaces, the li... | 09/23/1997 |
| 5652464 | Integrated circuit with a titanium nitride contact barrier having oxygen stuffed grain boundaries Methods of forming, in an integrated circuit, aluminum-silicon contacts with a barrier layer is disclosed. The barrier layer is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom ... | 07/29/1997 |
| 5631479 | Semiconductor device with laminated refractory metal schottky barrier gate electrode A semiconductor device includes a semiconductor substrate having a surface; an active layer of a compound semiconductor disposed at the surface of the semiconductor substrate; and a Schottky barrier gate electrode including a multi-layer film alternately ... | 05/20/1997 |
| 5627105 | Plasma etch process and TiSix layers made using the process A method for making an improved metal silicide layer on a silicon substrate by plasma bombardment of the substrate with Ne ions to remove the native oxide without damage or significant implantation of Ne atoms into said silicon, depositing a metal layer o... | 05/06/1997 |
| 5614756 | Metal-to-metal antifuse with conductive According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive material disposed between two metallization layers, According to... | 03/25/1997 |
| 5612571 | Sputtered silicide film According to the present invention, metal silicide grains are coupled with each other in a linked manner so as to provide a metal silicide phase, and Si grains forming a Si phase are dispersed in the gaps of the metal silicide phase discontinuously so as ... | 03/18/1997 |
| 5608266 | Thin film for a multilayer semiconductor device for improving thermal stability and a method thereof A method and a device directed to the same, for stabilizing cobalt silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structure... | 03/04/1997 |
| 5600153 | Conductive polysilicon lines and thin film transistors A semiconductor processing method of forming a conductive polysilicon line relative to a substrate includes, a) providing a line of silicon on a substrate, the line having an outer top surface and outwardly exposed opposing outer sidewall surfaces, the li... | 02/04/1997 |
| 5596221 | Bipolar transistor with emitter double contact structure An n type collector region is formed at a main surface of a p type silicon substrate. A p type base region is formed at a surface of the collector region. An n type emitter region is formed at a surface of the base region. A polycrystalline silicon layer ... | 01/21/1997 |
| 5591999 | Electrically erasable programmable read only memory device with an improved memory cell pattern layout A semiconductor memory device according to the present invention comprises a plurality of electrically rewritable memory cells, each of which contains a drain and a source, at least one source line coupled to the sources of the memory cells through a cont... | 01/07/1997 |
