Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 8188599 | Semiconductor device, its manufacturing method, and sputtering target material for use in the method A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and exce... | 05/29/2012 |
| 8178973 | Copper wire, method for fabricating the same, and thin film transistor substrate with the same The present invention relates to a copper wire in a semiconductor device in which a barrier layer is formed for improving adhesion of a copper wire without any additional fabricating step; a method for fabricating the same, and a flat panel display device with the s... | 05/15/2012 |
| 8169077 | Dielectric interconnect structures and methods for forming the same Dielectric interconnect structures and methods for forming the same are provided. Specifically, the present invention provides a dielectric interconnect structure having a noble metal layer (e.g., Ru, Ir, Rh, Pt, RuTa, and alloys of Ru, Ir, Rh, Pt, and RuTa) that is... | 05/01/2012 |
| 8169079 | Copper interconnection structures and semiconductor devices A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer and a barrier layer including a metal element and copper, formed between the insulating layer and the interconnec... | 05/01/2012 |
| 8169078 | Electrode structure, semiconductor element, and methods of manufacturing the same According to the present invention, there is provided an electrode structure which includes: a nitride semiconductor layer; an electrode provided over the nitride semiconductor layer; and an electrode protective film provided over the electrode, wherein the nitride ... | 05/01/2012 |
| 8164190 | Structure of power grid for semiconductor devices and method of making the same An embodiment of the invention provides a semiconductor structure, which may include a stud of a first conductive material formed inside a dielectric layer; a via of a second conductive material having a bottom and sidewalls with the bottom and the sidewalls being c... | 04/24/2012 |
| 8159069 | Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in ... | 04/17/2012 |
| 8138604 | Metal cap with ultra-low k dielectric material for circuit interconnect applications An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of abo... | 03/20/2012 |
| 8138605 | Multiple layer barrier metal for device component formed in contact trench A semiconductor device formed on a semiconductor substrate may include a component formed in a contact trench located in an active cell region. The component may comprise a barrier metal deposited on a bottom and portions of sidewalls of the contact trench and a tun... | 03/20/2012 |
| 8134234 | Application of Mn for damage restoration after etchback Back end of line interconnect structures and methods of making a back end of line interconnect structure are provided. The back end of line interconnect structure contains a first interconnect layer containing a first conductive feature and a first dielectric layer;... | 03/13/2012 |
| 8125084 | Semiconductor device and semiconductor device manufacturing method A semiconductor device according to the present invention includes: a semiconductor substrate; a first copper interconnection provided on the semiconductor substrate; an insulating layer provided over the first copper interconnection and having a hole extending ther... | 02/28/2012 |
| 8125085 | Semiconductor device having wiring with oxide layer of impurity from the wiring A semiconductor device includes an interlayer film formed over a semiconductor substrate. A groove is formed in the interlayer film. A wiring formed in the groove is a copper alloy including copper and a metal element. An oxide layer of the metal element is formed o... | 02/28/2012 |
| 8125083 | Protective barrier layer for semiconductor device electrodes A semiconductor device includes a die with at least one electrode on a surface thereof, at least one solderable contact formed on the electrode, and a passivation layer formed over the electrode and including an opening that exposes the solderable contact. The passi... | 02/28/2012 |
| 8120179 | Air gap interconnect structures and methods for forming the same A metal interconnect structure includes at least a pair of metal lines, a cavity therebetween, and a dielectric metal-diffusion barrier layer located on at least one portion of walls of the cavity. After formation of a cavity between the pair of metal lines, the die... | 02/21/2012 |
| 8120180 | Semiconductor device including ruthenium electrode and method for fabricating the same A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a fi... | 02/21/2012 |
| 8106512 | Low resistance high reliability contact via and metal line structure for semiconductor device The structures and methods described above provide mechanisms to improve interconnect reliability and resistivity. The interconnect reliability and resistivity are improved by using a composite barrier layer, which provides good step coverage, good copper diffusion ... | 01/31/2012 |
| 8102051 | Semiconductor device having an electrode and method for manufacturing the same The semiconductor device according to the present invention includes a first insulating layer made of a material containing Si and O, a groove shaped by digging down the first insulating layer, an embedded body, embedded in the groove, made of a metallic material ma... | 01/24/2012 |
| 8102050 | Semiconductor device and the method of manufacturing the same A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an und... | 01/24/2012 |
| 8097948 | Semiconductor device and manufacturing method of semiconductor device To provide a semiconductor device having a structure in which a barrier metal film containing nitrogen is formed in a connection surface between a copper alloy wiring and a via, in which the electric resistance between the copper alloy wiring and the via can be prev... | 01/17/2012 |
| 8089154 | Electronic component formed with barrier-seed layer on base material It is an object of the present invention to provide a technology for forming an ULSI fine copper wiring by a simpler method. An electronic component in which a thin alloy film of tungsten and a noble metal used as a barrier-seed layer for an ULSI fine copper wiring ... | 01/03/2012 |
| 8084861 | Connection structure semiconductor chip and electronic component including the connection structure and methods for producing the connection structure Connection structure (5) for attaching a semiconductor chip (2) to a metal substrate (4) is provided which has a plurality of electrically conducting layers (11, 12, 13, 14) arranged in a stack. The stack has a contact layer (11) f... | 12/27/2011 |
| 8067836 | Semiconductor device with reduced increase in copper film resistance A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen ... | 11/29/2011 |
| 8058728 | Diffusion barrier and adhesion layer for an interconnect structure An interconnect structure is provided. The interconnect structure includes an interconnect opening formed within a dielectric material, a diffusion barrier on the dielectric material, where the diffusion barrier contains a compound from a thermal reaction between co... | 11/15/2011 |
| 8039961 | Composite carbon nanotube-based structures and methods for removing heat from solid-state devices One embodiment involves an article of manufacture that includes: a copper substrate plug with a front surface and a back surface; a catalyst on top of a single surface of the copper substrate plug; and a thermal interface material on top of the single surface of the... | 10/18/2011 |
| 8030772 | Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region Devices are presented including: a substrate including a dielectric region and a conductive region; a molecular self-assembled layer selectively formed on the dielectric region; and a capping layer formed on the conductive region, where the capping layer is an elect... | 10/04/2011 |
| 8026605 | Interconnect structure and method of manufacturing a damascene structure An interconnect structure is provided, including a layer of dielectric material having at least one opening and a first barrier layer on sidewalls defining the opening. A ruthenium-containing second barrier layer overlays the first barrier layer, the second barrier ... | 09/27/2011 |
| 8013445 | Low resistance high reliability contact via and metal line structure for semiconductor device A semiconductor contact structure includes a copper plug formed within a dual damascene, single damascene or other opening formed in a dielectric material and includes a composite barrier layer between the copper plug and the sidewalls and bottom of the opening. The... | 09/06/2011 |
| 8008774 | Multi-layer metal wiring of semiconductor device preventing mutual metal diffusion between metal wirings and method for forming the same A multi-layer metal wiring of a semiconductor device and a method for forming the same are disclosed. The multi-layer metal wiring of the semiconductor device includes a lower Cu wiring, and an upper Al wiring formed to be contacted with the lower Cu wiring, and a d... | 08/30/2011 |
| 7986040 | Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal regio... | 07/26/2011 |
| 7977794 | Aluminum metal line of a semiconductor device and method of fabricating the same A method of forming an aluminum line of a semiconductor device where first A metal thin layer, a first aluminum layer, and a first B metal thin layer are sequentially applied on an interlayer insulating layer. A photolithography process is performed to form a metal ... | 07/12/2011 |
| 7977792 | Semiconductor device A semiconductor device including a first insulating layer having a hydroxyl radical formed over a semiconductor substrate; a line layer having a plurality of line patterns formed over the first insulating layer, the plurality if line patterns being arranged such tha... | 07/12/2011 |
| 7977793 | Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffus... | 07/12/2011 |
| 7977791 | Selective formation of boron-containing metal cap pre-layer An interconnect structure with improved reliability is provided. The interconnect structure includes a semiconductor substrate; a dielectric layer over the semiconductor substrate; a metallic wiring in the dielectric layer; a pre-layer over the metallic wiring, wher... | 07/12/2011 |
| 7973409 | Hybrid interconnect structure for performance improvement and reliability enhancement The present invention provides an interconnect structure (of the single or dual damascene type) and a method of forming the same, in which a dense (i.e., non-porous) dielectric spacer is present on the sidewalls of a dielectric material. More specifically, the inven... | 07/05/2011 |
| 7964965 | Forming thick metal interconnect structures for integrated circuits Embodiments of an apparatus and methods for forming thick metal interconnect structures for integrated structures are generally described herein. Other embodiments may be described and claimed. ... | 06/21/2011 |
| 7964966 | Via gouged interconnect structure and method of fabricating same An interconnect structure including a gouging feature at the bottom of a via opening and a method of forming the same are provided. The method of the present invention does not disrupt the coverage of the deposited trench diffusion barrier in a line opening that is ... | 06/21/2011 |
| 7960832 | Integrated circuit arrangement with layer stack An integrated circuit arrangement includes an electrically conductive conduction structure made from copper or a copper alloy. At a side wall of the conduction structure, there is a layer stack which includes at least three layers. Despite very thin layers in the la... | 06/14/2011 |
| 7956464 | Sputtering target and semiconductor device manufactured using the same A sputtering target includes a tungsten (W)-nickel (Ni) alloy, wherein the nickel (Ni) is present in an amount of between about 0.01 weight % and about 1 weight %. ... | 06/07/2011 |
| 7956465 | Reducing resistivity in interconnect structures of integrated circuits An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, an oxide-based barrier layer directly on sidewalls of the op... | 06/07/2011 |
| 7956463 | Large grain size conductive structure for narrow interconnect openings An interconnect structure having reduced electrical resistance and a method of forming such an interconnect structure are provided. The interconnect structure includes a dielectric material including at least one opening therein. The at least one opening is filled w... | 06/07/2011 |
