A fork with timer for providing a cue to a user after an elapsed period of time for indicating that another bite of food using the fork may be taken.
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| Number | Title | Issue Date |
| 7880302 | Semiconductor device having metal wirings of laminated structure A semiconductor device that includes a metal wiring formed on the insulating film and having a main wiring portion laminated with a plurality of metal films and a metal protection film formed at least on the upper surfaces of the main wiring portion and made of a pr... | 02/01/2011 |
| 7671470 | Enhanced mechanical strength via contacts The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or disco... | 03/02/2010 |
| 7573132 | Wiring structure of a semiconductor device and method of forming the same A wiring structure of a semiconductor device may have an insulation layer, a spacer and a plug. The insulation layer may be provided on a substrate and may have an opening through which a contact region of the substrate is exposed. The spacer may be provided on a si... | 08/11/2009 |
| 7557445 | Multilayer substrate and the manufacturing method thereof A multilayer substrate, comprising a first substrate, a connector and a second substrate, is disclosed. The first substrate has a circuit pattern. The connector, coupling onto the first substrate, has a ring structure, in which a plurality of holes are separated a p... | 07/07/2009 |
| 7501705 | Configuration terminal for integrated devices and method for configuring an integrated device A configuration terminal for integrated devices includes a first and a second portion structurally independent and connected to respective first and second terminals and it has at least one contact terminal suitable to be selectively connected to such first and seco... | 03/10/2009 |
| 7432596 | Apparatus and method for bonding silicon wafer to conductive substrate A system and method is disclosed for bonding a substrate to a semiconductor die that is prone to curling when subjected to an elevated temperature in a solder reflow oven, for example, thereby improving the electrical and mechanical bonding for large dies, wafers, c... | 10/07/2008 |
| 7423332 | Vertical laminated electrical switch circuit A vertical laminated electrical switch circuit includes a first, second, and third ceramic substrate positioned in juxtaposed relationship relative to each other. The circuit also includes a first and second electrical device electrically coupled to each other. The ... | 09/09/2008 |
| 7400041 | Compliant multi-composition interconnects A compliant interconnect with two or more layers of metal of two or more compositions with internal stresses is described herein. ... | 07/15/2008 |
| 7399996 | LED package and method for producing the same An LED package and method for producing the same are described. The LED package has an LED die with a conductive region-forming surface and a plurality of conductive regions disposed on the conductive region-forming surface. An insulation layer is formed on the cond... | 07/15/2008 |
| 7400040 | Thermal interface apparatus, systems, and methods An apparatus and system, as well as fabrication methods therefor, may include a substrate coupled to a first material and a second material. The first and second materials may comprise adjacent metals, and may have different coefficients of thermal expansion suffici... | 07/15/2008 |
| 7391116 | Fretting and whisker resistant coating system and method A coated electrically conductive substrate has particular utility where there are multiple closely spaced leads and tin whiskers constitute a potential short circuit. This electrically conductive substrate has a plurality of leads separated by a distance capable of ... | 06/24/2008 |
| 7382050 | Semiconductor device and method for producing the same A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so as to cover an upper surface and both side surfaces of the conductor ... | 06/03/2008 |
| 7378745 | Package substrate for a semiconductor device having thermoplastic resin layers and conductive patterns A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a singl... | 05/27/2008 |
| 7366629 | High frequency module board device The present invention relates to a high frequency module board device having a high frequency transmitting and receiving circuit for modulating and demodulating a high frequency signal. The high frequency module board device comprises a base board (2) whose m... | 04/29/2008 |
| 7358618 | Semiconductor device and manufacturing method thereof A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce s... | 04/15/2008 |
| 7329953 | Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same A method for fabricating an insulating layer having contact openings of varying depths for logic/DRAM circuits is achieved using a single mask and etch step. After forming stacked or trench capacitors, a planar insulating layer is formed. Contact openings are etched... | 02/12/2008 |
| 7320932 | Semiconductor device and manufacturing method thereof A semiconductor device of the present invention is furnished with (a) a first protection film, formed on a substrate, having an opening section on an electrode pad, (b) a protrusion electrode, connected on the electrode pad at the opening section, whose peripheral p... | 01/22/2008 |
| 7321166 | Wiring board having connecting wiring between electrode plane and connecting pad It is to provide a wiring board for a semiconductor integrated circuit package, which exhibits an excellent signal property and a high effect for decreasing the switching noise at the time of mounting an LSI of an area-array structure. In a multilayer wiring board f... | 01/22/2008 |
| 7319381 | Signal receiving apparatus A signal receiving apparatus includes a receiving circuit board having a signal receiving circuit formed on one side of an insulating substrate, a wide conductive pattern formed on the other side of the insulating substrate that faces a forming position of the signa... | 01/15/2008 |
| 7304377 | Package substrate, integrated circuit apparatus, substrate unit, surface acoustic wave apparatus, and circuit device On a piezoelectric substrate 23, there are provided surface acoustic wave devices F1 and F2 in which predetermined circuit patterns are formed, and a package substrate 11 comprising side vias 16 formed in a caved manner in ... | 12/04/2007 |
| 7276442 | Method for forming a metallization layer A method for depositing metal on a semiconductor device having a substrate, an exposed first surface, and an exposed second surface is provided. Metal ions are deposited on the exposed first surface and on the exposed second layer by applying a first voltage between... | 10/02/2007 |
| 7273804 | Internally reinforced bond pads Disclosed is a reinforced bond pad structure having nonplanar dielectric structures and a metallic bond layer conformally formed over the nonplanar dielectric structures. The nonplanar dielectric structures are substantially reproduced in the metallic bond layer so ... | 09/25/2007 |
| 7265448 | Interconnect structure for power transistors An integrated circuit according to the present invention includes first, second and third plane-like metal layers. A first transistor has a first control terminal and first and second terminals. The second terminal communicates with the first plane-like metal layer.... | 09/04/2007 |
| 7250671 | Lead frame and method for manufacturing semiconductor package with the same Provided is a method for manufacturing a lead frame and a semiconductor package having a semiconductor chip for connecting to an outer board and having a base metal layer formed of iron and nickel as main elements. The method includes preparing the base metal layer ... | 07/31/2007 |
| 7242102 | Bond pad structure for copper metallization having increased reliability and method for fabricating same According to one exemplary embodiment, a structure in a semiconductor die comprises a metal pad situated in an interconnect metal layer, where the metal pad comprises copper. The structure further comprises an interlayer dielectric layer situated over the metal pad.... | 07/10/2007 |
| 7235881 | Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument The present invention is a semiconductor device capable of relieving thermal stress without breaking wire. It comprises a semiconductor chip (12), a solder ball (20) for external connection, wiring (18) for electrically connecting the semiconduc... | 06/26/2007 |
| 7233069 | Interconnection substrate and fabrication method thereof An interconnection substrate includes: an interconnection layer region where at least a first conductor layer and a second conductor layer are vertically stacked in that order on a substrate, with the first conductor layer and second conductor layer containing condu... | 06/19/2007 |
| 7233074 | Semiconductor device with improved contacts A device with a solder joint made of a copper contact pad (210) of certain area (202) and an alloy layer (301) metallurgically attached to the copper pad across the pad area. The alloy layer contains copper/tin alloys, which include Cu6 | 06/19/2007 |
| 7230292 | Stud electrode and process for making same A process of making a stud capacitor structure is disclosed. The process includes embedding the stud in a dielectric stack. In one embodiment, the process includes forming an electrically conductive seed film in a contact corridor of the dielectric stack. A storage ... | 06/12/2007 |
| 7224060 | Integrated circuit with protective moat A method of manufacturing an integrated circuit provides a substrate having a semiconductor device, and includes forming an intermetal dielectric layer over the substrate and the semiconductor device. A metal wire is formed above the semiconductor device and in cont... | 05/29/2007 |
| 7215014 | Solderable metal finish for integrated circuit package leads and method for forming A packaged integrated circuit includes a die surrounded by an encapsulant in which leads are used to electrically connect the die, which is internal to the encapsulant, externally. The leads have a primary metal that is used for electrical conduction and physical su... | 05/08/2007 |
| 7213329 | Method of forming a solder ball on a board and the board In the method, a conductive pad of the board is etched to a depth that is greater than 50% and less than 100% of a thickness of the conductive pad. Subsequently, a solder ball may be formed on the etched conductive pad. For example, the conductive pad may be copper.... | 05/08/2007 |
| 7205232 | Method of forming a self-aligned contact structure using a sacrificial mask layer Disclosed is a method of forming a self-aligned contact structure using a sacrificial mask layer. The method includes forming a plurality of parallel interconnection patterns on a semiconductor substrate. Each of the interconnection patterns has an interconnection a... | 04/17/2007 |
| 7199475 | Semiconductor copper bond pad surface protection Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal conta... | 04/03/2007 |
| 7196000 | Method for manufacturing a wafer level chip scale package A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an emb... | 03/27/2007 |
| 7189317 | Semiconductor manufacturing system for forming metallization layer A method for forming a metallization layer. A first layer is formed outwardly from a semiconductor substrate. Contact vias are formed through the first layer to the semiconductor substrate. A second layer is formed outwardly from the first layer. Portions of the sec... | 03/13/2007 |
| 7187078 | Bump structure Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therei... | 03/06/2007 |
| 7183656 | Bilayer aluminum last metal for interconnects and wirebond pads A method for connecting a microelectronic device to a wirebond comprises providing a substrate having a microelectronic circuit therein and forming a wiring layer over the substrate. The wiring layer includes a bilayer wiring structure comprising upper and lower ele... | 02/27/2007 |
| 7173188 | Straight angle conductor and method of manufacturing the same A straight angle conductor 10 is provided with a cladding material including a core-sheet metal 11 and conductor-sheet metals 12a, 12b that sandwich both surfaces of the core-sheet metal 11. The conductor-sheet metals... | 02/06/2007 |
| 7166911 | Packaged microchip with premolded-type package A MEMS inertial sensor is secured within a premolded-type package formed, at least in part, from a low moisture permeable molding material. Consequently, such a motion detector should be capable of being produced more economically than those using ceramic packages. ... | 01/23/2007 |