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| Number | Title | Issue Date |
| 8120040 | Substrate for mounting IC chip, manufacturing method of substrate for mounting IC chip, device for optical communication, and manufacturing method of device for optical communication A device for optical communication including a substrate for mounting an IC chip, and a multilayered printed circuit board. An optical path for transmitting optical signal which penetrates the substrate for mounting an IC chip is formed in the substrate for mounting... | 02/21/2012 |
| 8110834 | Three-dimensional semiconductor devices including select gate patterns having different work function from cell gate patterns A three-dimensional semiconductor device includes a vertical channel pattern on the substrate, a plurality of cell gate patterns and a select gate pattern stacked on the substrate along the sidewall of the vertical channel pattern, a charge storage pattern between t... | 02/07/2012 |
| 8089073 | Front and backside processed thin film electronic devices This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transis... | 01/03/2012 |
| 8013342 | Double-sided integrated circuit chips A double-sided integrated circuit chips, methods of fabricating the double-sided integrated circuit chips and design structures for double-sided integrated circuit chips. The method includes removing the backside silicon from two silicon-on-insulator wafers having d... | 09/06/2011 |
| 8008667 | Semiconductor device including a transparent semiconductor layer for viewing an underlying transistor in a semiconductor substrate A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconduc... | 08/30/2011 |
| 7994511 | Semiconductor structure having multilayer of polysilicon and display panel applied with the same A semiconductor structure includes a substrate, a first polysilicon (polysilicon) region, a second polysilicon region, an insulating layer and a third polysilicon region. The first and second polysilicon regions are formed on the substrate and spaced apart by a gap.... | 08/09/2011 |
| 7838887 | Source/drain carbon implant and RTA anneal, pre-SiGe deposition A semiconductor device system, structure, and method of manufacture of a source/drain to retard dopant out-diffusion from a stressor are disclosed. An illustrative embodiment comprises a semiconductor substrate, device, and method to retard sidewall dopant out-diffu... | 11/23/2010 |
| 7812353 | Front and backside processed thin film electronic devices This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods a... | 10/12/2010 |
| 7755093 | Semiconductor storage device and method of manufacturing the same A nonvolatile semiconductor storage device is provided in which memory cells comprising PN junction diodes having satisfactory rectifying characteristics are arranged in three dimensions. The semiconductor storage device includes: a first wire which extends in one d... | 07/13/2010 |
| 7612379 | Multi-gate thin film transistor having recrystallized channel regions with different grain sizes An image display system has a multi-gate thin film transistor (TFT) disposed on a transparent substrate. The multi-gate TFT includes a silicon film layer, a first electrode and a reflecting layer. The silicon film layer is formed on the transparent substrate and has... | 11/03/2009 |
| 7423304 | Optimization of critical dimensions and pitch of patterned features in and above a substrate A die is formed with different and optimized critical dimensions in different device levels and areas of those device levels using photolithography and etch techniques. One aspect of the invention provides for a memory array formed above a substrate, with driver cir... | 09/09/2008 |
| 7400030 | Schottky diode with silver layer contacting the ZnO and MgZnO films In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substr... | 07/15/2008 |
| 7396712 | Thin film processing method and thin processing apparatus A thin film processing method for processing the thin film by irradiating an optical beam to the thin film. A unit of the irradiation of the optical beam includes a first and a second optical pulse irradiation to the thin film, and the unit of the irradiation is car... | 07/08/2008 |
| 7388277 | Chip and wafer integration process using vertical connections A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrat... | 06/17/2008 |
| 7382035 | Schottky diode with low leakage current and fabrication method thereof A low leakage Schottky diode and fabrication method thereof. The Schottky diode includes a n-type semiconductor; an anode having a circular periphery formed in a region above the n-type semiconductor; and a cathode formed in a region above the n-type semiconductor a... | 06/03/2008 |
| 7378328 | Method of fabricating memory device utilizing carbon nanotubes A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high elect... | 05/27/2008 |
| 7354477 | Method of growing GaN crystal, method of producing single crystal GaN substrate, and single crystal GaN substrate A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and... | 04/08/2008 |
| 7352051 | Cascode, cascode circuit and method for vertical integration of two bipolar transistors into a cascode arrangement A cascode of a high-frequency circuit, includes a first transistor having a first base semiconductor region, a first collector semiconductor region and a first emitter semiconductor region, and a second transistor having a second base semiconductor region, a second ... | 04/01/2008 |
| 7348658 | Multilayer silicon over insulator device An apparatus and method for a multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device is different than the active region of at least another device. Where the multil... | 03/25/2008 |
| 7326628 | Thin layer transfer method utilizing co-implantation to reduce blister formation and to surface roughness A method for producing a semiconductor structure by conducting controlled co-implanting of at least first and second different atomic species into a donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. Impla... | 02/05/2008 |
| 7312487 | Three dimensional integrated circuit A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel an... | 12/25/2007 |
| 7303630 | Method of growing GaN crystal, method of producing single crystal GaN substrate, and single crystal GaN substrate Dotted seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations from neighboring regions... | 12/04/2007 |
| 7286173 | Image sensor and image sensor integrated type active matrix type display device To fabricate an active matrix type display device integrated with an image sensor at a low cost and without complicating process, an image sensor laminated with TFT and a light receiving unit is formed on a light receiving matrix, a display matrix is arranged with T... | 10/23/2007 |
| 7277519 | Frequency and phase correction in a phase-locked loop (PLL) In one embodiment, a system for frequency and phase correction in a phase-locked loop (PLL) includes a phase frequency detector, first and second charge pumps respectively generating a first current and a voltage, a voltage-to-current (V2I) converter, a current summ... | 10/02/2007 |
| 7273788 | Ultra-thin semiconductors bonded on glass substrates A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to... | 09/25/2007 |
| 7268843 | Liquid crystal display with capacitive light shield between data line and pixel electrode There is provided an electro-optical device including, above a substrate, data lines extending in a first direction, scanning lines extending in a second direction and intersecting the data lines, pixel electrodes and thin film transistors disposed so as to correspo... | 09/11/2007 |
| 7262428 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 08/28/2007 |
| 7259428 | Semiconductor device using SOI structure having a triple-well region A semiconductor device includes a support substrate, a buried insulation film, provided on the support substrate, having a thickness of 5 to 10 nm, a silicon layer provided on the buried insulation film, a MOSFET provided in the silicon layer, and a triple-well regi... | 08/21/2007 |
| 7250646 | TFT mask ROM and method for making same There is provided a monolithic three dimensional TFT mask ROM array. The array includes a plurality of device levels. Each of the plurality of device levels contains a first set of enabled TFTs and a second set of partially or totally disabled TFTs. ... | 07/31/2007 |
| 7244666 | Multi-gate transistor formed with active patterns of uniform critical dimension For fabricating a multi-gate transistor, at least one active pattern having uniform critical dimension is formed. Epitaxy structures are grown from exposed portions of the active pattern. A channel region of the transistor is formed from at least two surfaces of the... | 07/17/2007 |
| 7235815 | LED light set An LED light set comprising at least one LED dice and two conductive wires covered by insulated layer, a holder is installed on the wires at every certain distance, one LED dice is installed on every holder; each of the LED dice connects to two conductive wires with... | 06/26/2007 |
| 7233024 | Three-dimensional memory device incorporating segmented bit line memory array A three-dimensional (3D) high density memory array includes multiple layers of segmented bit lines (i.e., sense lines) with segment switch devices within the memory array that connect the segments to global bit lines. The segment switch devices reside on one or more... | 06/19/2007 |
| 7233718 | Optical device and method of manufacturing the same An optical device integrally including an optical waveguide and an optical detector, and a method of manufacturing the same. The optical device includes: a substrate; a first single crystalline growth layer grown on the substrate; an optical waveguide provided with ... | 06/19/2007 |
| 7214963 | 3-D column select circuit layout in semiconductor memory devices A column select circuit in a Static Random Access Memory (SRAM) having a three-dimensional layout can include a lower CMOS layer in a substrate and an upper NMOS layer above the lower layer. An intermediate PMOS layer is located between the upper NMOS layer and the ... | 05/08/2007 |
| 7198992 | Method of manufacturing a semiconductor device comprising doping steps using gate electrodes and resists as masks The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semicon... | 04/03/2007 |
| 7196747 | Flat panel display comprising semiconductor layer with heterogeous lines Provided is a flat panel display in which no stripes appear on a screen, thereby improving image quality. The flat panel display has a matrix-type array of sub-pixels, each of which includes a driving thin film transistor, a first electrode driven by the driving thi... | 03/27/2007 |
| 7193239 | Three dimensional structure integrated circuit A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, red... | 03/20/2007 |
| 7180156 | Thin-film devices and method for fabricating the same on same substrate To satisfy the different requirement of TFTs function as peripheral driving circuit and pixel switching device, the modified TFT structure with various thicknesses of gate insulating layers is disclosed. For the peripheral driving circuit, the thinner thickness of t... | 02/20/2007 |
| 7158199 | Liquid crystal display apparatus containing image sensor and process for producing the same A liquid crystal display apparatus containing an image sensor, which comprises a liquid crystal display part comprising an active matrix circuit, a peripheral driver circuit for driving the active matrix circuit, and a sensor part, integrated on one substrate, where... | 01/02/2007 |
| 7148510 | Electronic apparatus having a protective circuit A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 12/12/2006 |
