Decorative Jeweled Wheel Cover
An improved wheel is provided wherein decorative items such as gem stones are embedded in either the wheel surface, a special mounting section attached to the wheel surface, or to a spoke strap that wraps around each spoke and positions embedded gem stones on the outside surface of the spoke.
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| Number | Title | Issue Date |
| 7342319 | Semiconductor integrated circuit package having electrically disconnected solder balls for mounting Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to t... | 03/11/2008 |
| 7342320 | Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connectio... | 03/11/2008 |
| 7342308 | Component stacking for integrated circuit electronic package Component stacking for increasing packing density in integrated circuit packages. In one aspect of the invention, an integrated circuit package includes a substrate, and a plurality of discrete components connected to the substrate and approximately forming a compon... | 03/11/2008 |
| 7342318 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 03/11/2008 |
| 7338884 | Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a ... | 03/04/2008 |
| 7338890 | Low fabrication cost, high performance, high reliability chip scale package The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elast... | 03/04/2008 |
| 7338891 | Semiconductor chip, mounting structure thereof, and methods for forming a semiconductor chip and printed circuit board for the mounting structure thereof A semiconductor chip for flip chip bonding, a mounting structure for the semiconductor chip, and methods for forming a semiconductor chip for flip chip bonding and for fabricating a printed circuit board for a mounting structure of a semiconductor chip are provided ... | 03/04/2008 |
| 7338290 | Printed wiring board with a plurality of pads and a plurality of conductive layers offset from the pads A design rule for a printed wiring board is provided. A conductive layer and a pad are separate from each other in a distance defined by the design rule, which sufficiently prevents the capacitance coupling between the conductive layer and the pad. ... | 03/04/2008 |
| 7339279 | Chip-size package structure and method of the same The method includes a step of picking and placing standard good dice on a base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The method of the chip-size package comprises the steps of separating dice on a... | 03/04/2008 |
| 7339268 | Thermal dissipation from a flip chip through an aperture in a flex cable A semiconductor die mounted to a flex cable is provided. The flex cable comprises a heat sink layer and a flex cable substrate having conductive traces disposed thereon. The flex cable substrate includes an aperture aligned with the semiconductor die. A thermal cond... | 03/04/2008 |
| 7335517 | Multichip semiconductor device, chip therefor and method of formation thereof A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the c... | 02/26/2008 |
| 7335532 | Method of assembly for multi-flip chip on lead frame on overmolded IC package A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip module 30 has an inte... | 02/26/2008 |
| 7335591 | Method for forming three-dimensional structures on a substrate A method of forming a resist layer on a non-planar surface of a substrate includes placing the non-planar surface into an electrophoretic resist. While the non-planar surface is in the electrophoretic resist, an electrical voltage is applied between the substrate an... | 02/26/2008 |
| 7335970 | Semiconductor device having a chip-size package Disclosed are a semiconductor device, a method for manufacturing the same, and a method for mounting the same. The method for manufacturing a semiconductor device includes the steps of: preparing a package film having a planar configuration whose region is divided i... | 02/26/2008 |
| 7335582 | Component Semiconductor component, having a first chip arranged on a second chip, in which the first and second chips in each case have, on one of their main areas, first and second metalizations, respectively, which face one another. First regions of the metalizations are pr... | 02/26/2008 |
| 7335979 | Device and method for tilted land grid array interconnects on a coreless substrate package An article of manufacture and system, as well as fabrication methods therefore, may include a plurality of lands disposed on a surface of a substrate wherein the lands are oriented at an angle to the surface of the substrate and further wherein the substrate is form... | 02/26/2008 |
| 7334326 | Method for making an integrated circuit substrate having embedded passive components A method for making an integrated circuit substrate having embedded passive components provides a reduced cost and compact package for a die and one or more passive components. An insulating layer of the substrate is embossed or laser-ablated to generate apertures f... | 02/26/2008 |
| 7335988 | Use of palladium in IC manufacturing with conductive polymer bump An apparatus and a method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible conductive polymer bump, preferably a two-stage epoxy, on the palladium plated contact point, are provided. The pr... | 02/26/2008 |
| 7332817 | Die and die-package interface metallization and bump design and arrangement A die metallization and bump design/arrangement, and a die-package interface metallization and bump design/arrangement are described herein. ... | 02/19/2008 |
| 7332430 | Method for improving the mechanical properties of BOC module arrangements The invention relates to a method for improving the mechanical properties of BOC module arrangements in which chips have 3D structures, solder balls, μ springs or soft bumps which are mechanically and electrically connected by means of solder connections to termina... | 02/19/2008 |
| 7332801 | Electronic device An electronic device includes a first die that includes wires for bonding, a second die that includes an array of balls for bonding, and a substrate. The substrate includes bond sites for wires from the first die, and bond sites for the array of balls from the secon... | 02/19/2008 |
| 7332423 | Soldering a die to a substrate One example electronic assembly includes a substrate that has a plurality of contacts which become bonded to a plurality of contacts on a die. The electronic assembly further includes a male member that extends from at least one of the substrate and the die and a fe... | 02/19/2008 |
| 7332802 | Package for semiconductor light emitting element and semiconductor light emitting device A package for semiconductor light emitting element is described. The package includes a first metal substrate having a cup shaped recess portion, an insulating member having a first cup shaped opening, provided on the first metal substrate, and a second metal substr... | 02/19/2008 |
| 7329951 | Solder bumps in flip-chip technologies A solder bump structure and method for forming the same. The structure includes (a) a dielectric layer including a dielectric layer top surface (b) an electrically conducting bond pad on and in direct physical contact with the dielectric layer top surface; (c) a pat... | 02/12/2008 |
| 7329899 | Wafer-level redistribution circuit A semiconductor component configured for wafer-level testing includes a semiconductor die having at least one die contact electrically exposed for coupling with a redistribution circuit that electrically couples at least one die contact to an extended contact such a... | 02/12/2008 |
| 7327032 | Semiconductor package accomplishing fan-out structure through wire bonding Provided is a semiconductor package accomplishing a fan-out structure through wire bonding in which a pad of a semiconductor chip is connected to a printed circuit board through wire bonding. A semiconductor package can be produced without a molding process and can ... | 02/05/2008 |
| 7327017 | Semiconductor package including leadframe roughened with chemical etchant to prevent separation between leadframe and molding compound A semiconductor package contains a metal leadframe that has been specially treated by roughening it with a chemical etchant. The roughening process enhances the adhesion between the leadframe and the molten plastic during the encapsulation of the leadframe and there... | 02/05/2008 |
| 7327031 | Semiconductor device and method of manufacturing the same There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening above Cu pad areas, is formed, and a barrier metal film is formed in t... | 02/05/2008 |
| 7327041 | Semiconductor package and a method for producing the same A semiconductor package includes: a semiconductor chip having circuits formed on a surface, and having a thickness of 0.5 μm or more and 100 μm or less; and an adhesive resin layer provided so as to cover the surface of the semiconductor chip on which the circuits... | 02/05/2008 |
| 7326649 | Parylene-based flexible multi-electrode arrays for neuronal stimulation and recording and methods for manufacturing the same Method for manufacturing a parylene-based electrode array that includes an underlying parylene layer, one or more patterned electrode layers comprising a conductive material such as a metal, and one or more overlying parylene layers. The overlying parylene is etched... | 02/05/2008 |
| 7325716 | Dense intermetallic compound layer Apparatus and methods of fabricating a bump limiting metallization structure including a two-step bump reflow process that reduces intermetallic compound porosity, increases bump strength, improve die yield, and device reliability. The first step comprises annealing... | 02/05/2008 |
| 7327040 | Module substrate and disk apparatus A module substrate includes an insulating substrate, a circuit pattern formed on at least a main surface of the insulating substrate, a protection film formed on the main surface of the insulating substrate including the circuit patter such as to expose a mount regi... | 02/05/2008 |
| 7326637 | Method and system for bonding a semiconductor chip onto a carrier using micro-pins An anisotropically conductive layer ‘ACL’ for mechanical and electrical bonding of two circuit containing structures, such as a flip chip and carrier is disclosed. The ACL is formed of a rigid insulating substrate or membrane with a top and bottom planar surface... | 02/05/2008 |
| 7326636 | Method and circuit structure employing a photo-imaged solder mask In one embodiment, a photo-imageable material is deposited on a circuit structure. The photo-imageable material is then exposed to a pattern of radiation, thereby polymerizing portions of the photo-imageable. Un-polymerized portions of the photo-imageable material a... | 02/05/2008 |
| 7325301 | Method of manufacturing a wiring board A wiring board according to the present invention includes a wiring part formed of one or more layers, a first terminal area disposed on one side of the wiring part in a projecting manner, and a second terminal area disposed on the other side of the wiring part. A r... | 02/05/2008 |
| 7323774 | Integrated circuit package system with pedestal structure An integrated circuit package system includes providing a substrate having a bond finger thereon and forming a pedestal on a portion of the bond finger. A first die is mounted on the substrate and adjacent to the bond finger. A portion of the first die, a portion of... | 01/29/2008 |
| 7323778 | Semiconductor device with improved design freedom of external terminal A semiconductor device comprises: a semiconductor chip; an extension portion formed in contact with the side surfaces so as to surround the semiconductor chip; an insulating film formed on a surface of the extension portion and the semiconductor chip; each of a plur... | 01/29/2008 |
| 7323779 | Semiconductor device A semiconductor device includes a semiconductor chip. A stepped member having stepped regions is provided on the semiconductor chip. The stepped member, together with a redistribution layer, is encapsulated by an encapsulating resin layer. The stepped member is exem... | 01/29/2008 |
| 7323780 | Electrical interconnection structure formation An electrical interconnection structure and method for forming. The electrical structure comprises a substrate comprising electrically conductive pads and a first dielectric layer over the substrate and the electrically conductive pads. The first dielectric layer co... | 01/29/2008 |
| 7323777 | Semiconductor device, method of manufacturing the same, circuit board, and electronic instrument A semiconductor substrate has an integrated circuit, an interconnect electrically connected to the inside of the semiconductor substrate, and an electrode formed on the interconnect. A plurality of resin layers are separately formed on the semiconductor substrate so... | 01/29/2008 |