Bizarre Patents
Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 4982265 | Semiconductor integrated circuit device and method of manufacturing the same In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of hig... | 01/01/1991 |
| 4980753 | Low-cost high-performance semiconductor chip package Disclosed is a low-cost high-performance semiconductor chip package enabling a direct chip to printed circuit board connection. The package comprises a semiconductor chip having a front surface and a back surface. The front surface comprises pads for inpu... | 12/25/1990 |
| 4977441 | Semiconductor device and tape carrier According to the present invention, a tape carrier is prepared which comprises a power trunk line including an electric connection as a branch of a power lead for each tape carrier unit and a ground trunk line having an electric connection as a branch of ... | 12/11/1990 |
| 4975765 | Highly integrated circuit and method for the production thereof In a highly integrated circuit the semiconductor chip (8) is fastened on a substrate (17) which projects on all sides only a few millimeters beyond the semiconductor chip (8). For Full dynamic testing of the circuit before insertion, connections are provi... | 12/04/1990 |
| 4974057 | Semiconductor device package with circuit board and resin A semiconductor device package having a semiconductor element of elements sealed in resin wherein a plurality of resin types different in function are used for sealing in which the more expensive resins are selectively used in forming thin covering layers... | 11/27/1990 |
| 4970571 | Bump and method of manufacturing the same According to the present invention, there is provided a method for forming a bump and comprising the steps of dipping a semiconductor element with an Al electrode and a passivation film formed thereon in a palladium solution containing 5 to 2,000 ppm of a... | 11/13/1990 |
| 4930001 | Alloy bonded indium bumps and methods of processing same Apparatus comprising an indium bump that may be etched in a low concentration of hydrochloric acid (typically 1%) to remove oxide buildup, and a pad generally comprising a three layer arrangement of gold over nickel over titanium. The indium bump and the ... | 05/29/1990 |
| 4922321 | Semiconductor device and a method of producing same A semiconductor device which includes an electrode portion formed on a wafer; a passivation film deposited on said wafer except for said electrode portion; an insulating film deposited only on said passivation film so as to have a predetermined thickness ... | 05/01/1990 |
| 4922322 | Bump structure for reflow bonding of IC devices In a semiconductor device tape assembly bonding process the fingers of a copper tape are reflow soldered to metal bumps located on the semiconductor device. First, the semiconductor wafer is covered with a conductive film composed of thin layers of alumim... | 05/01/1990 |
| 4917466 | Method for electrically connecting IC chips, a resinous bump-forming composition used therein and a liquid-crystal display unit electrically connected thereby The invention provides a very efficient and reliable method for electrically connecting the electrodes of an electronic device, e.g., IC chips, and the electrodes of, for example, a glass-made circuit board substrate with good repairability. Thus, the ele... | 04/17/1990 |
| 4912545 | Bonding of aligned conductive bumps on adjacent surfaces A bump bonding process and product are disclosed in which both pressure and heating are used in situations where the temperature should not exceed a predetermined amount, e.g., bonding of a photoconductor array to a module containing electronic processing... | 03/27/1990 |
| 4910154 | Manufacture of monolithic infrared focal plane arrays The manufacture of monolithic HgCdTe detectors and Si circuitry in an IR focal plane array is achieved by forming a protective layer of SiO2 or SiNx on a silicon wafer containing silicon circuits, etching steep-wall recesses into the... | 03/20/1990 |
| 4907065 | Integrated circuit chip sealing assembly An integrated circuit (IC) chip package is formed by extending the overall dimensions of a standard IC on a semiconductor substrate, typically a first silicon wafer, to provide an integral band of semiconductor material therearound on which are formed a s... | 03/06/1990 |
| 4871921 | Detector array assembly having bonding means joining first and second surfaces except where detectors are disposed Method and apparatus for providing an improved detector array assembly in which the detectors are electrically connected from one substrate to another through adjoining "bump" connections but are prevented from distortion when an epoxy joining the two sub... | 10/03/1989 |
| 4857482 | Method of forming bump electrode and electronic circuit device A support is formed and comprises a base, a resin layer which is formed on the base and on recesses which are formed on a surface of the base, and a conductive layer which is formed on a portion of a surface of the resin layer, other than where the recess... | 08/15/1989 |
| 4845542 | Interconnect for layered integrated circuit assembly Enhanced density of electrical and/or mechanical interconnections between adjacent wafers within integrated circuit assemblies and structural integrity of those interconnections under temperature cycling conditions, is attained by utilizing laser assisted... | 07/04/1989 |
| 4801992 | Three dimensional interconnected integrated circuit A three dimensional interconnected modular integrated circuit and method of manufacturing same are provided wherein the modular circuit comprises individual planar integrated circuits which are connected together and to an interconnect chip for mounting o... | 01/31/1989 |
| 4791473 | Plastic package for high frequency semiconductor devices A plastic semiconductor package suitable for high frequency operation includes an internal ground plane connected to a ground ring formed on the packaged semiconductor device. The ground plane is included as a portion of a lead frame strip adjacent to the... | 12/13/1988 |
| 4787958 | Method of chemically etching TiW and/or TiWN A method of chemically etching TiW and/or TiWN is described wherein the etching of a semiconductor substrate having a layers of TiWN, TiW and Au disposed between the substrate and a Au bump is performed with a 30% solution of hydrogen peroxide (H2 | 11/29/1988 |
| 4783594 | Reticular detector array A detector assembly for reception of infrared radiation is formed as a composite structure of a detector array electrically connected by a set of contacts to a readout clip disposed on a backside of the assembly opposite a front side receiving incident ra... | 11/08/1988 |
| 4782028 | Process methodology for two-sided fabrication of devices on thinned silicon A method is disclosed for forming a detector device, such as a thinned bulk silicon blocked impurity transducer infrared detector, by thinning a semiconductor substrate (10) and processing the thinned region (30) on two sides to form the detector device. ... | 11/01/1988 |
| 4766479 | Low resistance electrical interconnection for synchronous rectifiers A technique is disclosed for making the high current-carrying electrical interconnections to the power FET devices in a synchronous rectifier circuit with extremely low lead resistance. All such interconnections are made with solder and pliable copper str... | 08/23/1988 |
| 4764804 | Semiconductor device and process for producing the same A semiconductor device having improved heat-dissipating characteristics employs a thin insulator film made of diamond, which has excellent thermal conductivity, as an insulator film which is formed on a chip immediately below a heat-dissipating bump elect... | 08/16/1988 |
| 4742023 | Method for producing a semiconductor device A method for producing a semiconductor device comprises the steps of: forming an insulating layer on a semiconductor substrate provided with an electrode portion thereon, forming a barrier metal layer over the entire surface thereof, forming a groove in t... | 05/03/1988 |
| 4698662 | Multichip thin film module A package for thermal dissipation of heat from multiple integrated circuit chips is described. The package includes a silicon substrate for electrical connection to silicon integrated-circuit chips. The silicon substrate provides a high degree of thermal ... | 10/06/1987 |
| 4680610 | Semiconductor component comprising bump-like, metallic lead contacts and multilayer wiring A semiconductor component having bump-like, metallic lead contacts and multilayer wiring wherein individual tracks of each and every electrical signal or potential to be wired in multilayer wiring technology are electrically connected to the respective le... | 07/14/1987 |
| 4672421 | Semiconductor packaging and method A mounting means for a semiconductor integrated circuit, the mounting means comprising a semiconductor material having a mounting surface as one major surface thereof, a semiconductor integrated circuit mounted on the major surface of the semiconductor ma... | 06/09/1987 |
| 4609936 | Semiconductor chip with direct-bonded external leadframe Structure and process for providing a hard metallic leadframe directly bonded to a semiconductor chip without the necessity for solder or soft intermediate leadframes. The structure provides a strong bond at the semiconductor chip with the possibility for... | 09/02/1986 |
| 4604644 | Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate having a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of the semiconduc... | 08/05/1986 |
| 4566024 | Matrix infrared detector The detector of the invention comprises a first semi-conductor wafer of type n, or p, with zones of type p, or n, extending from one to the other of the two faces of the wafer, and a second wafer for processing the signals delivered by the wafer exposed t... | 01/21/1986 |
| 4536786 | Lead electrode connection in a semiconductor device Raised contacts included within a semiconductor chip are bonded to respective external leads through the use of a bonding tool. The raised contacts and/or the external leads are varied in a fashion depending on their locations on a semiconductor substrate... | 08/20/1985 |
| 4514751 | Compressively stresses titanium metallurgy for contacting passivated semiconductor devices Contact metallurgy is disclosed for passivated semiconductor devices. The metallurgy comprises a compressively stressed, oxygen-containing titanium underlayer covered by a solder-bondable layer extending through via holes in dielectric material on the sem... | 04/30/1985 |
| 4434434 | Solder mound formation on substrates A controlled geometric configuration of contact pads for securing solder mounds to an integrated circuit chip which reduces cracking of brittle passivating coatings in fabrication of components.... | 02/28/1984 |
| 4413308 | Printed wiring board construction A mounting arrangement for an integrated circuit leadless chip carrier (13) for providing compliance to prevent solder joint failures due to stress and differential thermal expansion. A supporting substrate board (10, 20, 30) has bonded to one surface a f... | 11/01/1983 |
| 4394678 | Elevated edge-protected bonding pedestals for semiconductor devices An elevated bonding pad suitable for wire or lead frame attachment and having an insulating layer completely over its outer periphery. The structure simplifies the processing required to form an elevated bonding pad, and serves to protect the periphery ag... | 07/19/1983 |
| 4374394 | Monolithic integrated circuit A monolithic integrated circuit comprises a substrate having first and second opposing major surfaces. A semiconductor device is at the first major surface, a circuit film pattern is on the second major surface, and means for interconnecting the device to... | 02/15/1983 |
| 4369458 | Self-aligned, flip-chip focal plane array configuration A focal plane array including a first integrated circuit for infrared radiation (IR) detection and a second integrated circuit for signal processing is assembled in a flip-chip structural configuration. Each integrated circuit includes an array of metalli... | 01/18/1983 |
| 4323914 | Heat transfer structure for integrated circuit package Heat is removed from a Large Scale Integrated Circuit semiconductor package via a thermal conductive path including a thermally conductive liquid. The integrated circuit chips are flip chip bonded to a substrate having a printed circuit and raised contact... | 04/06/1982 |
| 4316208 | Light-emitting semiconductor device and method of fabricating same A light-emitting semiconductor device of the type having a substrate, a first layer of a semiconductor on the substrate and a second layer of a different conductivity on the first layer. The second layer is selectively voided so as to give a recess and le... | 02/16/1982 |
| 4280132 | Multi-lead frame member with means for limiting mold spread Blocking members are provided for limiting mold spread over a desirable area while a semiconductor is molded. The blocking members are composed within a metallic layer together with metallic leads by photoetching techniques. The blocking members are posit... | 07/21/1981 |
