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| Number | Title | Issue Date |
| 8188598 | Bump-on-lead flip chip interconnection A semiconductor device has a semiconductor die with a plurality of bumps formed over the die. A substrate has a plurality of conductive traces formed on the substrate. Each trace has an interconnect site for mating to the bumps. The interconnect sites have parallel ... | 05/29/2012 |
| 8169074 | Semiconductor devices including first and second silicon interconnection regions Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first interconnection disposed on a substrate. The interconnection includes a first silicon interconnection region and a first metal interconnection region ... | 05/01/2012 |
| 8164185 | Semiconductor device, reticle used in fabricating method for the same and fabrication method thereof A semiconductor device may include a substrate and a dielectric layer may be formed on the substrate. A multi-layered interconnection structure may be embedded in the dielectric layer. A plurality of bonding pads, which may be connected to an uppermost interconnecti... | 04/24/2012 |
| 8129839 | Electronic device package structures A sealing layer is provided on a surface of a substrate, such as a semiconductor wafer. The sealing layer includes apertures which expose external contact locations for semiconductor dice formed on the wafer. Solder paste is deposited in the apertures and reflowed t... | 03/06/2012 |
| 8120174 | Semiconductor device and manufacturing method thereof The present invention provides a technique capable of suppressing variations in the height of each solder ball where an NSMD is used as a structure for each land. Vias that extend through a wiring board are provided. Lands are formed at the back surface of the wirin... | 02/21/2012 |
| 8115306 | Apparatus and method for packaging circuits An apparatus comprises an integrated circuit die including a main body having a top layer, a bottom layer, and a peripheral edge surface extending between the top layer and the bottom layer. The integrated circuit die also includes a bond pad on the main body, an ed... | 02/14/2012 |
| 8115305 | Integrated circuit package system with thin profile An integrated circuit package system is provided including attaching an external interconnect on a tape; attaching a backside element on the tape adjacent to the external interconnect; attaching an integrated circuit die with the backside element, the backside eleme... | 02/14/2012 |
| 8110922 | Wafer level semiconductor module and method for manufacturing the same A wafer level semiconductor module may include a module board and an IC chip set mounted on the module board. The IC chip set may include a plurality of IC chips having scribe lines areas between the adjacent IC chips. Each IC chip may have a semiconductor substrate... | 02/07/2012 |
| 8089149 | Semiconductor device A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the ... | 01/03/2012 |
| 8089148 | Circuit board and semiconductor device having the same A circuit board has an insulative layer including a first surface and a second surface opposite to the first surface. A plurality of electrically conductive patterns is formed on the first surface of the insulative layer. Conductive lands are formed in a die mountin... | 01/03/2012 |
| 8084858 | Metal wiring structures for uniform current density in C4 balls In one embodiment, a sub-pad assembly of metal structures is located directly underneath a metal pad. The sub-pad assembly includes an upper level metal line structure abutting the metal pad, a lower level metal line structure located underneath the upper level meta... | 12/27/2011 |
| 8053890 | Microchip assembly including an inductor and fabrication method An assembly includes a substrate, a chip mounted on the substrate, a voltage controlled oscillator circuit including an inductor and further circuit elements. The inductor is mounted on or in the substrate, and the further circuit elements are mounted on or in the c... | 11/08/2011 |
| 8044510 | Product and method for integration of deep trench mesh and structures under a bond pad A structure includes a substrate. A trench structure is arranged within the substrate. A film is placed under an interlevel dielectric pad and between portions of the trench structure. ... | 10/25/2011 |
| 8039955 | Mold lock on heat spreader A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped head integral with the neck. The mold lock can be formed to project above a support component, such as a he... | 10/18/2011 |
| 8030765 | Configuration terminal for integrated devices and method for configuring an integrated device A configuration terminal for integrated devices includes a first and a second portion structurally independent and connected to respective first and second terminals and it has at least one contact terminal suitable to be selectively connected to such first and seco... | 10/04/2011 |
| 8026599 | Method of protecting integrated circuits The present application relates to the manufacture of Wafer Level Chip Scale Packages (WLCSPs), which are a type of CSP in which the traditional wire bonding arrangements are dispensed with in favor of making direct contact by means of conductive bumps (typically so... | 09/27/2011 |
| 8018057 | Semiconductor device with resin layers and wirings and method for manufacturing the same A semiconductor device includes: a semiconductor substrate that has an integrated circuit and an electrode electrically connected to the integrated circuit; a first resin layer that is formed in a first region overlapping the integrated circuit over a surface of the... | 09/13/2011 |
| 7989952 | Semiconductor device A semiconductor device having macro circuit including a plurality of fine interconnections, an extension interconnection wider than the fine interconnections, having a first end connected to one or more of the fine interconnections and a second end located in an are... | 08/02/2011 |
| 7977787 | Semiconductor device A semiconductor device manufacturing apparatus is provided with a drawing pattern printing part having a print head which injects a conductive solvent, an insulative solvent and an interface treatment solution. The print head is formed in such a way that desired cir... | 07/12/2011 |
| 7973406 | Bump-on-lead flip chip interconnection A semiconductor device has a semiconductor die with a plurality of bumps formed over the die. A substrate has a plurality of conductive traces formed on the substrate. Each trace has an interconnect site for mating to the bumps. The interconnect sites have parallel ... | 07/05/2011 |
| 7948079 | Method of manufacturing hybrid structure of multi-layer substrates and hybrid structure thereof Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal l... | 05/24/2011 |
| 7936064 | Semiconductor device A semiconductor device, including: a semiconductor layer having an active region; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width smal... | 05/03/2011 |
| 7919858 | Semiconductor device having lands disposed inward and outward of an area of a wiring board where electrodes are disposed The present invention provides a technique capable of suppressing variations in the height of each solder ball where an NSMD is used as a structure for each land. Vias that extend through a wiring board are provided. Lands are formed at the back surface of the wirin... | 04/05/2011 |
| 7911055 | Semiconductor device and manufacturing method of the same In a semiconductor device, capacitance between copper interconnections is decreased and the insulation breakdown is improved simultaneously, and a countermeasure is taken for misalignment via by a manufacturing method including the steps of forming an interconnectio... | 03/22/2011 |
| 7898275 | Known good die using existing process infrastructure An apparatus for testing a semiconductor die and the method wherein there is provided a package having a cavity therein with a plurality of terminals in the package disposed at the periphery of the cavity. A semiconductor die to be tested and having a plurality of b... | 03/01/2011 |
| 7898081 | MEMS device and method of making the same A MEMS device includes a vent hole structure and a MEMS structure disposed on a same side of a substrate. The vent hole structure adjoins the MEMS structure with an etch stop structure therebetween. The MEMS structure includes a chamber, the vent hole structure incl... | 03/01/2011 |
| 7893532 | External contact material for external contacts of a semiconductor device and method of making the same An external contact material for external contacts of a semiconductor device and a method for producing the same are described. The external contact material includes a lead-free solder material. Provided in the solder material is a filler which forms a plurality of... | 02/22/2011 |
| 7888798 | Semiconductor devices including interlayer conductive contacts and methods of forming the same In a semiconductor device and a method of forming the same, the semiconductor device comprises: a first insulating layer on an underlying contact region of the semiconductor device, the first insulating layer having an upper surface; a first conductive pattern in a ... | 02/15/2011 |
| 7863737 | Integrated circuit package system with wire bond pattern An integrated circuit package system including providing a plurality of substantially identical package leads formed in a single row, and attaching bond wires having an offset on adjacent locations of the package leads. ... | 01/04/2011 |
| 7859105 | Power converter, power system provided with same, and mobile body To provide a power converter equipped with a current detector which is small and can carry out highly accurate current detection, in the power converter equipped with a power module 16 having a power controlling semiconductor element 7 disposed on the ... | 12/28/2010 |
| 7855451 | Device having a contacting structure A layer of electrically insulating material is applied to a substrate and a component located thereon, in such a way that said layer follows the surface contours. ... | 12/21/2010 |
| 7851910 | Diffusion soldered semiconductor device The invention relates to a process for the multi-stage production of diffusion-soldered joints for power components with semiconductor chips, the melting points of diffusion-soldering alloys and diffusion-soldered joints being staggered in such a manner that a first... | 12/14/2010 |
| 7847397 | Nanoparticles with covalently bonded stabilizer An apparatus composed of: (a) a substrate; and (b) a deposited composition comprising a liquid and a plurality of metal nanoparticles with a covalently bonded stabilizer. ... | 12/07/2010 |
| 7830005 | Bond pad array for complex IC An integrated circuit includes: a substrate; and a bond pad array on the substrate. The bond pad array includes: a row of inner bond pads, each inner bond pad positioned with respect to a plurality of inner pad openings; a plurality of first inner metal layers respe... | 11/09/2010 |
| 7825510 | Method for filling a contact hole and integrated circuit arrangement with contact hole A method in which a base layer is deposited in a contact hole region under a protective gas, where base layer contains a nitride as main constituent. After the deposition of the base layer, a covering layer is deposited under gaseous nitrogen. An adhesion promoting ... | 11/02/2010 |
| 7821130 | Module including a rough solder joint A module includes a metallized substrate including a metal layer, a base plate, and a joint joining the metal layer to the base plate. The joint includes solder contacting the base plate and an inter-metallic zone contacting the metal layer and the solder. The inter... | 10/26/2010 |
| 7804172 | Electrical connections made with dissimilar metals Electrical connections between different materials. An electrical connection system includes electrical components and an electrical connection between the electrical components. The electrical connection includes a functionally graded material. A method of making a... | 09/28/2010 |
| 7791194 | Composite interconnect A composite interconnect system includes a plurality of carbon nanotubes, a plurality of solder balls and standoff balls disposed on a first device to provide a connection to a second device. A die-attached substrate includes a substrate and one or more die disposed... | 09/07/2010 |
| 7786578 | Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which elim... | 08/31/2010 |
| 7786577 | Component with chip through-contacts A panel for the production of electronic components is disclosed. The components have a substantially planar semiconductor chip with chip through-contacts which are provided with electrically conductive material. A rewiring region is subdivided into an insulating la... | 08/31/2010 |
