A gun that fires a missile, powered by gas "discharged by the operator of the toy."
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| Number | Title | Issue Date |
| 8134233 | Method and apparatus for providing electrically isolated closely spaced features on a printed circuit board A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal... | 03/13/2012 |
| 8049331 | Structure and method for forming a capacitively coupled chip-to-chip signaling interface A system and method for providing capacitively-coupled signaling in a system-in-package (SiP) device is disclosed. In one embodiment, the system includes a first semiconductor device and an opposing second semiconductor device spaced apart from the first device, a d... | 11/01/2011 |
| 7902665 | Semiconductor device having a suspended isolating interconnect A semiconductor device is configured to provide current and voltage isolation inside an integrated circuit package. The semiconductor device includes first and second semiconductor dies, a first isolating block positioned on the first semiconductor die, and a second... | 03/08/2011 |
| 7812446 | Semiconductor device A method of manufacturing a semiconductor device including a PMOS transistor and a NMOS transistor is described. The method facilitates obtaining a FUSI phase of a suitable composition for the NMOS transistor and the PMOS transistor respectively, with fewer mask lay... | 10/12/2010 |
| 7781887 | Semiconductor device including an interconnect A semiconductor device includes a first die, a substrate, and a first interconnect. The first die includes a first isolation region and a first contact at least partially overlapping the first isolation region. The substrate includes a second contact. The first inte... | 08/24/2010 |
| 7763976 | Integrated circuit module with integrated passive device A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrate... | 07/27/2010 |
| 7622805 | Semiconductor module including circuit component and dielectric film, manufacturing method thereof, and application thereof Multiple semiconductor device components and passive device components fixed to a substrate are embedded within an electroconductive-film/insulating-resin-film structure, and are thermally bonded to an insulating resin film. ... | 11/24/2009 |
| 7462935 | Structure and method for forming a capacitively coupled chip-to-chip signaling interface A system and method for providing capacitively-coupled signaling in a system-in-package (SiP) device is disclosed. In one embodiment, the system includes a first semiconductor device and an opposing second semiconductor device spaced apart from the first device, a d... | 12/09/2008 |
| 7456500 | Light source module and method for production thereof A light source module having a plurality of LEDs connected to a metal carrier (4) by means of an insulating layer (3). In order to afford protection against mechanical effects and in order to form a reflector, the LEDs are surrounded by a frame (10 | 11/25/2008 |
| 7432593 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 10/07/2008 |
| 7423340 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 09/09/2008 |
| 7414299 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 08/19/2008 |
| 7400038 | Semiconductor device, substrate, equipment board, method for producing semiconductor device, and semiconductor chip for communication A semiconductor device includes a first substrate having a first surface for mounting an electronic component and a second surface substantially parallel to the first surface. The first substrate includes a first region for mounting the electronic component, a secon... | 07/15/2008 |
| 7385283 | Three dimensional integrated circuit and method of making the same A three dimensional integrated circuit structure includes at least first and second devices, each device comprising a substrate and a device layer formed over the substrate, the first and second devices being bonded together in a stack, wherein the bond between the ... | 06/10/2008 |
| 7382056 | Integrated passive devices The specification describes a multi-chip module (MCM) that contains an integrated passive device (IPD) as the carrier substrate (IPD MCM). Parasitic electrical interactions are controlled at one or both interfaces of the IPD either by eliminating metal from the inte... | 06/03/2008 |
| 7373521 | Semiconductor IC, information processing method, information processing device, and program storage medium A program supplied from a personal computer via an interface 31 is processed according to a program stored in a ROM 36, developed in a RAM 33, and executed by a CPU 32. Data resulted from the program execution is stored into a nonvolatile... | 05/13/2008 |
| 7372138 | Routing element for use in multi-chip modules, multi-chip modules including the routing element and methods A routing element for use in a semiconductor device assembly includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a carrier substrate of the semiconductor device assemb... | 05/13/2008 |
| 7365418 | Multi-chip structure A multi-chip structure at least including a first chip, a second chip and a first thermal-conductive layer is provided. The first chip has a first surface and a plurality of first pads disposed on the first surface. The second chip has a second surface facing the fi... | 04/29/2008 |
| 7355264 | Integrated passive devices with high Q inductors The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the b... | 04/08/2008 |
| 7345363 | Semiconductor device with a rewiring level and method for producing the same A semiconductor device includes a plastic package, at least one semiconductor chip and a rewiring level. The rewiring level includes an insulating layer and a rewiring layer. The rewiring layer includes either signal conductor paths and ground or supply conductor pa... | 03/18/2008 |
| 7342300 | Integrated circuit incorporating wire bond inductance The invention relates to the field of electronics, more particularly to the wire bonds incorporated into an integrated circuit package such as a quad flat pack, a ball grid array or hybrid style module. The present invention takes the normally undesirable wire bond ... | 03/11/2008 |
| 7335534 | Semiconductor component and method of manufacture A semiconductor component having a semiconductor chip mounted on a packaging substrate and a method for manufacturing the semiconductor component that uses batch processing steps for fabricating the packaging substrate. A heatsink is formed using an injection moldin... | 02/26/2008 |
| 7335986 | Wafer level chip scale package Disclosed is a wafer level chip scale package and a method for manufacturing the same. The wafer level chip scale package includes a semiconductor die having a first coating layer formed thereon; a redistribution layer formed on the first coating layer and connected... | 02/26/2008 |
| 7330702 | Method and apparatus for inter-chip wireless communication In one embodiment, the disclosure relates to a method and apparatus for inter-chip wireless communication system. The system includes a first microprocessor having a plurality of non-contact ports and a first RF communication circuit integrated with the first microp... | 02/12/2008 |
| 7327019 | Semiconductor device of a charge storage type According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. ... | 02/05/2008 |
| 7327022 | Assembly, contact and coupling interconnection for optoelectronics A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active components. This platform provides optical coupling and chip-to-chip ... | 02/05/2008 |
| 7321164 | Stack structure with semiconductor chip embedded in carrier A stack structure with semiconductor chips embedded in carriers comprises two carriers stacking together as a whole, at least two semiconductor chips having active surfaces with electrode pads and inactive surfaces corresponding thereto placed in the cavities of the... | 01/22/2008 |
| 7317248 | Memory module having memory chips protected from excessive heat The invention relates to a memory module having a printed circuit board; having one or more memory chips which are arranged in a first region of the printed circuit board and are contact-connected by the printed circuit board; having a buffer chip for driving the me... | 01/08/2008 |
| 7317251 | Multichip module including a plurality of semiconductor chips, and printed circuit board including a plurality of components A multichip module includes at least one first semiconductor chip and at least one second semiconductor chip. The semiconductor chips are arranged in coplanar fashion on or in a support medium and respectively include matching components and contact areas arranged o... | 01/08/2008 |
| 7315455 | Surface-mounted electronic component module and method for manufacturing the same More compact, thinner, shorter and lighter surface-mounted electronic component modules and their manufacturing methods at low costs, thus making them industrially highly valuable are available. Such the component includes a wiring substrate having wiring patterns f... | 01/01/2008 |
| 7304372 | Semiconductor package A semiconductor package including a bidirectional compound semiconductor component and two power semiconductor devices connected in a cascode configuration. ... | 12/04/2007 |
| 7298045 | Stacked semiconductor device A first semiconductor element and second semiconductor element are bonded via die-bonding material. A first electrode of the first semiconductor element and a third electrode are joined, by means of flip-chip bonding, to a semiconductor carrier that has the third el... | 11/20/2007 |
| 7294790 | Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer Apparatus is provided for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used ... | 11/13/2007 |
| 7282789 | Back-to-back semiconductor device assemblies A back-to-back semiconductor device assembly includes two vertically mountable semiconductor devices, the backs of which are secured to one another. The bond pads of both semiconductor devices are disposed adjacent a single, mutual edge of the assembly. The semicond... | 10/16/2007 |
| 7283414 | Method for improving the precision of a temperature-sensor circuit The preferred embodiments described below provide a method and memory device for improving the precision of a temperature-sensor circuit. In one preferred embodiment, first and second temperature-dependent reference voltages are generated and compared, and an operat... | 10/16/2007 |
| 7277343 | Memory device with improved temperature-sensor circuit The preferred embodiments described below provide a method and memory device for improving the precision of a temperature-sensor circuit. In one preferred embodiment, first and second temperature-dependent reference voltages are generated and compared, and an operat... | 10/02/2007 |
| 7276790 | Methods of forming a multi-chip module having discrete spacers An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantiall... | 10/02/2007 |
| 7268422 | Method of making a semiconductor device adapted to remove noise from a signal What is invented is a semiconductor device (10) comprising a pellet (12) having a ground electrode (18), an outside signal terminal (15) connected to the pellet (12), so as to receive signal which is likely to include noise. Therei... | 09/11/2007 |
| 7259450 | Double-packaged multi-chip semiconductor module A plurality of semiconductor die is packaged into one component. The inventive design comprises devices which have been singularized, packaged and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices is then r... | 08/21/2007 |
| 7256488 | Semiconductor package with crossing conductor assembly and method of manufacture A semiconductor package uses various forms of conductive traces that connect to die bond pads via bond wires. In one form, adjacent bond wires are intentionally crossed around midpoints thereof to reduce self-inductance of the conductors and to minimize self-inducta... | 08/14/2007 |