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| Number | Title | Issue Date |
| 8188596 | Multi-chip module A multi-chip module is disclosed. In one embodiment, the multichip module includes a first chip, a second chip and a common chip carrier is disclosed. The first chip and the second chip are mounted on the common chip carrier. The second chip is mounted on the chip c... | 05/29/2012 |
| 8183688 | Semiconductor device There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a modul... | 05/22/2012 |
| 8183687 | Interposer for die stacking in semiconductor packages and the method of making the same Methods and apparatus for improved electrical, mechanical and thermal performance of stacked IC packages are described. An IC package comprises a substrate, a first die, a second die, and an interposer with an opening in a first surface of the interposer configured ... | 05/22/2012 |
| 8174115 | Multi-chip package memory device Provided is a multi-chip package memory device. The multi-chip package memory device may include a transmission memory chip and a plurality of memory chips that are stacked on the transmission memory chip. The transmission memory chip may include a temporary storage... | 05/08/2012 |
| 8169073 | Semiconductor device and electronic apparatus of multi-chip packaging External connection terminals 27 which are electrically connected to semiconductor chips 11-1, 11-2, 12-1, 12-2 and also protrude beyond the semiconductor chips 11-1, 11-2, 12-1, 12-2 are d... | 05/01/2012 |
| 8164184 | Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A first insulating layer is formed over the die. A recessed region with angled sidewall is formed in the peripheral area. A first conductive layer is formed... | 04/24/2012 |
| 8154117 | High power integrated circuit device having bump pads An integrated circuit (IC) includes a substrate having a semiconducting surface, a first array of devices on and in the semiconducting surface including first and second coacting current conducting nodes, a plurality of layers disposed on the substrate and including... | 04/10/2012 |
| 8148814 | Semiconductor integrated circuit device comprising a plurality of semiconductor chips mounted to stack for transmitting a signal between the semiconductor chips In a through-via-hole path of semiconductor chips stacked in N stages, repeater circuits are provided in the respective semiconductor chips. For example, a signal transmitted from an output buffer circuit of the semiconductor chip is transmitted to an input buffer c... | 04/03/2012 |
| 8148813 | Integrated circuit package architecture A packaging architecture for an integrated circuit is provided. The architecture includes a printed circuit board and a package substrate disposed on the printed circuit board. A first integrated circuit is disposed on a first surface of the package substrate. The p... | 04/03/2012 |
| 8143720 | Semiconductor module with micro-buffers The semiconductor module includes a plurality of memory die on a first side of a substrate and a plurality of buffer die on a second side of the substrate. Each of the memory die is disposed opposite and electrically coupled to one of the buffer die. ... | 03/27/2012 |
| 8143719 | Vented die and package A die that includes a substrate having a first and second major surface is disclosed. The die has at least one unfilled through via passing through the major surfaces of the substrate. The unfilled through via serves as a vent to release pressure generated during as... | 03/27/2012 |
| 8143718 | Semiconductor device having stress relaxation sections A semiconductor device having a semiconductor substrate including a first surface and a second surface corresponding to a back surface with respect to the first surface and having first through electrodes which extend through the first surface and the second surface... | 03/27/2012 |
| 8138598 | Semiconductor device and a manufacturing method of the same In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power... | 03/20/2012 |
| 8138599 | Wireless communication device integrated into a single package A method, apparatus and system with an autonomic, self-healing polymer capable of slowing crack propagation within the polymer and slowing delamination at a material interface. ... | 03/20/2012 |
| 8125079 | Molded semiconductor device, apparatus for producing the same, and method for manufacturing the same A resin molding mold 20 with a cavity 21 has a resin injection port 29a from which a molding resin 25 is injected toward the cavity 21, and an air release port 30a from which air from the cavity 21 is re... | 02/28/2012 |
| 8120173 | Thin embedded active IC circuit integration techniques for flexible and rigid circuits A flexible electronic circuit member formed of a plurality of dielectric layers includes a plurality of thinned semiconductor chips embedded within the circuit member for increased levels of integration and component density. The thinned semiconductor chips may incl... | 02/21/2012 |
| 8093718 | Chip structure and stacked structure of chips A chip structure and a stacked structure composed of the chip structures are provided. The chip structure has a substrate and at least one compliant contact. Furthermore, the chip structure may further have a redistribution layer for redistributing pads originally d... | 01/10/2012 |
| 8093716 | Contact fuse which does not touch a metal layer The present invention provides a semiconductor device fuse, comprising a metal layer and a first semiconductor layer that electrically couples the metal layer to a fuse layer, wherein the fuse layer is spaced apart from the metal layer. The semiconductor device fuse... | 01/10/2012 |
| 8093717 | Microstrip spacer for stacked chip scale packages, methods of making same, methods of operating same, and systems containing same A chip package includes a microstrip spacer disposed between a first die and a second die. The microstrip spacer includes electrically conductive planes that are ground planes for at least one of the first die and the second die. A method includes operating the firs... | 01/10/2012 |
| 8080874 | Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween A system, method, and apparatus are included for providing additional space between an integrated circuit package and a circuit board. An integrated circuit package is provided including a plurality of integrated circuit package contacts. Also provided is a circuit ... | 12/20/2011 |
| 8080873 | Semiconductor device, semiconductor package, and method for testing semiconductor device A semiconductor device designed to facilitate testing. Superimposed first and second semiconductor chips each include a plurality of internal terminals, an external terminal, and a plurality of transistors. A plurality of wires connect the internal terminals, the tr... | 12/20/2011 |
| 8072062 | Circuit device with at least partial packaging and method for forming A circuit device is placed within an opening of a conductive layer which is then partially encapsulated with an encapsulant so that the active surface of the circuit device is coplanar with the conductive layer. At least a portion of the conductive layer may be used... | 12/06/2011 |
| 8072063 | LED lamp module and fabrication method thereof An LED lamp module includes a heat sink element having one-piece form; a circuit substrate affixed onto the heat sink element, wherein the substrate has at least an opening exposing the heat sink element, and has an area smaller than that of the heat sink element; a... | 12/06/2011 |
| 8072064 | Semiconductor package and method for making the same The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of f... | 12/06/2011 |
| 8044507 | Sealing apparatus for semiconductor wafer, mold of sealing apparatus, and semiconductor wafer A sealing apparatus for sealing by resin a semiconductor wafer having semiconductor elements on its surface. The apparatus includes an upper mold and a tower mold having an area where the semiconductor wafer is mounted, the lower mold having an uneven surface in the... | 10/25/2011 |
| 8039954 | Bidirectional switch module A first semiconductor element having a junction electrode to be connected to a first node of a bidirectional switch circuit is mounted on a first metal base plate to be a heat dissipation plate, and a second semiconductor element having a junction electrode to be co... | 10/18/2011 |
| 8030764 | High temperature operating package and circuit design The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked o... | 10/04/2011 |
| 8030763 | Semiconductor package with reduced inductive coupling between adjacent bondwire arrays A semiconductor package (20) includes circuits (22, 24). The circuit (22) includes electrical devices (52, 54) interconnected by a bondwire array (62). Likewise, the circuit (24) includes electrical devices (58, 60) i... | 10/04/2011 |
| 8026598 | Semiconductor chip module with stacked flip-chip unit A semiconductor chip module includes a first flip-chip unit and a second flip-chip unit. The first flip-chip unit has a first chip and a first glass circuit board. The first chip is connected with the first glass circuit board by flip-chip bonding. The second flip-c... | 09/27/2011 |
| 8022536 | Semiconductor substrate for build-up packages The present invention provides techniques to fabricate build-up single or multichip modules. In one embodiment, this is accomplished by dispensing die-attach material in one or more pre-etched cavities on a substrate. A semiconductor die is then placed over each pre... | 09/20/2011 |
| 7999377 | Method and structure for optimizing yield of 3-D chip manufacture The process begins with separate device wafers having complimentary chips. Thin metal capture pads, having a preferred thickness of about 10 microns so that substantial pressure may be applied during processing without damaging capture pads, are deposited on both de... | 08/16/2011 |
| 7999378 | Semiconductor devices including semiconductor dice in laterally offset stacked arrangement A semiconductor device assembly includes two or more dice stacked in laterally offset arrangement relative to one another. With such an arrangement, when a second semiconductor die is positioned over a first semiconductor die, bond pads of the first semiconductor di... | 08/16/2011 |
| 7999376 | Semiconductor device and its manufacturing method An object of the present invention is to provide a semiconductor device by packaging a plurality of semiconductor chips three-dimensionally in a smaller thickness, with a smaller footprint, at the lower cost without using any other components and through a simpler m... | 08/16/2011 |
| 7973404 | Relay board provided in semiconductor device, semiconductor device, and manufacturing method of semiconductor device A relay board provided in a semiconductor device, including an entire main surface that is made of a conductive material. The relay board may further include a substrate made of the same material as at least one semiconductor element provided in the semiconductor de... | 07/05/2011 |
| 7969000 | Semiconductor device A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a firs... | 06/28/2011 |
| 7964960 | Semiconductor device having non parallel cleavage planes in a substrate and supporting substrate The invention prevents a fracture parallel to a cleavage plane of a supporting substrate along a groove formed in the supporting substrate before dicing. A supporting substrate is attached to a front surface of a semiconductor substrate formed with an electronic dev... | 06/21/2011 |
| 7960828 | Carrier frame for electronic components and production method for electronic components The carrier frame relating to the present invention comprises a base layer member, a frame layer member, and a positioning layer member having multiple openings for storing electronic components. A spring layer member is mounted in a hollow part surrounded by the fr... | 06/14/2011 |
| 7952194 | Silicon interposer-based hybrid voltage regulator system for VLSI devices A voltage regulation module and system for an integrated circuit die. The voltage regulation module includes an interposer situated in a stack between a substrate and the integrated circuit die. The interposer includes a hybrid array of voltage regulation elements f... | 05/31/2011 |
| 7944047 | Method and structure of expanding, upgrading, or fixing multi-chip package Embodiments of the present invention generally provide techniques and apparatus for altering the functionality of a multi-chip package (MCP) without requiring entire replacement of the MCP. The MCP may be designed with a top package substrate designed to interface w... | 05/17/2011 |
| 7911053 | Semiconductor packaging with internal wiring bus A packaged semiconductor includes inner bond fingers, at least first and second semiconductor dies, and an interposer. The packaged semiconductor further includes wiring between the first and second semiconductor dies and the inner bond fingers, wiring between the i... | 03/22/2011 |
