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| Number | Title | Issue Date |
| 8188585 | Electronic device and method for producing a device An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body. ... | 05/29/2012 |
| 8188586 | Mountable integrated circuit package system with mounting interconnects A mountable integrated circuit package system includes: mounting a first integrated circuit device over a carrier; mounting a substrate over the first integrated circuit device, the substrate having a mounting interconnect; connecting a first electrical interconnect... | 05/29/2012 |
| 8183676 | Memory circuit having memory chips parallel connected to ports and corresponding production method A memory circuit includes multiple memory chips configured to store data and disposed in at least one stack. The memory circuit includes multiple ports configured to receive and transmit control signals and data to and from the memory chips and to supply energy to t... | 05/22/2012 |
| 8183677 | Device including a semiconductor chip A device including a semiconductor chip. One embodiment provides a device, including a metal layer having a first layer face. A semiconductor chip includes a first chip face. The semiconductor chip is electrically coupled to and placed over the metal layer with the ... | 05/22/2012 |
| 8183678 | Semiconductor device having an interposer A semiconductor device and a method of fabricating the same. An interposer used for the semiconductor device includes integrated circuits therein to realize the functions of a decoupling capacitor, an ESD preventing circuit, an impedance matching circuit, and termin... | 05/22/2012 |
| 8183679 | Electronic part package A peeling off layer 18 is formed on an entire surface of one surface side of a support plate 10 including the inner wall surfaces respectively of a recessed part 12 for an electronic part and recessed parts 16 for posts in which the posts... | 05/22/2012 |
| 8178959 | Process for fabricating a semiconductor component support, support and semiconductor device An electrical connection support for receiving a semiconductor component includes an electrical connection plate having electrical connection pads. A stand-off structure is provided over the electrical connection pads. The stand-off structure may include a supplemen... | 05/15/2012 |
| 8178961 | Semiconductor package structure and package process A semiconductor package structure and a package process are provided, wherein a lower surface of a die pad of a leadframe is exposed by an encapsulant so as to improve the heat dissipation efficiency of the semiconductor package structure. In addition, two chips are... | 05/15/2012 |
| 8178960 | Stacked semiconductor package and method of manufacturing thereof Provided is a stacked semiconductor package and a method of manufacturing the same. The stacked semiconductor package may include a first semiconductor package, a second semiconductor package, and at least one electrical connection device electrically connecting the... | 05/15/2012 |
| 8174109 | Electronic device and method of manufacturing same An electronic device includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first electronic component, a first sealing resin, and a first multilayer interconnection structure including a first interconnect... | 05/08/2012 |
| 8174106 | Through board stacking of multiple LGA-connected components A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of... | 05/08/2012 |
| 8174107 | Stacked semiconductor devices and a method for fabricating the same The present invention provides a semiconductor device that includes semiconductor packages arranged in a stacked configuration. A plurality of leads are drawn from the stacked semiconductor packages and folded around the outer shape of each semiconductor package suc... | 05/08/2012 |
| 8174108 | Method for facilitating the stacking of integrated circuits having different areas and an integrated circuit package constructed by the method An integrated circuit package comprises a package substrate, an application specific integrated circuit (ASIC) having a first area and formed on a first wafer made from a select semiconductor material, a second wafer of the select semiconductor material, and a suppl... | 05/08/2012 |
| 8169065 | Stackable circuit structures and methods of fabrication thereof Stackable circuit structures and methods of fabrication are provided employing first level metallization directly on a chips-first layer(s), which includes: a chip(s), each with a pad mask over its upper surface and openings exposing its contact pads; electrically c... | 05/01/2012 |
| 8169064 | Nested integrated circuit package on package system A package on package system is provided including providing a first substrate having a first integrated circuit thereon and a second substrate having a second integrated circuit thereon, the second substrate having a recess provided therein. The first and second sub... | 05/01/2012 |
| 8169066 | Semiconductor package Provided is a semiconductor package including a first package and a second package. The first package includes a first substrate having a first front side and a first back side opposing the first front side. The first package further includes a first semiconductor c... | 05/01/2012 |
| 8164171 | System-in packages System-in packages, or multichip modules, are described which can include multi-layer chips in a multi-layer polymer structure, on-chip metal bumps on the multi-layer chips, intra-chip metal bumps in the multi-layer polymer structure, and patterned metal layers in t... | 04/24/2012 |
| 8164172 | Integrated circuit package in package system An integrated circuit package in package system includes: a base integrated circuit package with a base lead substantially coplanar with a base die paddle and having a portion with a substantially planar base surface; an extended-lead integrated circuit package with... | 04/24/2012 |
| 8159058 | Semiconductor device having wiring substrate stacked on another wiring substrate Miniaturization and high-performance of a semiconductor device are promoted, which has a package on package (POP) structure in which a plurality of semiconductor packages is stacked in a multistage manner. A testing conductive pad for determining the quality of a co... | 04/17/2012 |
| 8159061 | Stacked semiconductor module A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip... | 04/17/2012 |
| 8159060 | Hybrid bonding interface for 3-dimensional chip integration Each of a first substrate and a second substrate includes a surface having a diffusion resistant dielectric material such as silicon nitride. Recessed regions are formed in the diffusion resistant dielectric material and filled with a bondable dielectric material. T... | 04/17/2012 |
| 8159059 | Microelectromechanical device and method for manufacturing the same The present invention relates to a microelectromechanical device having a simple structure in which strains of the semiconductor substrate can be reduced. Both a semiconductor substrate 17 and a second substrate 14 are disposed to face a first main sur... | 04/17/2012 |
| 8159062 | Semiconductor and a method of manufacturing the same A method including forming an intermediate product, the intermediate product being configured to include a wiring substrate including a plurality of first electrodes, a plurality of second electrodes and a plurality of test electrodes, a first semiconductor chip mou... | 04/17/2012 |
| 8154112 | Semiconductor memory apparatus The semiconductor memory apparatus related to an embodiment of the present invention includes a wiring substrate arranged with a device mounting part and connection pads aligned along one exterior side of the wiring substrate, a plurality of semiconductor memory dev... | 04/10/2012 |
| 8148806 | Multiple chips bonded to packaging structure with low noise and multiple selectable functions The package includes a substrate, a first chip, a second chip, multiple first bumps and multiple second bumps. The substrate has a first region and a second region. The first region is substantially coplanar with the second region. The first bumps connect the first ... | 04/03/2012 |
| 8148807 | Packaged microelectronic devices and associated systems Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged microelectronic device can include a support member, a first die attached to the support member, and a second die atta... | 04/03/2012 |
| 8143710 | Wafer-level chip-on-chip package, package on package, and methods of manufacturing the same A method of manufacturing a multi-chip package in which a plurality of semiconductor chips are mounted on a single package using a chip-on-chip technique reduces warping due to a difference in coefficients of thermal expansion (CTEs) between a printed circuit board ... | 03/27/2012 |
| 8143711 | Integrated circuit package system with offset stacking and anti-flash structure An integrated circuit package system includes: a carrier; a device structure in an offset location over the carrier with the device structure having a bond pad and a contact pad; an electrical interconnect between the bond pad and the carrier; an anti-flash structur... | 03/27/2012 |
| 8143709 | Semiconductor package having solder ball which has double connection structure A semiconductor package having a solder ball having a double connection structure which reduces a total height of a package on package (POP). The semiconductor package includes a first semiconductor package in which a semiconductor device is mounted on a lower surfa... | 03/27/2012 |
| 8143712 | Die package structure A die package structure, which comprises: a first die; a second die; a core material layer, provided between the first die and the second die; at least one via, penetrating through the first die, the second die and the core material layer; a metal material, stuffing... | 03/27/2012 |
| 8138594 | Semiconductor device and manufacturing method of a semiconductor device A semiconductor device of the present invention comprises a substrate and a first semiconductor element. The substrate comprises an inner layer conductor and a cavity comprising the bottom surface on which a part of the inner layer conductor is exposed. The first se... | 03/20/2012 |
| 8134229 | Layered chip package A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconduct... | 03/13/2012 |
| 8134228 | Semiconductor device for battery power voltage control A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips ar... | 03/13/2012 |
| 8134227 | Stacked integrated circuit package system with conductive spacer A stacked integrated circuit package system is provided including providing a first device and a second device with the first device, the second device, or a combination thereof having an integrated circuit die; forming a conductive spacer structure over the first d... | 03/13/2012 |
| 8129831 | Chip arrangement and method for producing a chip arrangement A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a f... | 03/06/2012 |
| 8129832 | Mountable integrated circuit package system with substrate having a conductor-free recess A mountable integrated circuit package system includes: providing a carrier; mounting a first integrated circuit device over the carrier; mounting a substrate over the first integrated circuit device with the substrate having a conductor-free recess; connecting a fi... | 03/06/2012 |
| 8129833 | Stacked integrated circuit packages that include monolithic conductive vias Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects... | 03/06/2012 |
| 8125065 | Elimination of RDL using tape base flip chip on flex for die stacking A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are ... | 02/28/2012 |
| 8125067 | Method for forming terminal of stacked package element and method for forming stacked package A semiconductor chip module having high degree of freedom in assignment of a circuit to each semiconductor chip and in position of a connection terminal of each semiconductor chip is provided. The present invention relates to a semiconductor chip module in which a p... | 02/28/2012 |
| 8125068 | Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip A semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack thereof, a semiconductor device package thereof, and an electronic apparatus having the same are disclosed. The semiconductor chip comprising, a substrate including an inne... | 02/28/2012 |