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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 8436454 | Reprogrammable circuit board with alignment-insensitive support for multiple component contact types The present invention is directed to a system that programmably interconnects integrated circuit chips and other components at near-intra-chip density. The system's contact structure allows it to adapt to components with a wide variety of contact spacings and interc... | 05/07/2013 |
| 8432026 | Stackable multi-chip package system A stackable multi-chip package system is provided including forming a first external interconnect having a first through hole and a second external interconnect having a second through hole, forming a first package subassembly having the first external interconnect ... | 04/30/2013 |
| 8399972 | Overmolded semiconductor package with a wirebond cage for EMI shielding According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold situated over the component and the substrate. The overmolded package further includes a wirebond cage situ... | 03/19/2013 |
| 8288851 | Method and system for hermetically sealing packages for optics A system for hermetically sealing devices includes a substrate, which includes a plurality of individual chips. Each of the chips includes a plurality of devices and each of the chips are arranged in a spatial manner as a first array. The system also includes a tran... | 10/16/2012 |
| 8283765 | Semiconductor chip and stacked semiconductor package having the same A semiconductor chip and a stacked semiconductor package are presented. The semiconductor chip includes a semiconductor substrate, circuit patterns, first input/output pads and second input/output pads. The semiconductor substrate is divided into cell and peripheral... | 10/09/2012 |
| 8269329 | Multi-chip package A multi-chip package structure is provided with a first chip, a substrate adjacent to the first chip, a plurality of contacts connecting the first chip and the substrate, a second chip disposed between the first chip and the substrate and connecting to the first chi... | 09/18/2012 |
| 8264073 | Multi-phase voltage regulation module A voltage regulator module that includes components for a multi-phase converter, the converter including a plurality of power stage elements on one circuit board, a control element, driver elements, and elements for the output stages of the power stage elements on a... | 09/11/2012 |
| 8253228 | Package on package structure A package on package structure includes a lower package and an upper package. The lower package includes a first semiconductor chip disposed in a chip region of an upper surface of a first substrate. The upper package includes a second semiconductor chip disposed on... | 08/28/2012 |
| 8253227 | Semiconductor integrated circuit device A semiconductor integrated circuit device capable of achieving improvement of I/O processing performance, reduction of power consumption, and reduction of cost is provided. Provided is a semiconductor integrated circuit device including, for example, a plurality of ... | 08/28/2012 |
| 8183675 | Integrated circuit package-on-package system with anti-mold flash feature An integrated circuit package-on-package system includes: mounting an integrated circuit package system having a mountable substrate over a package substrate with the mountable substrate having a mold structure; forming a package encapsulation having a recess over t... | 05/22/2012 |
| 8174104 | Semiconductor arrangement having specially fashioned bond wires A semiconductor arrangement includes first and second integrated circuits (dies), an electrically conductive intermediate element, and one or more bond conductors. The first and the second integrated circuits are arranged in a package. The first integrated circuit h... | 05/08/2012 |
| 8174103 | Enhanced architectural interconnect options enabled with flipped die on a multi-chip package A particular chip is designed having a first variant (front side connected chip) of the chip and a second variant (back side connected chip). The first variant of the chip is attached to a carrier. The second variant of the chip is attached to the carrier inverted r... | 05/08/2012 |
| 8174105 | Stacked semiconductor package having discrete components A stacked semiconductor package includes a substrate and a plurality of semiconductor dice stacked on the substrate. Each semiconductor die includes a recess, and a discrete component contained in the recess encapsulated in a die attach polymer. The stacked semicond... | 05/08/2012 |
| 8138593 | Packaged microchip with spacer for mitigating electrical leakage between components A packaged microchip has a base, at least one spacer coupled to the base, and first and second microchips mounted to the at least one spacer. The at least one spacer is configured to substantially prevent leakage current between the first and second microchips. ... | 03/20/2012 |
| 8138592 | Planar array contact memory cards A Planar Memory Module (PAMM) device comprising a generally planar card comprising a first side and a second side, the first side having a plurality of couplings and the second side having a plurality of connectors, a plurality of memory devices coupled to the card ... | 03/20/2012 |
| 8106496 | Semiconductor packaging system with stacking and method of manufacturing thereof A semiconductor package comprises a semiconductor component (e.g., a die) and a via at least partially covered by an encapsulant. The encapsulant forms substantially parallel top and bottom surfaces, with at least part of the via being exposed on the top surface. At... | 01/31/2012 |
| 8049319 | Ultra wideband system-on-package This research discloses an ultra wideband system-on-package (SoP). The SoP includes a package body; a first integrated circuit mounted on the package body; a first signal transmission unit connected to the first integrated circuit; a signal via connected to the firs... | 11/01/2011 |
| 7989939 | Semiconductor package which includes an insulating layer located between package substrates which may prevent an electrical short caused by a bonding wire Provided is a semiconductor package. The semiconductor package includes a bonding wire electrically connecting a first package substrate and a second package substrate to each other and an insulating layer adhering the first package substrate and the second package ... | 08/02/2011 |
| 7968989 | Multi-package slot array A multi-package module that includes a multi-layer interconnect structure, a housing structure attached to the multi-layer interconnect structure, and a plurality of integrated circuit packages inserted into slots in the housing structure, and placed into contact wi... | 06/28/2011 |
| 7968988 | Power semiconductor module having a thermally conductive base plate on which at least four substrates are arranged in at least one single row The power semiconductor module (1) has a heat-conducting base plate (11) on which at least three substrates (2, 3, 4, 5, 6, 7) are placed, each substrate supporting at least one power semiconductor component (8, 9) that gives off heat gen... | 06/28/2011 |
| 7964946 | Semiconductor package having discrete components and system containing the package A semiconductor package includes a substrate having contacts, and a discrete component on the substrate in electrical communication with the contacts. The package also includes a semiconductor die on the substrate in electrical communication with the contacts, and a... | 06/21/2011 |
| 7952180 | Integrated circuit, interface circuit used in the integrated circuit, and apparatus using the integrated circuit An integrated circuit having an MCM structure, an interface circuit used in the integrated circuit, and an apparatus incorporating the integrated circuit are disclosed. The integrated circuit includes at least two semiconductor devices formed on a common substrate. ... | 05/31/2011 |
| 7911044 | RF module package for releasing stress The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer f... | 03/22/2011 |
| 7893525 | Semiconductor device having an adhesive portion with a stacked structure and method for manufacturing the same It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically conn... | 02/22/2011 |
| 7888784 | Substrate package with through holes for high speed I/O flex cable An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed throu... | 02/15/2011 |
| 7868438 | Multi-chip package for reducing parasitic load of pin Multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal pad... | 01/11/2011 |
| 7851898 | Multichip package or system-in package Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chi... | 12/14/2010 |
| 7847383 | Multi-chip package for reducing parasitic load of pin A multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal p... | 12/07/2010 |
| 7812435 | Integrated circuit package-in-package system with side-by-side and offset stacking An integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting ... | 10/12/2010 |
| 7808092 | Semiconductor device with a plurality of ground planes A multi-chip module (MCM) with a plurality of ground planes/layers is provided. Each integrated circuit (IC) chip of the MCM has its own ground plane on a substrate in the MCM. This MCM structure may facilitate separate testing of each IC chip without affecting othe... | 10/05/2010 |
| 7795716 | RF transistor output impedance technique for improved efficiency, output power, and bandwidth An RF/microwave circuit is configured to eliminate the physical constraint that requires a sacrifice of one output series inductor wirebond for each shunt inductor wirebond. The circuit employs a multi-level metalized substrate as part of its output impedance matchi... | 09/14/2010 |
| 7777319 | Three dimensional integrated circuits A three-dimensional semiconductor device, comprising: a first module layer having a plurality of circuit blocks; and a second module layer positioned substantially above the first module layer, including a plurality of configuration circuits; and a third module laye... | 08/17/2010 |
| 7777320 | Quad flat pack in quad flat pack integrated circuit package system An integrated circuit package system includes: providing a base package having a first integrated circuit with an inner lead on a periphery thereof and connected thereto with interconnects, and the inner lead partially encapsulated by an inner encapsulation; mountin... | 08/17/2010 |
| 7772683 | Stacked integrated circuit package-in-package system A stacked integrated circuit package-in-package system is provided including forming a substrate having a top surface and a bottom surface, mounting a first device over the top surface, stacking a second device over the first device in an offset configuration, conne... | 08/10/2010 |
| 7759781 | LSI package provided with interface module A LSI package encompasses: an interposer having board-connecting joints, which facilitate connection with a printed wiring board, and module-connecting terminals, part of the module-connecting terminals are assigned as interposer-site monitoring terminals; a signal ... | 07/20/2010 |
| 7728418 | Semiconductor device and manufacturing method thereof A semiconductor device includes a plurality of chips comprising a plurality of first moisture-proof rings individually surrounding said plurality of chips, a second moisture-proof ring surrounding the entire plurality of chips, and a wire for connecting said plurali... | 06/01/2010 |
| 7723831 | Semiconductor package having die with recess and discrete component embedded within the recess A semiconductor package includes a substrate having contacts, and a discrete component on the substrate in electrical communication with the contacts. The package also includes a semiconductor die on the substrate in electrical communication with the contacts, and a... | 05/25/2010 |
| 7709941 | Resin-sealed semiconductor device and method of manufacturing the same A semiconductor pellet and chip components are provided on an insulating substrate, and are sealed with a molding resin that is molded by transfer molding. The chip components are positioned so as to surround the semiconductor pellet on all four sides. The lengthwis... | 05/04/2010 |
| 7696615 | Semiconductor device having pillar-shaped terminal A semiconductor device and a method of forming the same are provided. A semiconductor chip included in the semiconductor device includes a pillar-shaped terminal and a pad-shaped terminal in a terminal region. The pillar-shaped terminal is exposed at a first surface... | 04/13/2010 |
| 7687895 | Workpiece with semiconductor chips and molding, semiconductor device and method for producing a workpiece with semiconductors chips A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semicond... | 03/30/2010 |
