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| Number | Title | Issue Date |
| 8188581 | Mechanical coupling in a multi-chip module using magnetic components A multi-chip module (MCM) is described. This MCM includes at least two substrates that are remateably mechanically coupled by positive and negative features on facing surfaces of the substrates. These positive and negative features mate with each other. In particula... | 05/29/2012 |
| 8154110 | Double-faced electrode package and its manufacturing method A dual-face package has an LSI chip sealed with a mold resin, and electrodes for external connections on both of the front face and the back face. The LSI chip is bonded onto the die pad of a leadframe whose outer lead portions are exposed as back-face electrodes at... | 04/10/2012 |
| 8110905 | Integrated circuit packaging system with leadframe interposer and method of manufacture thereof A method of manufacture of an integrated circuit packaging system includes: forming a substrate; mounting a base integrated circuit on the substrate; forming a leadframe interposer, over the base integrated circuit, by: providing a metal sheet, mounting an integrate... | 02/07/2012 |
| 8076762 | Variable feature interface that induces a balanced stress to prevent thin die warpage A packaged semiconductor product includes a packaging substrate coupled to a semiconductor die through an interconnect structure with elements of variable features. The interconnect structure may be bumps or pillars. The variable features of the interconnect structu... | 12/13/2011 |
| 8067823 | Chip scale package having flip chip interconnect on die paddle A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has interconnection between the active site of the die and the die paddle. Also, methods for making the package are disclosed. ... | 11/29/2011 |
| 8022514 | Integrated circuit package system with leadfinger support An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predete... | 09/20/2011 |
| 7875964 | Multi-chip semiconductor connector and method In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die. ... | 01/25/2011 |
| 7868431 | Compact power semiconductor package and method with stacked inductor and integrated circuit die A power semiconductor package is disclosed with high inductance rating while exhibiting a reduced foot print. It has a bonded stack of power IC die at bottom, a power inductor at top and a circuit substrate, made of leadframe or printed circuit board, in the middle.... | 01/11/2011 |
| 7859090 | Die attach method and leadframe structure In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to t... | 12/28/2010 |
| 7847377 | Semiconductor device including semiconductor chip with two pad rows A semiconductor device includes a semiconductor chip having at a center area thereof first and second pad rows which include a plurality of first pads and a plurality of second pads, respectively. A package substrate is bonded to the semiconductor chip. The package ... | 12/07/2010 |
| 7843044 | Semiconductor device Two vertical-type power MISFETs are formed over a semiconductor chip, a common drain electrode formed over a back surface of the semiconductor chip is electrically connected with a drain terminal via a conductive bonding material, source electrodes and gate electrod... | 11/30/2010 |
| 7781873 | Encapsulated leadframe semiconductor package for random access memory integrated circuits A thin, small outline IC leadframe plastic package to be used to assemble high performance, high speed semiconductor memory IC devices such as dynamic random access memories (DRAM) having a high data transfer rate in the range of 1 GigaHertz. The package leadframe i... | 08/24/2010 |
| 7741705 | Semiconductor device and method of producing the same A semiconductor device includes a semiconductor substrate having an internal circuit; an electrode pad electrically connected to the internal circuit; an insulating film having a through hole exposing the electrode pad; and a re-distribution wiring pattern formed on... | 06/22/2010 |
| 7675144 | Method of making wireless semiconductor device, and leadframe used therefor A method of making a semiconductor device is provided. The method includes the following steps. First, a semiconductor chip is mounted on a lower conductor, with first solder material applied between the chip and the lower conductor. Then, an upper conductor is plac... | 03/09/2010 |
| 7635910 | Semiconductor package and method A semiconductor package is disclosed. In one embodiment, the semiconductor package includes a leadframe including a chip position and a plurality of leadfingers. Each leadfinger includes a cutout in an inner edge providing a chip recess. The semiconductor package fu... | 12/22/2009 |
| 7589400 | Inverter and vehicle drive unit using the same The inverter has a plurality of arms for conducting or cutting off a current and each arm has a switching device and a first and a second wiring layer for connecting the switching device. The first and second wiring layers of each arm are respectively formed on insu... | 09/15/2009 |
| 7582956 | Flip chip in leaded molded package and method of manufacture thereof A chip device that includes a leadframe, a die and a mold compound. The backside of the die is metallized and exposed through a window defined within a mold compound that encapsulates the die when it is coupled to the leadframe. Leads on the leadframe are coupled to... | 09/01/2009 |
| 7538415 | Semiconductor chip assembly with bumped terminal, filler and insulative base A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, an encapsulant an... | 05/26/2009 |
| 7525181 | Tape wiring substrate and tape package using the same A tape wiring substrate may have dispersion wiring patterns. The dispersion wiring patterns may be provided between input/output wiring pattern groups to compensate for the intervals therebetween. Connecting wiring patterns may be configured to connect the dispersio... | 04/28/2009 |
| 7511363 | Copper interconnect An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described whe... | 03/31/2009 |
| 7485952 | Drop resistant bumpers for fully molded memory cards A memory card comprising a leadframe having a plurality of contacts, at least one die pad, and a plurality of conductive traces extending from respective ones of the contacts toward the die pad. Also included in the leadframe are at least two bumpers. Attached to th... | 02/03/2009 |
| 7466013 | Semiconductor die structure featuring a triple pad organization A semiconductor die featuring vertical rows of bonding pad structures is disclosed. The rows of bonding pad structures are located vertically in the Y direction, or traversing the width of the semiconductor die. A vertical row of bonding pad structures is located on... | 12/16/2008 |
| 7466014 | Flip chip mounted semiconductor device package having a dimpled leadframe A flip chip mounted semiconductor device package having a dimpled leadframe is disclosed. The semiconductor device package includes a leadframe having a plurality of source dimples and a gate dimple, and a semiconductor die having a plurality of source contact areas... | 12/16/2008 |
| 7453140 | Semiconductor chip assembly with laterally aligned filler and insulative base A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a filler, a connection joint that electrically connects the routing line and the pad, an encapsulant and an insulative bas... | 11/18/2008 |
| 7446400 | Chip package structure and fabricating method thereof A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface, first bonding pads and second bonding pads, wherein the first bonding pads and the second bonding pads are disposed on ... | 11/04/2008 |
| 7443015 | Integrated circuit package system with downset lead An integrated circuit package system includes an integrated circuit package having a downset terminal lead, a planar recessed lead surface of the downset terminal lead, and an attached integrated circuit over the planar recessed lead surface. ... | 10/28/2008 |
| 7443013 | Flexible substrate for package of die The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a p... | 10/28/2008 |
| 7443038 | Flip-chip image sensor packages The present invention provides flip-chip packaging for optically interactive devices such as image sensors and methods of assembly. In a first embodiment of the invention, conductive traces are formed directly on the second surface of a transparent substrate and an ... | 10/28/2008 |
| 7432585 | Semiconductor device electronic component, circuit board, and electronic device A semiconductor device includes: a semiconductor substrate having an active face; a first electrode provided on or above the active face; an external connection terminal provided on or above the active face and electrically connected to the first electrode; and a co... | 10/07/2008 |
| 7432555 | Testable electrostatic discharge protection circuits A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding... | 10/07/2008 |
| 7425758 | Metal core foldover package structures Chip-scale packages and assemblies thereof and methods of fabricating such packages including Chip-On-Board, Board-On-Chip, and vertically stacked Package-On-Package modules are disclosed. The chip-scale package includes a core member of a metal or alloy having a re... | 09/16/2008 |
| 7425759 | Semiconductor chip assembly with bumped terminal and filler A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulan... | 09/16/2008 |
| 7411280 | Chip support of a leadframe for an integrated circuit package The central region of a leadframe (101, 201, 301, 401, 501, 601, 701, 801, 901, 1001, 1101, 1201), is selectively etched to leave upright portions (104, 204, 304, 404, 504, 604, 704, 804, 904, 1004, 1104, 1204). Subsequently, during the packaging proce... | 08/12/2008 |
| 7408204 | Flip-chip packaging structure for light emitting diode and method thereof A packaging structure and method for a light emitting diode is provided. The present invention uses flip-chip and eutectic bonding technology to attach a LED to a thermal and electrical conducting substrate. The flip-chip packaging structure comprises a thermal and ... | 08/05/2008 |
| 7408242 | Carrier with reinforced leads that are to be connected to a chip This invention is directed to preventing deformation, breakage, and the like of leads in a semiconductor device, reducing the fraction of defects, and making the semiconductor device smaller and thinner. In order to accomplish these objects, in a carrier including a... | 08/05/2008 |
| 7405664 | Radio frequency IC tag and method for manufacturing the same A radio frequency IC tag and a manufacturing method for the same includes an IC chip on which information is stored, and an antenna for transmitting the information that is stored on the IC chip. In the antenna, a power-feeding part on which the IC chip is mounted e... | 07/29/2008 |
| 7400032 | Module assembly for stacked BGA packages Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrange... | 07/15/2008 |
| 7396476 | Method for reducing harmonic distortion in comb drive devices Methods of fabricating comb drive devices utilizing one or more sacrificial etch-buffers are disclosed. An illustrative fabrication method may include the steps of etching a pattern onto a wafer substrate defining one or more comb drive elements and sacrificial etch... | 07/08/2008 |
| 7385279 | Semiconductor device and a method of manufacturing the same A semiconductor device and method having high output and having reduced external resistance is reduced and improved radiating performance. A MOSFET (70) has a connecting portion for electrically connecting a surface electrode of a semiconductor pellet and a p... | 06/10/2008 |
| 7372142 | Vertical conduction power electronic device package and corresponding assembling method A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sid... | 05/13/2008 |
