Quotables
"The radio craze will die out in time."
Thomas Edison ; 1922
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8188578 | Seal ring structure for integrated circuits A seal ring structure disposed along a periphery of an integrated circuit. The seal ring is divided into at least a first portion and a second portion. The second portion is positioned facing and shielding an analog and/or RF circuit block from a noise. A deep N wel... | 05/29/2012 |
| 8178953 | On-chip RF shields with front side redistribution lines A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The ... | 05/15/2012 |
| 8169059 | On-chip RF shields with through substrate conductors Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, the system on a chip includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the ... | 05/01/2012 |
| 8164167 | Integrated circuit structure and a method of forming the same An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit ... | 04/24/2012 |
| 8138584 | Method of forming a semiconductor package and structure thereof An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed by forming a conductive layer (34, 46) over an encapsulant (32). The conductive layer includes a combination of a conductive glue (38, 48, 52) and a metal pa... | 03/20/2012 |
| 8129824 | Shielding for a semiconductor package A semiconductor device has a substrate. A first die is electrically attached to a first surface of the substrate. A shield spacer having a first and second surface is provided wherein the second surface of the shield spacer is attached to a first surface of the firs... | 03/06/2012 |
| 8125057 | Magnetic shielding for integrated circuit A shielded integrated circuit structure including an integrated circuit having a plurality of functional elements thereon, and a tiled array comprising a plurality of shielding elements, each functional element having one of the plurality of shielding elements proxi... | 02/28/2012 |
| 8125058 | Faraday cage for circuitry using substrates An apparatus and method uses a first Faraday cage portion and a second Faraday cage portion to provide a Faraday cage enclosure surrounding at least one circuit device. For example, the first Faraday cage portion may include a first conductive portion of a Faraday c... | 02/28/2012 |
| 8110902 | Chip package and manufacturing method thereof A chip package including at least a shielding layer for better electromagnetic interferences shielding is provided. The shielding layer disposed over the top surface of the laminate substrate can protect the chip package from the underneath EMI radiation. The chip p... | 02/07/2012 |
| 8102031 | Security element for an integrated circuit, integrated circuit including the same, and method for securing an integrated circuit An integrated circuit including a substrate; a circuit pattern formed over the substrate; and one or more fences formed around edges of the circuit pattern, each of the one or more fences having a determined electrical resistance which is used to detect the addition... | 01/24/2012 |
| 8102032 | System and method for compartmental shielding of stacked packages A semiconductor device has a first substrate having a plurality of metal traces. At least one electronic component is electrically attached to a first surface of the first substrate. A second substrate has a plurality of metal traces and attached to the first substr... | 01/24/2012 |
| 8102033 | Reduced soft error rate through metal fill and placement A method for reducing single event upsets in an integrated circuit includes the step of providing a plurality of levels within the integrated circuit, wherein the plurality of levels within the integrated circuit are in a stacked arrangement. The method also include... | 01/24/2012 |
| 8102034 | Semiconductor device and manufacturing method of the same With the use of a conductive shield formed on the top or bottom side of a semiconductor integrated circuit, an electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) of the semiconductor integrated circuit due to electrostatic di... | 01/24/2012 |
| 8080864 | Solution of power consumption reduction for inverter covered by metal case For improving efficiency of a power device having an exposed surface capable of radiating energy, a shielding layer is disposed in between the exposed surface and a conductive layer. The shielding layer causes at least a portion of the energy to be directed back int... | 12/20/2011 |
| 8076757 | Semiconductor device having electrical devices mounted to IPD structure and method of shielding electromagnetic interference A semiconductor device has an IPD structure formed over a substrate. First and second electrical devices are mounted to a first surface of the IPD structure. An encapsulant is deposited over the first and second electrical devices and IPD structure. A shielding laye... | 12/13/2011 |
| 8076758 | Wafer structure A wafer structure includes a plurality of dies, an edge portion, a passivation layer, and a UV-blocking metal layer. Each of the dies having an integrated circuit formed thereon, and the circuit includes an upmost metal layer that includes bonding pads. A composite ... | 12/13/2011 |
| 8072047 | Integrated circuit package system with shield and tie bar An integrated circuit package system includes: providing a tie bar and a lead adjacent thereto; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield connected to the tie bar; and encapsulating the integrated ci... | 12/06/2011 |
| 8072048 | Semiconductor apparatus Disclosed is a semiconductor apparatus that prevents diffusion of materials of a magnetic film during the process for manufacturing the semiconductor apparatus. The semiconductor apparatus includes: a substrate; a semiconductor device formed on a principal surface o... | 12/06/2011 |
| 8063469 | On-chip radio frequency shield with interconnect metallization Structure and method for fabricating a system on chip with an on-chip RF shield including interconnect metallization is described. In one embodiment, the system on chip includes an RF circuitry disposed on a first portion of a top surface of a substrate, and a semic... | 11/22/2011 |
| 8058712 | Device having wire bond and redistribution layer A semiconductor device comprises a copper redistribution line, a copper inductor and aluminum wire bond pads and the integration of the resulting device with an integrated circuit on a single chip, resulting in the decreased size of the chip. ... | 11/15/2011 |
| 8053873 | IC having voltage regulated integrated Faraday shield An integrated circuit (IC) includes a substrate having a top semiconductor surface and a bottom surface, and integrated circuitry including an analog subcircuit and at least one digital subcircuit formed on the top semiconductor surface. A plurality of through subst... | 11/08/2011 |
| 8053872 | Integrated shield for a no-lead semiconductor device package The present invention integrates a shield on a flat, no-lead (FN) semiconductor package, which has multiple rows of contact pads along any side. The FN semiconductor package will have at least one inner row and one outer row of contact pads on at least one side. The... | 11/08/2011 |
| 8049311 | Electronic component and method for its production An electronic component includes a number of leads and at least one cooling element. The bottom surface of the cooling element is exposed and the material of the cooling element is different from the material of the leads. At least one semiconductor chip is provided... | 11/01/2011 |
| 8044494 | Stackable molded packages and methods of making the same A first packaged integrated circuit (IC) includes a package substrate, at least one IC die attached to a first surface of the package substrate, a plurality of conductive members on the first surface at least partially surrounding the at least one IC die and electri... | 10/25/2011 |
| 8039930 | Package structure for wireless communication module A package structure for a wireless communication module is disclosed and includes: a substrate having an upper surface defining a supporting region, an annular ground pad surrounding the supporting region, and at least one auxiliary ground pad formed in the supporti... | 10/18/2011 |
| 8022511 | Semiconductor device packages with electromagnetic interference shielding Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) a grounding element disposed adjacent to a periphery of the substrate unit and extending ... | 09/20/2011 |
| 8018033 | Semiconductor device and manufacturing method of the same A semiconductor device includes a wiring board, a semiconductor element mounted on the wiring board, a sealing resin configured to cover the semiconductor element, a ground electrode having an end connected to a wiring layer of the wiring board and an exposing part ... | 09/13/2011 |
| 8008753 | System and method to reduce shorting of radio frequency (RF) shielding An integrated circuit module has a substrate having a plurality of metal traces. At least one semiconductor package is electrically coupled to at least one metal trace on a first surface of the substrate. At least one electronic component is electrically coupled to ... | 08/30/2011 |
| 8008754 | Semiconductor package having an antenna with reduced area and method for fabricating the same A semiconductor package includes an electromagnetic shielding member for shielding electromagnetic waves. An antenna is disposed on an upper face of the electromagnetic shielding member and includes an antenna part with a plurality of conductive particles electrical... | 08/30/2011 |
| 8004067 | Semiconductor apparatus A semiconductor apparatus includes: a substrate of single crystal silicon; a first device formed in a first region of a surface of the substrate; a first interlayer insulating film formed on the substrate; a polycrystalline silicon layer formed in a second region on... | 08/23/2011 |
| 8004068 | Shielded multi-layer package structures Embodiments include shielded multi-layer packages for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110 | 08/23/2011 |
| 7999361 | Shielding structure for transmission lines A shielding structure comprises first and second comb-like structures defined in a first metallization layer on an integrated circuit, each comb-like structure comprising a plurality of teeth, the teeth of each comb-like structure extending toward the other comb-lik... | 08/16/2011 |
| 7999358 | Shielding device One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in... | 08/16/2011 |
| 7999359 | Semiconductor package with electromagnetic shield A semiconductor package with an electromagnetic shield is disclosed. The semiconductor package includes two substrates (102, 202; 103, 203) and an electromagnetic shield (101, 201). Each substrate has at least one die (108, 208; 112, 212) provid... | 08/16/2011 |
| 7999360 | Underlayer for high performance magnetic tunneling junction MRAM An MRAM structure is disclosed in which the bottom electrode has an amorphous TaN capping layer to consistently provide smooth and dense growth for AFM, pinned, tunnel barrier, and free layers in an overlying MTJ. Unlike a conventional Ta capping layer, TaN is oxida... | 08/16/2011 |
| 7989928 | Semiconductor device packages with electromagnetic interference shielding Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element; (2) a semiconductor device disposed adjacent to an upper surfac... | 08/02/2011 |
| 7973392 | Electronic device and method for manufacturing structure for electronic device An electronic device including a shielded electronic element, and a method for manufacturing a shielding structure. An oxide film is formed on the surface of a silicon substrate having a [100] face. Part of the oxide film is removed to form a first window region. Si... | 07/05/2011 |
| 7968978 | Microwave integrated circuit package and method for forming such package A method for packaging a semiconductor device. The method includes: providing a dielectric layer over the semiconductor device; determining patterns and placement of material on the dielectric layer to provide a predetermined magnetic or electric effect for the devi... | 06/28/2011 |
| 7964936 | Electronic device package with electromagnetic compatibility (EMC) coating thereon Electronic device packages with electromagnetic compatibility (EMC) coating thereon are presented. An electronic device package includes a chip scale package having a CMOS image sensor (CIS) array chip and a set of lenses configured with an aperture. An encapsulatio... | 06/21/2011 |
| 7964937 | Multilayer dielectric substrate and semiconductor package A multilayer dielectric substrate that mounts a semiconductor device in a cavity formed on a substrate. The multilayer dielectric substrate includes an opening formed in a surface-layer grounding conductor on the substrate in the cavity, and an impedance transformer... | 06/21/2011 |
