Class 257/651 - Details of insulating layer electrical charge (e.g., negative insulator layer charge)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the electrical charge characteristics
No. of patents: 48
Last issue date: 02/05/2008

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Number	Title	Issue Date
7327019	Semiconductor device of a charge storage type According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. ...	02/05/2008
7211878	Semiconductor nonvolatile memory, method of recording data in the semiconductor nonvolatile memory and method of reading data from the semiconductor nonvolatile memory A memory cell structure and control of the memory operation are simplified, and the cost of production is decreased, by way of a semiconductor nonvolatile memory having a transistor including a gate electrode provided on a p-type semiconductor substrate via a gate i...	05/01/2007
7202137	Process for producing an integrated electronic circuit comprising superposed components and integrated electronic circuit thus obtained A process for producing an integrated electronic circuit. The process begins with the production of a first electronic component and a second electronic component that are superposed on top of a substrate. A volume of temporary material is formed on the substrate at...	04/10/2007
7087969	Complementary field effect transistor and its manufacturing method A complementary field effect transistor comprises: a semiconductor substrate; an n-type field effect transistor provided on the semiconductor substrate; and a p-type field effect transistor provided on the semiconductor substrate. The n-type field effect transistor ...	08/08/2006
6960834	Semiconductor device having multi-layer interconnection structure and method of manufacturing the same A semiconductor device includes a foundation having a first conductive region, and an inter-connection layer provided separate from the foundation. A first region occupying a range from the foundation to the interconnection layer is filled with gas or provided with ...	11/01/2005
6956262	Charge trapping pull up element A charge trapping semiconductor device is particularly suited as a replacement for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The device includes a charge trapping layer formed at or extremely near to an inte...	10/18/2005
6911378	Stabilization of fluorine-containing dielectric materials in a metal insulator wiring structure A process for providing regions of substantially lower fluorine content in a fluorine-containing dielectric comprises exposing the fluorine-containing dielectric to a reactive species to form volatile byproducts. ...	06/28/2005
6888204	Semiconductor devices, and methods for same Described are preferred processes for conditioning semiconductor devices with deuterium to improve operating characteristics and decrease depassivation which occurs during the course of device operation. Also described are semiconductor devices which can be prepared...	05/03/2005
6737734	Structure and method for securing bussing leads A hybrid lead frame having leads for conventional lead-to-I/O wire bonding, and leads for power and ground bussing that extend over a surface of the semiconductor die are provided where the leads for bussing are held in place by lead-lock tape to prevent bending and...	05/18/2004
6727515	Insulation film forming material, insulation film, method for forming the insulation film, and semiconductor device Porous insulation films 28, 40, 50 are formed of an insulation forming material including a silicon compound having a skeleton containing C—C bonds, a pore forming compound which is decomposed or evaporated by a heat treatment, and a solvent which dissolves...	04/27/2004
6593615	Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD Substrate bombardment during HDP deposition of carbon-doped silicon oxide film results in filling the gaps between metal lines with carbon-doped low k dielectric material. This leads to the placement of low k dielectric between the narrow metal lines whil...	07/15/2003
6462394	Device configured to avoid threshold voltage shift in a dielectric film A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separate...	10/08/2002
6396122	Method for fabricating on-chip inductors and related structure According to various disclosed embodiments, a conductor is patterned in a dielectric. The conductor can be patterned, for example, in the shape of a square spiral. The conductor can comprise, for example, copper, aluminum, or copper-aluminum alloy. The di...	05/28/2002
6391805	High-pressure anneal process for integrated circuits This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of ...	05/21/2002
6232643	Memory using insulator traps A memory cell provides point defect trap sites in an insulator for storing data charges. Single electrons are stored on respective point defect trap sites and a resulting parameter, such as transistor drain current, is detected. By adjusting the density o...	05/15/2001
6211537	LED array A 1200 dpi LED may be manufactured without highly accurate mask alignment and provide good light radiation efficiency. A first interlayer dielectric is formed on a semiconductor substrate and has a plurality of first windows formed therein and aligned in ...	04/03/2001
6130172	Radiation hardened dielectric for EEPROM A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N...	10/10/2000
6117749	Modification of interfacial fields between dielectrics and semiconductors Reduction in the net charge at the interface of a dielectric and a semiconductor material is achieved by placing atomic species in the dielectric near the interface. Preferably, these species are selected from the group of alkaline earth metals. The prese...	09/12/2000
6091082	Electrostatic discharge protection for integrated circuit sensor passivation A structure and method for creating an integrated circuit passivation (24) comprising, a circuit (16), a dielectric (18), and metal plates (20) over which an insulating layer (26) is disposed that electrically and hermetically isolates the circuit (16), a...	07/18/2000
6060767	Semiconductor device having fluorine bearing sidewall spacers and method of manufacture thereof Fluorine bearing spacers on the sidewalls of gate electrodes of a semiconductor device are provided to suppress hot carrier injection in the semiconductor device. In accordance with one embodiment of the invention, a semiconductor device is formed by form...	05/09/2000
6023093	Deuterated direlectric and polysilicon film-based semiconductor devices and method of manufacture thereof A semiconductor device and a method of manufacturing the semiconductor device. The device includes: (1) a substrate composed at least in part of silicon and (2) a film located over the substrate and having a substantial concentration of an isotope of hydr...	02/08/2000
5965918	Semiconductor device including field effect transistor An insulating film having a low dielectric constant lower than that of silicon oxide is arranged between a silicon support layer and a silicon active layer. A channel region, source/drain regions, and a device isolation region are formed in the active lay...	10/12/1999
5936291	Thin film transistor and method for fabricating the same The thin film transistor of this invention is formed on a substrate and includes an active layer and a first insulating film and a second insulating film sandwiching the active layer, wherein the overall polarity of fixed charges contained in the first in...	08/10/1999
5808353	Radiation hardened dielectric for EEPROM A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N...	09/15/1998
5767548	Semiconductor component with embedded fixed charges to provide increased high breakdown voltage A semiconductor component with at least one lateral semiconductor structure with a high breakdown voltage including a substrate, a dielectric layer adjoining the substrate, a low-doped semiconductor zone disposed on the dielectric layer and heavily doped ...	06/16/1998
5629531	Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures A method of obtaining high quality passivation layers on silicon carbide surfaces by oxidizing a sacrificial layer of a silicon-containing material on a silicon carbide portion of a device structure to substantially consume the sacrificial layer to produc...	05/13/1997
5625208	Method for using a charge injection transistor A charge or carrier injection transistor including a substrate, a gate electrode and an electric potential barrier layer forming an electric potential barrier against charges (either holes or electrons) injected by the gate electrode towards the substrate...	04/29/1997
5578867	Passivation method and structure using hard ceramic materials or the like A method for passivating an integrated circuit includes the RF sputtering of a hard passivation layer on the surface of the integrated circuit. The hard passivation layer can be a ceramic material such as various doped and undoped titanates, zirconates, n...	11/26/1996
5523597	Electronic device achieving a reduction in alpha particle emissions from boron-based compounds essentially free of boron-10 Reduced soft errors in charge-sensitive circuit elements such as volatile memory cells 200 occur by using boron-11 to the exclusion of boron-10 or essentially free of boron-10 in borosilicate glass 230, 240 deposited on the substrate 206 directly over the...	06/04/1996
5449938	MOS-controlled power semiconductor component A power semiconductor component having integrated protection against electrostatic destruction is published. Such a semiconductor component (1) comprises a semiconductor substrate (10) having at least one MOS structure whose gate (7) is arranged insulated...	09/12/1995
5406116	Dopant implant for conductive charge leakage layer for use with voltage contrast A layer of dopant is implanted in the passivation of a semiconductor die to facilitate testing of the die by a scanning electron microscope voltage contrast system. The layer of dopant is capacitively coupled to circuits under the passivation and is coupl...	04/11/1995
5369300	Multilayer metallization for silicon semiconductor devices including a diffusion barrier formed of amorphous tungsten/silicon A semiconductor device aluminum-containing metallization system that is particularly useful for integrated circuits (ICs) having P-type contact regions and also having a likelihood of extended exposure to elevated temperatures. Use of an aluminum/silicon ...	11/29/1994
5336925	Positive working polyamic acid/imide photoresist compositions and their use as dielectrics Positive working polyamic acid photoresist compositions are disclosed having improved high resolution upon image development and exhibiting stable photosensitivity and superior dielectric performance. The compositions comprise polyamic acid condensation p...	08/09/1994
5321283	High frequency JFET The junction field effect transistors (JFETs) of this invention have improved breakdown voltage capability, reduced on-resistance and improved overdrive capability. The JFET on-resistance is decreased by ion-implanting an insulating layer covering a layer...	06/14/1994
5241214	Oxides and nitrides of metastabale group IV alloys and nitrides of Group IV elements and semiconductor devices formed thereof A process and resultant devices is described for forming MOSFET, CMOS and BICMOS devices of Group IV alloys, in particular Six Ge1-x wherein 0	08/31/1993
4994869	NMOS transistor having inversion layer source/drain contacts A transistor (42) is provided having a gate conductor (44) formed adjacent a semiconductor substrate (46) and separated therefrom by a gate insulator (48). Sidewall spacers (52, 54) are formed at the sides of gate conductor (44) and adjacent semiconductor...	02/19/1991
4868537	Doped SiO₂ resistor and method of forming same The concept of enhancing conduction through SiO2 by implanting ions of cesium (Cs) into the SiO2 is applied to the formation of a resistor in an integrated circuit. By implanting Cs ions into a layer of SiO2 in a controlle...	09/19/1989
4853760	Semiconductor device having insulating layer including polyimide film A semiconductor device has a passivation layer including a polyimide film. Argon ions are implanted in the polyimide film to convert it into an electrically stable insulating film....	08/01/1989
4837610	Insulation film for a semiconductor device A semiconductor device is provided having as an insulating oxide film a silicon oxide film containing a metal, such as iron or chromium, of an average concentration of 1×1016 atoms/cm3 to 1×1019 atoms/cm3 whic...	06/06/1989
4827324	Implantation of ions into an insulating layer to increase planar pn junction breakdown voltage A method for forming a PN junction having an enhanced breakdown voltage includes the step of forming a silicon dioxide or other insulating layer over the PN junction of the diode. The silicon dioxide layer is then implanted with ions. Depending on the spe...	05/02/1989

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Class 257/651 - Details of insulating layer electrical charge (e.g., negative insulator layer charge)