Class 257/645 - Insulating layer containing specified electrical charge (e.g., net negative electrical charge)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the multiple insulating layers, or
No. of patents: 56
Last issue date: 12/14/2010

«First «Previous1 2 Next»Last»

Number	Title	Issue Date
7851892	Semiconductor memory device and method for fabricating the same A semiconductor memory device has a substrate having a semiconductor layer, an n-type semiconductor region formed beneath a main surface of the semiconductor layer, a plurality of cell gates being aligned at a space from each other and including a gate insulating fi...	12/14/2010
7378328	Method of fabricating memory device utilizing carbon nanotubes A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high elect...	05/27/2008
7361608	Method and system for forming a feature in a high-k layer A method for plasma processing a high-k layer includes providing a substrate having a high-k layer formed thereon, on a substrate holder in a process chamber, and creating a plasma in the process chamber to thereby expose the high-k layer to the plasma. RF power is ...	04/22/2008
7332796	Devices and methods of preventing plasma charging damage in semiconductor devices Methods for protecting semiconductor devices from plasma charging damage are disclosed. An example disclosed method includes depositing an etching stop layer on a substrate with at least one predetermined structure; depositing a premetallic dielectric layer and a ch...	02/19/2008
7312182	Rare earth metal compounds for use in high critical temperature thin film super-conductors Rare earth metal containing compounds of the formula Sr2LuSbO6 and Sr2LaSbO6 have been prepared as high critical temperature thin film superconductor structures, and can be used in other ferroelectrics, pyroelectrics, piez...	12/25/2007
7282420	Method of manufacturing a flash memory device A method of manufacturing a flash memory device wherein a stacked structure of an oxide and nitride or the reverse is applied to insulation spacers provided on sidewalls of gates for forming source/drain regions. After completing the source/drain regions, spacers ar...	10/16/2007
7262489	Three-dimensionally formed circuit sheet, component and method for manufacturing the same A three-dimensionally formed circuit sheet comprises a resin film and a circuit pattern formed of an electrically conductive paste on the resin film. The electrically conductive paste contains, as a binder, a resin that is three-dimensionally formable. The resin fil...	08/28/2007
7244635	Semiconductor device and method of manufacturing the same There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad fo...	07/17/2007
7211878	Semiconductor nonvolatile memory, method of recording data in the semiconductor nonvolatile memory and method of reading data from the semiconductor nonvolatile memory A memory cell structure and control of the memory operation are simplified, and the cost of production is decreased, by way of a semiconductor nonvolatile memory having a transistor including a gate electrode provided on a p-type semiconductor substrate via a gate i...	05/01/2007
7196387	Memory cell with an asymmetrical area An asymmetric-area memory cell, and a fabrication method for forming an asymmetric-area memory cell, are provided. The method comprises: forming a bottom electrode having an area; forming a CMR memory film overlying the bottom electrode, having an asymmetric area; a...	03/27/2007
7151027	Method and device for reducing interface area of a memory device A method and device for reducing interface area of a memory device. A poly-2 layer is formed above a substrate at an interface between a memory array and a periphery of the memory device. The poly-2 layer is etched proximate to the memory array. The poly-2 layer is ...	12/19/2006
7151042	Method of improving flash memory performance A method of improving flash memory performance. The method includes: providing a substrate having a gate structure thereon, the gate structure having a gate dielectric layer, a first polysilicon layer, an interploy dielectric layer, and a second polysilicon layer; t...	12/19/2006
7091545	Memory device and fabrication method thereof A memory device and fabricating method thereof. In the memory device of the present invention, a substrate has a plurality of deep trenches, wherein the deep trenches formed in the adjacent rows are staggered. A deep trench capacitor and a control gate are disposed ...	08/15/2006
7087969	Complementary field effect transistor and its manufacturing method A complementary field effect transistor comprises: a semiconductor substrate; an n-type field effect transistor provided on the semiconductor substrate; and a p-type field effect transistor provided on the semiconductor substrate. The n-type field effect transistor ...	08/08/2006
7071538	One stack with steam oxide for charge retention A semiconductor device includes a substrate that further includes source, drain and channel regions. The device may further include a bottom oxide layer formed upon the substrate, a charge storage layer formed upon the bottom oxide layer, and a steam oxide layer the...	07/04/2006
7030468	Low k and ultra low k SiCOH dielectric films and methods to form the same Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water v...	04/18/2006
6956262	Charge trapping pull up element A charge trapping semiconductor device is particularly suited as a replacement for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The device includes a charge trapping layer formed at or extremely near to an inte...	10/18/2005
6921573	High-frequency current suppression body using magnetic loss material exhibiting outstanding complex permeability characteristics The present invention is a high-frequency current essentially of M—X—Y, where M is Fe, Co, and/or Ni, X is an element other than M or Y, and Y is F, N, and/or O. The maximum value μ″max of the loss factor μ″ of this material exists at 100 MHz to...	07/26/2005
6911378	Stabilization of fluorine-containing dielectric materials in a metal insulator wiring structure A process for providing regions of substantially lower fluorine content in a fluorine-containing dielectric comprises exposing the fluorine-containing dielectric to a reactive species to form volatile byproducts. ...	06/28/2005
6882031	Ammonia gas passivation on nitride encapsulated devices A passivation method includes disassociating ammonia so as to expose at least interfaces between silicon-containing and passivation structures to at least hydrogen species derived from the ammonia and forming an encapsulant layer that is positioned so as to substant...	04/19/2005
6849926	Low dielectric constant composite material containing nano magnetic particles, and optical and semiconductor devices using the low dielectric constant composite material A composite containing nano magnetic particles is provided. The composite includes nano magnetic particles in a dielectric matrix. The matrix is made of an inorganic material such as silica, alumina, or hydrosilsesquioxane, or an organic material such as polyimide, ...	02/01/2005
6794733	Increasing the susceptability of an integrated circuit to ionizing radiation In integrated circuit that yields the advantages of contemporary processing technologies and yet is irreparably damaged by ionizing radiation. An integrated circuit is designed and fabricated with contemporary processing technologies in well-known fashion, except th...	09/21/2004
6746945	Method of forming a via hole in a semiconductor device A material layer which contains nitrogen atoms is formed on a first wiring or at a side surface of a first wiring. When etching for forming a via hole is carried out, nitrogen atoms contained in the material layer bind with CF molecules, CF2 molecules, CF...	06/08/2004
6713390	Barrier layer deposition using HDP-CVD A method is provided for depositing a barrier layer on a substrate using a gaseous mixture that includes a hydrocarbon-containing gas and a silicon-containing gas. The gaseous mixture is provided to a process chamber and is used to form a plasma for depositing the b...	03/30/2004
6664612	Semiconductor component having double passivating layers formed of two passivating layers of different dielectric materials A semiconductor component with passivation includes at least two double passivating layers, of which an uppermost is applied to a planar surface of a layer located therebelow. The double passivating layers include two layers of different dielectric materi...	12/16/2003
6593615	Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD Substrate bombardment during HDP deposition of carbon-doped silicon oxide film results in filling the gaps between metal lines with carbon-doped low k dielectric material. This leads to the placement of low k dielectric between the narrow metal lines whil...	07/15/2003
6479862	Charge trapping device and method for implementing a transistor having a negative differential resistance mode A charge trapping structure for use with an n-channel metal-insulator-semiconductor field-effect transistor (MISFET) is disclosed. A dielectric layer is formed close to a channel region of the MISFET, and includes a number of trapping sites which are arra...	11/12/2002
6462394	Device configured to avoid threshold voltage shift in a dielectric film A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separate...	10/08/2002
6320246	Semiconductor wafer assemblies The invention includes a semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) alternating first and second layers over the semiconductor wafer substrate, the alternating layers comprising at least one first layer and at lea...	11/20/2001
6165915	Forming halogen doped glass dielectric layer with enhanced stability Within a method for forming a halogen doped glass layer, such as a fluorosilicate glass (FSG) layer, there is first provided a substrate. There is then formed over the substrate a first halogen doped glass layer. There is then formed upon the first haloge...	12/26/2000
6084246	A₄ MeSb₃ O₁₂ substrates and dielectric/buffer layers for growth of epitaxial HTSC/perovskite oxide films for use in HTSC/perovskite oxide devices and microwave device structures Compounds of the general formula A4 MeSb3 O12 wherein A is either barium (Ba) or strontium (Sr) and Me is an alkali metal ion selected from the group consisting of lithium (Li), sodium (Na) and potassium (K) have been prep...	07/04/2000
6060767	Semiconductor device having fluorine bearing sidewall spacers and method of manufacture thereof Fluorine bearing spacers on the sidewalls of gate electrodes of a semiconductor device are provided to suppress hot carrier injection in the semiconductor device. In accordance with one embodiment of the invention, a semiconductor device is formed by form...	05/09/2000
6020606	Structure of a memory cell A structure of a memory cell in a memory device is taking an interface between a silicon nitride layer and a oxide layer. The memory cell includes: a polysilicon layer on a substrate, a silicon nitride layer on the polysilicon layer, an oxide layer on the...	02/01/2000
5965918	Semiconductor device including field effect transistor An insulating film having a low dielectric constant lower than that of silicon oxide is arranged between a silicon support layer and a silicon active layer. A channel region, source/drain regions, and a device isolation region are formed in the active lay...	10/12/1999
5959329	Insulating oxide film formed by high-temperature wet oxidation The present invention provides an insulating film formed on a surface of a substrate and made of a material containing oxygen, wherein a charge correction is carried out at a 1s peak position of a carbon adsorbed on a surface of the insulating film, and r...	09/28/1999
5907182	Semiconductor device having element with high breakdown voltage A semiconductor device which contains an electrode or an interconnection subjected to a high voltage prevents current leakage due to polarization of a mold resin. In this semiconductor device, a glass coat film 13a covering a semiconductor element has an ...	05/25/1999
5864088	Electronic device having the electromagnetic interference suppressing body An electromagnetic interference suppressing body is provided for suppressing electromagnetic interference by undesirable electromagnetic waves. The body can have a conductive support element and a non-conductive soft magnetic layer provided on at least on...	01/26/1999
5767548	Semiconductor component with embedded fixed charges to provide increased high breakdown voltage A semiconductor component with at least one lateral semiconductor structure with a high breakdown voltage including a substrate, a dielectric layer adjoining the substrate, a low-doped semiconductor zone disposed on the dielectric layer and heavily doped ...	06/16/1998
5757064	Multlayer interconnection structure for semiconductor device A structure for a semiconductor device includes a plurality of memory cell areas, a multilayer interconnection structure including an interfacial insulating film and connecting the plurality of memory cell areas, the multilayer interconnection structure b...	05/26/1998
5731628	Semiconductor device having element with high breakdown voltage A semiconductor device which contains an electrode or an interconnection subjected to a high voltage prevents current leakage due to polarization of a mold resin. In this semiconductor device, a glass coat film 13a covering a semiconductor element has an ...	03/24/1998

«First «Previous1 2 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 257/645 - Insulating layer containing specified electrical charge (e.g., net negative electrical charge)