Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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| Number | Title | Issue Date |
| 7436076 | Micromechanical component having an anodically bonded cap and a manufacturing method A micromechanical component includes a cap wafer made up of at least a first silicon substrate and a thin glass substrate, and having a functional wafer made up of at least a second silicon substrate, at least one electrical contact surface being disposed on the fun... | 10/14/2008 |
| 7405466 | Method of fabricating microelectromechanical system structures A method of simultaneously bonding components, comprising the following steps. At least first, second and third components are provided and comprise: at least one glass component; and at least one conductive or semiconductive material component. The order of stackin... | 07/29/2008 |
| 7355269 | IC on non-semiconductor substrate An integrated circuit and method of fabrication including a non-semiconductor material substrate with a layer of single crystal rare earth deposited on the surface thereof. A layer of single crystal semiconductor material is grown on the layer of single crystal rare... | 04/08/2008 |
| 7298021 | Electronic device and method for manufacturing the same An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm−3 or less, carbon atoms at a concentration of 5Ã... | 11/20/2007 |
| 7291923 | Tapered signal lines In an integrated circuit, a layer including a plurality of conductive wires is described. A first wire, having sidewalls, is tapered from a proximal end which has a first width to a distal end which has a second width, to reduce width from the first width to the sec... | 11/06/2007 |
| 7273804 | Internally reinforced bond pads Disclosed is a reinforced bond pad structure having nonplanar dielectric structures and a metallic bond layer conformally formed over the nonplanar dielectric structures. The nonplanar dielectric structures are substantially reproduced in the metallic bond layer so ... | 09/25/2007 |
| 7273566 | Gas compositions Processes, etchants, and apparatus useful for etching an insulating oxide layer of a substrate without damaging underlying nitride features or field oxide regions. The processes exhibit good selectivity to both nitrides and field oxides. Integrated circuits produced... | 09/25/2007 |
| 7250670 | Semiconductor structure and fabricating method thereof A semiconductor structure is provided. The semiconductor structure is disposed on the scribe line of a wafer and is around the chip area of the wafer. The semiconductor structure includes a plurality of dielectric layers sequentially disposed on the scribe line and ... | 07/31/2007 |
| 7244644 | Undercut and residual spacer prevention for dual stressed layers Methods are disclosed for forming dual stressed layers in such a way that both undercutting and an undesirable residual spacer of the first-deposited stressed layer are prevented. In one embodiment, a method includes forming a first stressed silicon nitride layer ov... | 07/17/2007 |
| RE39690 | Enhanced planarization technique for an integrated circuit A method for planarizing integrated circuit topographies, wherein, after a first layer of spin-on glass is deposited, a layer of low-temperature oxide is deposited before a second layer of spin-on glass. ... | 06/12/2007 |
| 7226875 | Method for enhancing FSG film stability A method for enhancing stability of a fluorinated silicon glass layer is disclosed. A fluorinated silicon glass layer provided on a substrate is subjected to a phosphorous-containing and hydrogen-containing gas such as phosphine (PH3), for example. The ga... | 06/05/2007 |
| 7208836 | Integrated circuitry and a semiconductor processing method of forming a series of conductive lines A semiconductor processing method of forming a plurality of conductive lines includes, a) providing a substrate; b) providing a first conductive material layer over the substrate; c) providing a first insulating material layer over the first conductive layer; d) etc... | 04/24/2007 |
| 7187031 | Semiconductor device having a low dielectric constant film and manufacturing method thereof A semiconductor device has a structure that reduces the parasitic capacitance by using a film with a low relative dielectric constant as the side wall material of the gate. The material with a low relative dielectric constant is preferably a material whose relative ... | 03/06/2007 |
| 7180129 | Semiconductor device including insulating layer A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first ... | 02/20/2007 |
| 7173339 | Semiconductor device having a substrate an undoped silicon oxide structure and an overlaying doped silicon oxide structure with a sidewall terminating at the undoped silicon oxide structure An etchant including C2HxFy, where x is an integer from two to five, inclusive, where y is an integer from one to four, inclusive, and where x plus y equals six, etches doped silicon dioxide with selectivity over both undoped silicon... | 02/06/2007 |
| 7148134 | Integrated circuitry and a semiconductor processing method of forming a series of conductive lines A semiconductor processing method of forming a plurality of conductive lines includes, a) providing a substrate; b) providing a first conductive material layer over the substrate; c) providing a first insulating material layer over the first conductive layer; d) etc... | 12/12/2006 |
| 7145245 | Low-k dielectric film with good mechanical strength that varies in local porosity depending on location on substrate—therein The present invention discloses a method including providing a substrate; forming a dielectric over the substrate, the dielectric having a k value of about 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; forming... | 12/05/2006 |
| 7101744 | Method for forming self-aligned, dual silicon nitride liner for CMOS devices A method for forming a self-aligned, dual silicon nitride liner for CMOS devices includes forming a first type nitride layer over a first polarity type device and a second polarity type device, and forming a topographic layer over the first type nitride layer. Porti... | 09/05/2006 |
| 7075187 | Coating material over electrodes to support organic synthesis There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and ... | 07/11/2006 |
| 7030468 | Low k and ultra low k SiCOH dielectric films and methods to form the same Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water v... | 04/18/2006 |
| 6995392 | Test structure for locating electromigration voids in dual damascene interconnects A test structure is disclosed for locating electromigration voids in a semiconductor interconnect structure having an interconnect via interconnecting a lower metallization line with an upper metallization line. In an exemplary embodiment, the test structure include... | 02/07/2006 |
| 6979882 | Electronic device and method for manufacturing the same An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm−3 or less, carbon atoms at a concentration of 5Ã... | 12/27/2005 |
| 6967408 | Gate stack structure The present invention relates to gate stack structure that is fabricated by a process for selectively plasma etching a structure upon a semiconductor substrate to form a designated topographical structure thereon utilizing an undoped silicon dioxide layer as an etch... | 11/22/2005 |
| 6943429 | Wafer having alignment marks extending from a first to a second surface of the wafer A marked wafer includes a front-side surface and a back-side surface. A vertical scribe line and a horizontal scribe line are on the front-side surface of the wafer. A back-side alignment mark is located at an intersection of the vertical scribe line and the horizon... | 09/13/2005 |
| 6890786 | Wafer scale processing This invention relates to a method of fabricating a light modulation system having a semiconductor substrate. In one exemplary method, an optical layer is applied over a semiconductor substrate which includes a plurality of integrated circuits. Each of these integra... | 05/10/2005 |
| 6888224 | Methods and systems for fabricating electrical connections to semiconductor structures incorporating low-k dielectric materials Low-k dielectric materials have desirable insulating characteristics for use in insulating sub micron conductors in semiconductor devices. However, certain physical and material characteristics of the low-k dielectric materials make them difficult to work with. More... | 05/03/2005 |
| 6864562 | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insu... | 03/08/2005 |
| 6844628 | Electronic device and method for manufacturing the same An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm−3 or less, carbon atoms at a concentration of 5Ã... | 01/18/2005 |
| 6800928 | Porous integrated circuit dielectric with decreased surface porosity A surface treatment for porous silica to enhance adhesion of overlying layers. Treatments include surface group substitution, pore collapse, and gap filling layer (520) which invades open surface pores (514) of xerogel (510). ... | 10/05/2004 |
| 6791164 | Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages A stereolithographically fabricated package that surrounds at least a portion of a semiconductor die so as to substantially hermetically seal the same. The package may be fabricated from thermoplastic glass, other types of glass, ceramics, or metals. Stereolithograp... | 09/14/2004 |
| 6787886 | Semiconductor device and methods of fabricating the same A semiconductor device includes a semiconductor substrate which has a major surface and a MOS transistor which has a gate and first and second diffusion regions and which is formed on the major surface. The semiconductor device also includes a laminated structure of... | 09/07/2004 |
| 6774059 | High crack resistance nitride process A new method of creating a relatively thick layer of PE silicon nitride. A conventional method of creating a layer of silicon nitride applies a one-step process for the creation thereof. Film stress increases as the thickness of the created layer of PE silicon nitri... | 08/10/2004 |
| 6774461 | Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure The present invention provides a technique to reduce a stress of thick spin-on dielectric layer by forming a sandwich dielectric structure, wherein a first dielectric layer is formed on a substrate by spin coating, a liquid phase deposited (LPD) silica layer is form... | 08/10/2004 |
| 6746969 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device comprises preparing a substrate to be treated, and forming an insulation film above the substrate, which includes applying an insulation film raw material above the substrate, the insulation film raw material includin... | 06/08/2004 |
| 6730619 | Method of manufacturing insulating layer and semiconductor device including insulating layer A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first ... | 05/04/2004 |
| 6713235 | Method for fabricating thin-film substrate and thin-film substrate fabricated by the method Supports (3) are formed to be arrayed on a support base (1), a sacrifice layer (15) is formed of a resin material, and the sacrifice layer (15) is planarized so as to expose the top of the respective supports (3), thereby forming a... | 03/30/2004 |
| 6707134 | Semiconductor structure having an improved pre-metal dielectric stack and method for forming the same A semiconductor structure includes a substrate, a dielectric layer disposed on the substrate, a layer of undoped silicate glass disposed on the dielectric layer, a layer of borophosphorous silicate glass on the layer of undoped silicate glass, and a planar dielectri... | 03/16/2004 |
| 6664071 | Photodetector and the use of the same A device for the detection of electromagnetic radiation, wherein the device has (i) a photoactive layer of a semiconductor having a band gap of greater than 2.5 eV, (ii) a dye applied to the semiconductor, and (iii) a charge transport layer compris... | 12/16/2003 |
| 6650002 | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the inte... | 11/18/2003 |
| 6621154 | Semiconductor apparatus having stress cushioning layer A miniature semiconductor apparatus is outstanding in reflow resistance, temperature cycle property, and PCT resistance corresponding to high density packing, high densification, and speeding up of processing. The semiconductor apparatus has at least one ... | 09/16/2003 |
