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Thomas Edison ; 1889
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| Number | Title | Issue Date |
| 8129823 | Materials, structures and methods for microelectronic packaging Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the gla... | 03/06/2012 |
| 7902642 | Resin composition for sealing light-emitting device and lamp A resin composition for sealing a light-emitting device of the present invention includes a silsesquioxane resin including two or more oxetanyl groups, an aliphatic hydrocarbon including one or more epoxy groups and a cationic polymerization initiator. Furthermore, ... | 03/08/2011 |
| 7800203 | Method of reducing the surface roughness of spin coated polymer films According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer ... | 09/21/2010 |
| 7514764 | Materials and methods for creating imaging layers The present invention provides patterned features of dimensions of less than 50 nm on a substrate. According to various embodiments, the features may be “Manhattan” style structures, have high aspect ratios, and/or have atomically smooth surfaces. The patterned ... | 04/07/2009 |
| 7427813 | Structure, material, and design for assembling a low-K Si die to achieve an industrial grade reliability wire bonding package Provided are semiconductor low-K Si die wire bonding packages with package stress control and fabrication methods for such packages. The packages include molding interface material applied onto the low-K Si die. In general, the molding interface material is selectiv... | 09/23/2008 |
| 7410915 | Method of forming carbon polymer film using plasma CVD A method of forming a hydrocarbon-containing polymer film on a semiconductor substrate by a capacitively-coupled plasma CVD apparatus. The method includes the steps of: vaporizing a hydrocarbon-containing liquid monomer (CαHβXγ, w... | 08/12/2008 |
| 7382042 | COF flexible printed wiring board and method of producing the wiring board The present invention provides a COF flexible printed wiring board whose insulating layer is not melt-adhered to a heating tool, and which exhibits no drop in bonding strength during panel bonding carried out after mounting of semiconductor chips, whereby reliabilit... | 06/03/2008 |
| 7378682 | Memory element using active layer of blended materials The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive laye... | 05/27/2008 |
| 7365414 | Component packaging apparatus, systems, and methods Dielectric materials comprising release agents are described. Also described are a process for improving the proccessability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved s... | 04/29/2008 |
| 7348599 | Semiconductor device and manufacturing method thereof A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at l... | 03/25/2008 |
| 7333160 | Display device including resin film An electronic device having an active matrix liquid crystal device comprising a sealing layer with a region overlapping an insulating film formed over another insulating film, which extends beyond said insulating film and forms on a peripheral switching device, a re... | 02/19/2008 |
| 7327022 | Assembly, contact and coupling interconnection for optoelectronics A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active components. This platform provides optical coupling and chip-to-chip ... | 02/05/2008 |
| 7307338 | Three dimensional polymer memory cell systems Systems and methodologies are provided for forming three dimensional memory structures that are fabricated from blocks of individual polymer memory cells stacked on top of each other. Such a polymer memory structure can be formed on top of control component circuitr... | 12/11/2007 |
| 7301190 | Structures and methods to enhance copper metallization Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary structure includes an inhibiting layer between an insulator and a meta... | 11/27/2007 |
| 7298021 | Electronic device and method for manufacturing the same An electronic device is provided using wiring comprising aluminum to prevent hillock or whisker from generating, wherein the wiring contains oxygen atoms at a concentration of 8×1018 atoms·cm−3 or less, carbon atoms at a concentration of 5... | 11/20/2007 |
| 7285196 | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at smaller dimensions than aluminum. However, use of copper typically requir... | 10/23/2007 |
| 7279778 | Semiconductor package having a high-speed signal input/output terminal A semiconductor package including a flexible tape having a mounting portion and an extended portion, a plurality of arrayed connection electrodes provided on the mounting portion of the flexible tape, and a semiconductor chip mounted on the mounting portion of the f... | 10/09/2007 |
| 7268008 | Method for manufacturing pressure sensor A method for manufacturing a pressure sensor includes the steps of: preparing a semiconductor substrate; forming an insulation film on the substrate; forming a first metal film on the insulation film; forming a first protection film on the first metal film and the i... | 09/11/2007 |
| 7262436 | III-nitride semiconductor light emitting device having a silver p-contact A light emitting device includes an n-type semiconductor layer, an active layer for generating light, the active layer being in electrical contact with the n-type semiconductor layer. A p-type semiconductor layer is in electrical contact with the active layer, and a... | 08/28/2007 |
| 7262505 | Selective electroless-plated copper metallization Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including depositing a thin film seed layer of Palladium (Pd) or Copper (Cu) on... | 08/28/2007 |
| 7262489 | Three-dimensionally formed circuit sheet, component and method for manufacturing the same A three-dimensionally formed circuit sheet comprises a resin film and a circuit pattern formed of an electrically conductive paste on the resin film. The electrically conductive paste contains, as a binder, a resin that is three-dimensionally formable. The resin fil... | 08/28/2007 |
| 7262130 | Methods for making integrated-circuit wiring from copper, silver, gold, and other metals Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or interconnected, together with aluminum wires. In recent years, researchers have... | 08/28/2007 |
| 7253441 | Method of manufacturing thin film transistor The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a s... | 08/07/2007 |
| 7253521 | Methods for making integrated-circuit wiring from copper, silver, gold, and other metals Integrated circuits include networks of electrical components that are typically wired, or interconnected, together with aluminum wires. In recent years, researchers have begun using copper in combination with diffusion barriers, rather than aluminum, to form the wi... | 08/07/2007 |
| 7244635 | Semiconductor device and method of manufacturing the same There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad fo... | 07/17/2007 |
| 7239030 | Flexible wiring board for tape carrier package having improved flame resistance A flexible wiring board for tape carrier package having improved flame resistance is disclosed. The flexible wiring board has an insulating film having a bending slit, a wiring pattern formed thereon and crossing the bending slit, an adhesive layer adhering the wiri... | 07/03/2007 |
| 7220665 | H plasma treatment Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a substrate, forming a core conductive layer on the first conductive layer, subjecting the core conductive l... | 05/22/2007 |
| 7217992 | Semiconductor device, semiconductor wafer, semiconductor module, and a method of manufacturing semiconductor device Semiconductor devices,-semiconductor wafers, and semiconductor modules are provided: wherein the semiconductor device has a small warp; damages at chip edge and cracks in a dropping test are scarcely generated; and the semiconductor device is superior in mounting re... | 05/15/2007 |
| 7208804 | Crystalline or amorphous medium-K gate oxides, Y0and Gd0 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset of 2 eV or greater. Gate oxi... | 04/24/2007 |
| 7208762 | Semiconductor device and manufacturing method thereof A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at l... | 04/24/2007 |
| 7205620 | Highly reliable amorphous high-k gate dielectric ZrON A gate dielectric and method of fabricating a gate dielectric that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Gate dielectrics formed from metals such as zirconium are thermodynamically... | 04/17/2007 |
| 7205565 | Thin film transistor and OLED including the same A thin film transistor and a method of manufacturing the same are disclosed. More specifically, there is provided a thin film transistor having a thin film transistor and a method of manufacturing the same wherein an inorganic layer and an organic planarization laye... | 04/17/2007 |
| 7202551 | Display device having underlying insulating film and insulating films A resin material having low dielectric constant is used as an inter-layer insulating film and its bottom surface is contacted with a silicon oxide film across the whole surface thereof. Thereby, the surface may be flattened and capacity produced between a thin film ... | 04/10/2007 |
| 7202495 | Organic semiconductor element, production method therefor and organic semiconductor device An organic semiconductor element is provided which has the controlled crystalline state of a vapor-deposited pentacene layer and a high mobility with low voltage driving. The organic semiconductor element is formed by providing a gate electrode 101 on the sur... | 04/10/2007 |
| 7199450 | Materials and method to seal vias in silicon substrates Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to admi... | 04/03/2007 |
| 7190422 | Electro-optical device and electronic apparatus An electro-optical device includes, on a TFT array substrate, a data line, a scanning line, a switching element, and a pixel electrode and the like, the substrate having an image display region defined as a region to form the pixel electrode and the switching elemen... | 03/13/2007 |
| 7157788 | Metal oxide dispersion for dye-sensitized solar cells, photoactive electrode and dye-sensitized solar cell (1) A metal oxide dispersion for a dye-sensitized solar cell, which contains metal oxide fine particles, a binder composed of a polymer compound having an action to bind to the fine particles and a solvent; (2) a method for producing a photoactive electrode for a dy... | 01/02/2007 |
| 7147530 | Electroluminescence display device and method of manufacturing the same An object of the present invention is to provide an EL display device, which has a high operating performance and reliability. A third passivation film 45 is disposed so as to be in contact with an EL element 203 which comprises a pixel electrode (anod... | 12/12/2006 |
| 7145221 | Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combinatio... | 12/05/2006 |
| 7132736 | Devices having compliant wafer-level packages with pillars and methods of fabrication Devices and methods of fabrication thereof are disclosed. A representative device includes a complaint wafer-level package having one or more lead packages. A representative lead package includes a substrate having a plurality of die pads disposed thereon and a plur... | 11/07/2006 |