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| Number | Title | Issue Date |
| 8178951 | Compound semiconductor substrate and control for electrical property thereof There is provided a compound semiconductor substrate prepared by forming a point defect in an inside structure thereof by implanting an electrically-neutral impurity with energy of 0.1 to 10 MeV on a surface of the substrate. When the compound semiconductor is undop... | 05/15/2012 |
| 7619301 | GaAs semiconductor substrate and fabrication method thereof A GaAs semiconductor substrate includes a surface layer. When an atomic ratio is to be calculated using a 3d electron spectrum of Ga atoms and As atoms measured at the condition of 10° for the photoelectron take-off angle θ by X-ray photoelectron spectroscopy, the... | 11/17/2009 |
| 7442628 | Semiconductor laser manufacturing method A method for manufacturing a semiconductor laser. As a preparative step for coating an end face of a resonator with a dielectric film, a cleavage plane of a semiconductor laminated structure that is to be the end face is subjected to a plasma cleaning to prevent a c... | 10/28/2008 |
| 7358179 | Method of manufacturing semiconductor device including air space formed around gate electrode After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose upper surfaces of source electrodes. Next, a metal interconnect line ... | 04/15/2008 |
| 7315045 | Sapphire/gallium nitride laminate having reduced bending deformation The present invention relates to a sapphire/gallium nitride laminate, wherein a curvature radius thereof is positioned on the right side of a first curve plotted from the following functional formula (I): Y=Y0+A·e−(x−1)/T... | 01/01/2008 |
| 7291874 | Laser dicing apparatus for a gallium arsenide wafer and method thereof The present invention discloses a laser dicing apparatus for a gallium arsenide wafer and a method thereof, wherein firstly, a gallium arsenide wafer is stuck onto a holding film; next, the gallium arsenide wafer together with the holding film is disposed on a worki... | 11/06/2007 |
| 7251264 | Distributed bragg reflector for optoelectronic device This disclosure concerns devices such as DBRs, one example of which includes at least one first mirror layers having an oxidized region extending from an edge of the DBR to an oxide termination edge that is situated greater than a first distance from the edge of the... | 07/31/2007 |
| 7212088 | Electrical connecting element and a method of making such an element An electrical connecting element (1) comprises a dielectric substrate (2) on which a plurality of coplanar and substantially parallel conductor paths (3, 4, 5; 11, 12 13; 23, 24, 25, 26, 27) is arranged. At least one of these conductor paths con... | 05/01/2007 |
| 7192851 | Semiconductor laser manufacturing method A method for manufacturing a semiconductor laser. As a preparative step for coating an end face of a resonator with a dielectric film, a cleavage plane of a semiconductor laminated structure that is to be the end face is subjected to a plasma cleaning to prevent a c... | 03/20/2007 |
| 7187058 | Semiconductor component having a pn junction and a passivation layer applied on a surface The invention relates to a semiconductor component having a semiconductor body (100) and at least one pn junction present in the semiconductor body (100) and an amorphous passivation layer (70) arranged at least in sections on a surface (101 | 03/06/2007 |
| 7109530 | Nitride-based semiconductor element A nitride-based semiconductor element having excellent element characteristics is obtained by fabricating a nitride-based semiconductor layer having excellent crystallinity without performing extended etching. The nitride-based semiconductor element comprises a mask... | 09/19/2006 |
| 7030462 | Heterojunction bipolar transistor having specified lattice constants A Heterojunction Bipolar Transistor, HBT, (100) containing a collector layer (104), a base layer (105) and an emitter layer (106) is constructed such that the collector layer (104), the base layer (105) and the emitter layer... | 04/18/2006 |
| 6995821 | Methods of reducing unbalanced DC voltage between two electrodes of reflective liquid crystal display by thin film passivation A structure (and method) for a reflective-type liquid crystal display includes a first-type electrode, a second-type electrode positioned opposite the first-type electrode and being of an opposite type than the first-type electrode and a liquid crystal material betw... | 02/07/2006 |
| 6965626 | Single mode VCSEL A VCSEL having a metallic heat spreading layer adjacent a semiconductor buffer layer containing an insulating structure. The heat spreading layer includes an opening that enables light emitted by an active region to reflect from a distributed Bragg reflector (DBR) t... | 11/15/2005 |
| 6963090 | Enhancement mode metal-oxide-semiconductor field effect transistor An implant-free enhancement mode metal-oxide semiconductor field effect transistor (EMOSFET) is provided. The EMOSFET has a III-V compound semiconductor substrate and an epitaxial layer structure overlying the III-V compound semiconductor substrate. The epitaxial ma... | 11/08/2005 |
| 6906350 | Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a delta doped silicon carbide MESFET having a source, a drain and a gate. The gate is situated between the source and the drain... | 06/14/2005 |
| 6841409 | Group III-V compound semiconductor and group III-V compound semiconductor device using the same An AlGaInP layer is formed on a substrate made of GaAs, and an AlGaAs layer is formed on the AlGaInP layer via a buffer layer therebetween. The buffer layer has a thickness of about 1.1 nm and is made of AlGaInP whose Ga content is smaller than that of the AlGaInP l... | 01/11/2005 |
| 6797991 | Nitride semiconductor device The nitride semiconductor device includes: a substrate made of a III-V group compound semiconductor containing nitride; and a function region made of a III-V group compound semiconductor layer containing nitride formed on a main surface of the substrate. The main su... | 09/28/2004 |
| 6759139 | Nitride-based semiconductor element and method of forming nitride-based semiconductor A nitride-based semiconductor element enabling formation of a nitride-based semiconductor layer having low dislocation density, consisting of a material different from that of an underlayer, on the underlayer with a small thickness is obtained. This nitride-based se... | 07/06/2004 |
| 6756611 | Nitride semiconductor growth method, nitride semiconductor substrate, and nitride semiconductor device A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having ... | 06/29/2004 |
| 6727559 | Compound semiconductor device A local oscillation FET has a source connecting pad, a drain connecting pad and a gate connecting pad. The source connecting pad occupies one corner of a substrate, and the drain and gate connecting pads are placed at the neighboring corners so that the three connec... | 04/27/2004 |
| 6713845 | Nitride-based semiconductor element A nitride-based semiconductor element having excellent element characteristics is obtained by obtaining a nitride-based semiconductor layer having excellent crystallinity without performing a long-time etching process. This nitride-based semiconductor element compri... | 03/30/2004 |
| 6653663 | Nitride semiconductor device The nitride semiconductor device includes: a substrate made of a III-V group compound semiconductor containing nitride; and a function region made of a III-V group compound semiconductor layer containing nitride formed on a main surface of the substrate. ... | 11/25/2003 |
| 6653660 | Vertical cavity-type semiconductor light-emitting device and optical module using vertical cavity-type semiconductor light-emitting device A vertical cavity-type semiconductor light-emitting device comprises a first semiconductor distributed Bragg reflector type mirror formed on a substrate, a first semiconductor layer formed on the first semiconductor distributed Bragg reflector type mirror... | 11/25/2003 |
| 6573528 | Detector diode with internal calibration structure This patent is generally directed towards a method and device for providing a diode structure that has a barrier height that may be readily engineered with a series resistance that may be independently varied while simultaneously providing for the complet... | 06/03/2003 |
| 6504185 | Compound semiconductor device and method for controlling characteristics of the same A compound semiconductor device is formed having a plurality of FETs exhibiting the same electrode ratio of a difference between a surface area of the active region and the combined overlapping surface area of the source and drain ohmic electrodes to the ... | 01/07/2003 |
| 6469389 | Contact plug Within an integrated circuit, a contact plug with a height not extending above the level of the gate/wordline nitride is nonetheless provided with a relatively large contact area or landing pad, significantly larger than the source/drain region to which t... | 10/22/2002 |
| 6429471 | Compound semiconductor field effect transistor and method for the fabrication thereof Disclosed is a compound semiconductor field effect transistor. The compound semiconductor field effect transistor has a charge absorption layer and a semiconductor laminated structure. The charge absorption layer includes a compound semiconductor layer of... | 08/06/2002 |
| 6335562 | Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds Single event upset failure are suppressed in GaAs-based electronics by implanting the GaAs substrate with an appropriate dose of O and at least one of either Al, Cr, or In.... | 01/01/2002 |
| 6252262 | Metal passivating layer for III-V semiconductors, and improved gate contact for III-V-based metal-insulator-semiconductor (MIS) devices A passivating layer is provided for a III-V semiconductor. The passivating layer is preferably made of Fe and is used with III-V (especially GaAs) devices. At least one full monolayer of the passivating layer is formed, so that one full monolayer of the p... | 06/26/2001 |
| 6232623 | Semiconductor device on a sapphire substrate To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown ... | 05/15/2001 |
| 6144050 | Electronic devices with strontium barrier film and process for making same A semiconductor device having a barrier film comprising an extremely thin film formed of one or more monolayers each comprised of a two-dimensional array of metal atoms. In one exemplary aspect, the barrier film is used for preventing the diffusion of ato... | 11/07/2000 |
| 6015979 | Nitride-based semiconductor element and method for manufacturing the same Nitride-based semiconductor element comprises a first layer, a mask formed on the first layer and has a plurality of opening portions, a nitride-based compound semiconductor layer formed on the mask, the nitride-based compound semiconductor layer includin... | 01/18/2000 |
| 6008525 | Minority carrier device comprising a passivating layer including a Group 13 element and a chalcogenide component A minority carrier device includes at least one junction of at least two dissimilar materials, at least one of which is a semiconductor, and a passivating layer on at least one surface of the device. The passivating layer includes a Group 13 element and a... | 12/28/1999 |
| 5965935 | Low loss ridged microstrip line for monolithic microwave integrated circuit (MMIC) applications A microstrip line device is disclosed of the type which typically includes a strip conductor disposed on the top of a substrate. The device further includes a layer of dielectric material disposed between the strip conductor and the substrate for reducing... | 10/12/1999 |
| 5949095 | Enhancement type MESFET A carrier transfer layer of compound semiconductor material is disposed on or over a support substrate, and a gate electrode of conductive material is disposed on or over the carrier transfer layer at a partial region thereof. A cap layer of non-doped com... | 09/07/1999 |
| 5945718 | Self-aligned metal-oxide-compound semiconductor device and method of fabrication A self-aligned enhancement mode metal-oxide-compound semiconductor FET (10) includes a stoichiometric Ga2 O3 gate oxide layer (14) positioned on upper surface (16) of a compound semiconductor wafer structure (13). The stoichiometric ... | 08/31/1999 |
| 5942792 | Compound semiconductor device having a multilayer silicon structure between an active region and insulator layer for reducing surface state density at interface A multi-layer structure inserted onto an interface between a compound semiconductor region and a highly resistive material region includes an epitaxial silicon layer up to 1.5 nm thick in contact with the compound semiconductor region and an amorphous sil... | 08/24/1999 |
| 5930611 | Method for fabricating MIS device having GATE insulator of GaS or gallium sulfide A semiconductor device is fabricated by the step of forming a gate insulation film of a GaS film on a compound semiconductor layer; the step of forming an inter-layer insulation film on the gate insulation film; the step of etching the inter-layer insulat... | 07/27/1999 |
| 5903037 | GaAs-based MOSFET, and method of making same It has been found that a Ga-oxide-containing layer is substantially not etched in HF solution if the layer is a Ga-Gd-oxide with Gd:Ga atomic ratio of more than about 1:7.5, preferably more than 1:4 or even 1:2. This facilitates removal of a protective di... | 05/11/1999 |
