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| Number | Title | Issue Date |
| 8013340 | Semiconductor device with semiconductor body and method for the production of a semiconductor device A semiconductor device includes a semiconductor body with a front-sided surface. An active cell region with a semiconductor device structure and an edge region surrounding the active cell region are arranged in the semiconductor body. The front-sided surface of the ... | 09/06/2011 |
| 7994508 | Thin film transistors using thin film semiconductor materials The present invention generally comprises TFTs having semiconductor material comprising oxygen, nitrogen, and one or more element selected from the group consisting of zinc, tin, gallium, cadmium, and indium as the active channel. The semiconductor material may be u... | 08/09/2011 |
| 7427779 | Microstructure for formation of a silicon and germanium on insulator substrate of Si1-XGeX type The microstructure is designed for formation of a silicon and germanium on insulator substrate of Si1-XfGeXf type, with Xf comprised between a first value that is not zero and 1. The microstructure is formed by stacking of a silicon on insulato... | 09/23/2008 |
| 7423283 | Strain-silicon CMOS using etch-stop layer and method of manufacture Recesses are formed in the drain and source regions of an MOS transistor. An ohmic contact layer is formed in the recesses, and a stressed silicon-nitride layer is formed over the ohmic contact layer. The recesses allow the stressed silicon nitride layer to provide ... | 09/09/2008 |
| 7417248 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/26/2008 |
| 7361420 | Structure, magnetic recording medium, and method of producing the same To provide a filmy structure of a nanometer size having a phase-separated structure effective for the case where a compound can be formed between two kinds of materials. A structure constituted by a first member containing a compound between an element A except both... | 04/22/2008 |
| 7348598 | Thin film transistor and liquid crystal display device using the same A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT includes a gate electrode for... | 03/25/2008 |
| 7341883 | Silicon germanium semiconductive alloy and method of fabricating same A silicon germanium (SiGe) semiconductive alloy is grown on a substrate of single crystalline Al2O3. A {111} crystal plane of a cubic diamond structure SiGe is grown on the substrate's {0001} C-plane such that a orientation of the cubic d... | 03/11/2008 |
| 7339188 | Polycrystalline silicon film containing Ni The present invention is related to a polycrystalline silicon film containing Ni which is formed by crystallizing an amorphous silicon layer containing nickel. The present invention includes a polycrystalline silicon film wherein the polycrystalline film contains Ni... | 03/04/2008 |
| 7335917 | Thin film transistor using a metal induced crystallization process and method for fabricating the same and active matrix flat panel display using the thin film transistor Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystall... | 02/26/2008 |
| 7323368 | Method for manufacturing semiconductor device and heat treatment method It is an object of the present invention to apply a technique for removing the adverse effect of a substrate shrinkage due to a heat treatment, and further forming a fine and high-quality insulating film, and a semiconductor device that can realize high-performance ... | 01/29/2008 |
| 7320918 | Method and structure for buried circuits and devices A method and structure for fabricating an electronic device using an SOI technique that results in formation of a buried oxide layer. The method includes fabricating at least one first component of the electronic device and fabricating at least one second component ... | 01/22/2008 |
| 7303949 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture A semiconductor device and method of manufacturing a semiconductor device. The semiconductor device includes channels for a pFET and an nFET. A SiGe layer is selectively grown in the source and drain regions of the pFET channel and a Si:C layer is selectively grown ... | 12/04/2007 |
| 7297977 | Semiconductor device One exemplary embodiment includes a semiconductor device. The semiconductor device comprising a channel including one or more of a metal oxide including zinc-gallium, cadmium-gallium, cadmium-indium. ... | 11/20/2007 |
| 7288787 | Thin-film transistor, method for manufacturing thin-film transistor, and display using thin-film transistors The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a sou... | 10/30/2007 |
| 7274055 | Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the sour... | 09/25/2007 |
| 7262428 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 08/28/2007 |
| 7259387 | Nonvolatile semiconductor memory device A nonvolatile memory element is formed by layering a lower electrode, a variable resistor and an upper electrode in sequence. The variable resistor is formed in which crystallinity and amorphism are mixed. Thus, the nonvolatile memory element is formed. More prefera... | 08/21/2007 |
| 7259427 | Semiconductor device and method of manufacturing the same The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode ... | 08/21/2007 |
| 7247357 | Image display device The image display device has a display section formed of plural pixels and a control section which controls the display section, and is provided with nonvolatile phase-change type pixel memories in respective ones of the pixels, or is provided with a nonvolatile pha... | 07/24/2007 |
| 7211458 | Methods of fabricating strained semiconductor-on-insulator field-effect transistors and related devices A method of fabricating a semiconductor device includes forming a strained first semiconductor layer on an insulating layer that is between second semiconductor layers. The strained first semiconductor layer may be epitaxially grown from the second semiconductor lay... | 05/01/2007 |
| 7205586 | Semiconductor device having SiGe channel region A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HDTMOS includ... | 04/17/2007 |
| 7196400 | Semiconductor device with enhanced orientation ratio and method of manufacturing same An object is to enhance the orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film while using as a substrate a less-heat-resistive material such as glass thereby providing a semiconductor device using a cryst... | 03/27/2007 |
| 7176481 | In situ doped embedded sige extension and source/drain for enhanced PFET performance Disclosed is an integrated circuit structure and a method of making such a structure that has a substrate and P-type and N-type transistors on the substrate. The N-type transistor extension and source/drain regions comprise dopants implanted into the substrate. The ... | 02/13/2007 |
| 7176504 | SiGe MOSFET with an erosion preventing SiGelayer A semiconductor device is provided. The semiconductor device comprises a substrate, a gate structure, a spacer, a SixGey layer and a SixGey protection layer. The gate structure is deposited on the substrate and the spacer ... | 02/13/2007 |
| 7173274 | Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe bas... | 02/06/2007 |
| 7157349 | Method of manufacturing a semiconductor device with field isolation regions consisting of grooves filled with isolation material A method of manufacturing a semiconductor device comprising a silicon body (1) having a surface (4) provided with field isolation regions (2) enclosing active regions (3). In this method, on the surface of the silicon body there is formed... | 01/02/2007 |
| 7145175 | Semiconductor circuit and method of fabricating the same According to the invention, a plurality of semiconductor devices which are required to have conformance are formed from crystalline semiconductor films having uniform crystallinity on the same line, and a semiconductor circuit in which variation between semiconducto... | 12/05/2006 |
| 7141879 | Semiconductor device There is described an improved semiconductor device of chip-scale package (CSP) comprising posts provided on respective electrode pads of a semiconductor chip, and solder balls which are provided on the respective posts as external terminals after the semiconductor ... | 11/28/2006 |
| 7119369 | FET having epitaxial silicon growth A field-effect transistor has a channel region in a bulk semiconductor substrate, a first source/drain region on a first side of the channel region, a second source/drain region on a second side of the channel region, and an extension of epitaxial monocrystalline ma... | 10/10/2006 |
| 7112836 | Method of forming a chalcogenide memory cell having a horizontal electrode and a memory cell produced by the method A horizontal electrode having a small cross-section makes electrical contact with a chalcogenide memory element. The dimensions of the cross-section are controlled by conventional deposit/etch semiconductor processing steps. The resulting memory element can be drive... | 09/26/2006 |
| 7094671 | Transistor with shallow germanium implantation region in channel A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a channel region of a transistor at a low energy level, forming an amorphous germanium implantation region... | 08/22/2006 |
| 7081387 | Damascene gate multi-mesa MOSFET A multi-mesa FET structure with doped sidewalls for source/drain regions and methods for forming the same are disclosed. The exposure of the source and drain sidewalls during the manufacture enables uniform doping of the entire sidewalls especially when geometry-ind... | 07/25/2006 |
| 7078345 | Method for manufacturing a semiconductor device There is disclosed a method of manufacturing a semiconductor device comprising forming a diffusion region containing arsenic impurity at a concentration of 1×1020 cm−3 or more in an element region of Si substrate which is isolated by an elem... | 07/18/2006 |
| 7045836 | Semiconductor structure having a strained region and a method of fabricating same A semiconductor structure including a highly strained selective epitaxial top layer suitable for use in fabricating a strained channel transistor. The top layer is deposited on the uppermost of a series of one or more lower layers. The lattice of each layer is misma... | 05/16/2006 |
| 7022399 | Semiconductor device integrated multilayer wiring board The present invention provides a semiconductor device integrated multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring... | 04/04/2006 |
| 7023018 | SiGe transistor with strained layers The present invention provides, in one embodiment, a P-type Metal Oxide Semiconductor (PMOS) device (100). The device (100) comprises a tensile-strained silicon layer (105) located on a silicon-germanium substrate (110) and silicon-german... | 04/04/2006 |
| 7015507 | Thin film transistor and method of fabricating the same Provided is a non-single-crystal germanium thin film transistor having a gate insulating film capable of reducing the interface state density between an active layer and the gate insulating film. This thin film transistor has an active layer made of a non-single-cry... | 03/21/2006 |
| 7009200 | Field effect transistor A field effect transistor comprises a source and a drain, and a channel layer of Si1-x-yGexCy crystal (1>x>0, 1>y≧0). Ge composition increases toward a drain end, in a vicinity of a source end of the channel layer. ... | 03/07/2006 |
| 7009208 | Memory device and method of production and method of use of same and semiconductor device and method of production of same A memory device able to be produced without requiring high precision alignment, a method of production of the same, and a method of use of a memory device produced in this way, wherein a peripheral circuit portion (first semiconductor portion) formed by a first mini... | 03/07/2006 |
