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| Number | Title | Issue Date |
| 8183670 | Semiconductor device and method of manufacturing the same In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to ma... | 05/22/2012 |
| 8058709 | Semiconductor device and manufacturing method thereof It is an object of the present invention to control the plane orientation of crystal grains obtained by using a laser beam, into a direction that can be substantially regarded as one direction in an irradiation region of the laser beam. After forming a cap film over... | 11/15/2011 |
| 7884448 | High performance 3D FET structures, and methods for forming the same using preferential crystallographic etching The present invention relates to high performance three-dimensional (3D) field effect transistors (FETs). Specifically, a 3D semiconductor structure having a bottom surface oriented along one of a first set of equivalent crystal planes and multiple additional surfac... | 02/08/2011 |
| 7863713 | Semiconductor device For equalizing the rising and falling operating speeds in a CMOS circuit, it is necessary to make the areas of a p-type MOS transistor and an n-type MOS transistor different from each other due to a difference in carrier mobility therebetween. This area unbalance pr... | 01/04/2011 |
| 7800202 | Semiconductor device In order to obtain substantially the same operating speed of a p-type MOS transistor and an n-type MOS transistor forming a CMOS circuit, the n-type MOS transistor has a three-dimensional structure having a channel region on both the (100) plane and the (110) plane ... | 09/21/2010 |
| 7709933 | Structural element having a porous region at least regionally provided with a cover layer and its use as well as method for setting the thermal conductivity of a porous region A structural element having a region of porous silicon or porous silicon oxide, which was obtained from a porization, starting from an edge area of the region, in at least largely crystalline silicon. Relative to the edge area, the crystalline silicon has a crystal ... | 05/04/2010 |
| 7679165 | High brightness light emitting diode with a bidirectionally angled substrate A light emitting diode includes a substrate tilted toward first and second directions simultaneously, a first cladding layer formed with a semiconductor material of a first conductive type on the substrate, an active layer formed on the first cladding layer, and a s... | 03/16/2010 |
| 7615849 | Semiconductor device and manufacturing method thereof In a semiconductor device having SiC vertical trench MOSFETs, it is aimed to prevent the generation of large scattering in the channel resistance without largely increasing the average value of channel resistance. A 4H-SiC substrate having a major face thereof that ... | 11/10/2009 |
| 7573123 | Semiconductor device and method for forming the same Provided are a semiconductor device, and a method of forming the same. In one embodiment, the semiconductor device includes a semiconductor layer, first and second semiconductor fins, an insulating layer, and an inter-fin connection member. The first and second semi... | 08/11/2009 |
| 7566949 | High performance 3D FET structures, and methods for forming the same using preferential crystallographic etching The present invention relates to high performance three-dimensional (3D) field effect transistors (FETs). Specifically, a 3D semiconductor structure having a bottom surface oriented along one of a first set of equivalent crystal planes and multiple additional surfac... | 07/28/2009 |
| 7521777 | Gallium nitride-based compound semiconductor multilayer structure and production method thereof The object of the present invention is to provide a gallium nitride-based compound semiconductor multilayer structure useful for manufacturing a gallium nitride-based compound semiconductor light-emitting device which requires a low operating voltage and from which ... | 04/21/2009 |
| 7432570 | Semiconductor device and manufacturing method thereof A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111... | 10/07/2008 |
| 7432558 | Formation of semiconductor devices to achieve <100> channel orientation A semiconductor device may include a substrate and an insulating layer formed on the substrate. A fin may be formed on the insulating layer. The fin may include a side surface and a top surface, and the side surface may have a orientation. A first gate may be ... | 10/07/2008 |
| 7429763 | Memory with strained semiconductor by wafer bonding with misorientation One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding regions are defined for a desired bond between a crystalline semiconductor membrane and a crystalline semicond... | 09/30/2008 |
| 7420261 | Bulk nitride mono-crystal including substrate for epitaxy The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-section in a plane perpendicular to... | 09/02/2008 |
| 7411273 | Nitride semiconductor substrate In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±... | 08/12/2008 |
| 7411274 | Silicon semiconductor substrate and its manufacturing method The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a ... | 08/12/2008 |
| 7400030 | Schottky diode with silver layer contacting the ZnO and MgZnO films In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substr... | 07/15/2008 |
| 7381993 | High-breakdown-voltage insulated gate semiconductor device In a semiconductor device of the present invention, the top surface of an n-type silicon carbide layer formed on a silicon carbide substrate is miscut from the (0001) plane in the direction. A gate electrode, a source electrode and other elements are arrange... | 06/03/2008 |
| 7368763 | Semiconductor device and manufacturing method thereof A high quality silicon carbide (SiC) layer being substantially lower in threading dislocation density than a prior layer is formed on silicon (Si) substrate. A semiconductor device is fabricated in such a way that a semiconductor buffer layer containing Si in part a... | 05/06/2008 |
| 7365366 | Boron phosphide-based semiconductor light-emitting device and production method thereof A boron phosphide-based semiconductor light-emitting device, comprising: a crystalline substrate; a first semiconductor layer formed on said crystalline substrate, said first semiconductor layer including a light-emitting layer, serving as a base layer and having a ... | 04/29/2008 |
| 7361574 | Single-crystal silicon-on-glass from film transfer A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the s... | 04/22/2008 |
| 7348611 | Strained complementary metal oxide semiconductor (CMOS) on rotated wafers and methods thereof The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a ... | 03/25/2008 |
| 7339255 | Semiconductor device having bidirectionally inclined toward <1-100> and <11-20> relative to {0001} crystal planes A semiconductor substrate encompasses a GaN substrate and a single-crystal layer formed of III-V nitride compound semiconductor epitaxially grown on the GaN substrate. The GaN substrate has a surface orientation defined by an absolute value of an off-angle of the su... | 03/04/2008 |
| 7335910 | Thin film transistor, semiconductor device, display, crystallization method, and method of manufacturing thin film transistor An object of the present invention is to provide a thin film transistor having a high mobility and having fewer fluctuations in the mobility or threshold voltage characteristics. A non-single-crystal semiconductor thin film having a thickness of less than 50 nm and ... | 02/26/2008 |
| 7307282 | Thin film transistors and semiconductor device The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % but not lar... | 12/11/2007 |
| 7288821 | Structure and method of three dimensional hybrid orientation technology A method and device for increasing pFET performance without degradation of nFET performance. The method includes forming a first structure on a substrate using a first plane and direction and forming a second structure on the substrate using a second plane and direc... | 10/30/2007 |
| 7285799 | Semiconductor light emitting devices including in-plane light emitting layers A semiconductor light emitting device includes a planar light emitting layer with a wurtzite crystal structure having a axis roughly parallel to the plane of the layer, referred to as an in-plane light emitting layer. The in-plane light emitting layer may inc... | 10/23/2007 |
| 7282725 | Method of manufacturing semiconductor device, semiconductor manufacturing apparatus, and stencil mask A manufacturing apparatus of a semiconductor device is disclosed, which comprises an implantation source which applies particles or an electromagnetic wave into an implantation region of a semiconductor substrate in a θ direction shifted by an angle θ from a verti... | 10/16/2007 |
| 7282379 | Nitride semiconductor, semiconductor device, and method of manufacturing the same Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a... | 10/16/2007 |
| 7282732 | Quantum dot structures Symmetric quantum dots are embedded in quantum wells. The symmetry is achieved by using slightly off-axis substrates and/or overpressure during the quantum dot growth. The quantum dot structure can be used in a variety of applications, including semiconductor lasers... | 10/16/2007 |
| 7271467 | Multiple oxide thicknesses for merged memory and logic applications Structures are provided for multiple oxide thicknesses on a single silicon wafer. In particular, structures are provided for multiple gate oxide thicknesses on a single chip. The chip can include circuitry including but not limited to the memory and logic technologi... | 09/18/2007 |
| 7268377 | Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices The present invention provides a method of integrating semiconductor devices such that different types of devices are formed upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. Specifically, the present inv... | 09/11/2007 |
| 7262485 | Substrate for growing electro-optical single crystal thin film and method of manufacturing the same A substrate 1 for growing an electro-optical single crystal thin film in which two or more layers of buffer layers 3, 4, and 5 for buffering lattice mismatch between Si and BTO are formed on an Si (001) substrate 2 is provided as a substr... | 08/28/2007 |
| 7253483 | Semiconductor device layout and channeling implant process A device structure and method for forming graded junction using a implant process. Embodiments of the invention comprise implanting ions into said silicon substrate to form doped regions adjacent to said gate. The orientation of the channel region in the Si crystal ... | 08/07/2007 |
| 7226805 | Sequential lithographic methods to reduce stacking fault nucleation sites An epitaxial silicon carbide layer is fabricated by forming first features in a surface of a silicon carbide substrate having an off-axis orientation toward a crystallographic direction. The first features include at least one sidewall that is orientated nonparallel... | 06/05/2007 |
| 7214984 | High-breakdown-voltage insulated gate semiconductor device In a semiconductor device of the present invention, the top surface of an n-type silicon carbide layer formed on a silicon carbide substrate is miscut from the (0001) plane in the direction. A gate electrode, a source electrode and other elements are arrange... | 05/08/2007 |
| 7208803 | Method of forming a raised source/drain and a semiconductor device employing the same A method of forming a raised source/drain proximate a spacer of a gate of a transistor on a substrate, and a semiconductor device of an integrated circuit employing the same. In one embodiment, the method includes orienting the gate substantially along a direc... | 04/24/2007 |
| 7205639 | Semiconductor devices with rotated substrates and methods of manufacture thereof Integrated circuits are oriented on a substrate at an angle that is rotated between 0 to 45 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mob... | 04/17/2007 |
| 7199050 | Pass through via technology for use during the manufacture of a semiconductor device A method for forming vias which pass through a semiconductor wafer substrate assembly such as a semiconductor die or wafer allows two different types of connections to be formed during a single formation process. One connection passes through the wafer without being... | 04/03/2007 |