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| Number | Title | Issue Date |
| 8106483 | Wafer with improved intrinsic gettering ability An integrated circuit with improved intrinsic gettering ability is described, having a bulk micro-defect (BMD) density of 3.85×105-3.38×109/cm3 through first and second annealing steps. The first annealing step is performed at a fi... | 01/31/2012 |
| 7902636 | Semiconductor chip including a substrate and multilayer part A semiconductor device is provided, which, when cutting a substrate formed with a multilayer part including a plurality of functional devices, makes it possible to cut the multilayer part with a high precision in particular. In a state where a protective tape 22 | 03/08/2011 |
| 7875958 | Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials. ... | 01/25/2011 |
| 7781866 | Gallium nitride-based semiconductor stacked structure, method for fabrication thereof, gallium nitride-based semiconductor device and lamp using the device A gallium nitride-based semiconductor stacked structure includes a single crystal substrate, a low-temperature buffer layer grown at a low temperature in a region contiguous to the single crystal substrate and a gallium nitride-based semiconductor layer overlying th... | 08/24/2010 |
| 7554175 | Gallium nitride substrate, and gallium-nitride-substrate testing and manufacturing methods Fracture-resistant gallium nitride substrate, and methods of testing for and manufacturing such substrates are made available. A gallium nitride substrate (10) is provided with a front side (12) polished to a mirrorlike finish, a back side (14) ... | 06/30/2009 |
| 7466011 | Cleaved silicon substrate active device A hydrogen (H) exfoliation gettering method is provided for attaching fabricated circuits to receiver substrates. The method comprises: providing a Si substrate; forming a Si active layer overlying the substrate with circuit source/drain (S/D) regions; implanting a ... | 12/16/2008 |
| 7459767 | Semiconductor device including semiconductor memory element and method for producing same A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectan... | 12/02/2008 |
| 7436046 | Semiconductor device and manufacturing method of the same Provided is a technology capable of suppressing a reduction in electron mobility in a channel region formed in a strained silicon layer. A p type strained silicon layer is formed over a p type silicon-germanium layer formed over a semiconductor substrate. The p type... | 10/14/2008 |
| 7391058 | Semiconductor devices and methods of making same A composite structure having a silicon carbide epitaxial layer is provided. The epitaxial layer includes at least four regions arranged vertically and defining respective interfaces, where each of the regions is characterized by a respective impurity concentration, ... | 06/24/2008 |
| 7368763 | Semiconductor device and manufacturing method thereof A high quality silicon carbide (SiC) layer being substantially lower in threading dislocation density than a prior layer is formed on silicon (Si) substrate. A semiconductor device is fabricated in such a way that a semiconductor buffer layer containing Si in part a... | 05/06/2008 |
| 7361970 | Method for production of a buried stop zone in a semiconductor component and semiconductor component comprising a buried stop zone A method for the production of a stop zone in a doped zone of a semiconductor body having a first side and a second side, comprises the following method steps: applying a mask having cutouts to one of the sides of the semiconductor... | 04/22/2008 |
| 7358127 | Power semiconductor rectifier having broad buffer structure and method of manufacturing thereof Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of t... | 04/15/2008 |
| 7332750 | Power semiconductor device with improved unclamped inductive switching capability and process for forming same A power semiconductor device having high avalanche capability comprises an N+ doped substrate and, in sequence, N− doped, P− doped, and P+ doped semiconductor layers, the P− and P+ doped layers ... | 02/19/2008 |
| 7323719 | Group III-V nitride series semiconductor substrate and assessment method therefor The group III-V nitride series semiconductor substrate has good-product yield when the band-edge peak light-emission intensity ratio α=N1/N2 is α | 01/29/2008 |
| 7319377 | Method for making high-performance RF integrated circuits A new method and structure is provided for the creation of a semiconductor inductor. Under the first embodiment of the invention, a semiconductor substrate is provided with a scribe line in a passive surface region and active circuits surrounding the passive region.... | 01/15/2008 |
| 7316745 | High-resistance silicon wafer and process for producing the same A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on th... | 01/08/2008 |
| 7294906 | Wiring technique An apparatus for supplying electrical power to a movable member. The apparatus includes a fixed member, the movable member moving relative to the fixed member, a flexible wiring member having an end connected to the movable member and another end connected to the fi... | 11/13/2007 |
| 7282781 | Semiconductor device with a short-lifetime region and manufacturing method thereof A semiconductor device has an n−-semiconductor layer and p+-diffusion regions each having a depth of 14 to 20 μm (design value) selectively formed in the n− semiconductor layer. With the entire surface of the chip irradiated wit... | 10/16/2007 |
| 7279751 | Semiconductor laser device and manufacturing method thereof It is an object of the present invention to provide a semiconductor laser device with high-yielding in which a clack generated in an epitaxial growth layer is restrained and to the manufacturing method thereof, the semiconductor laser device includes a GaN substrate... | 10/09/2007 |
| 7262485 | Substrate for growing electro-optical single crystal thin film and method of manufacturing the same A substrate 1 for growing an electro-optical single crystal thin film in which two or more layers of buffer layers 3, 4, and 5 for buffering lattice mismatch between Si and BTO are formed on an Si (001) substrate 2 is provided as a substr... | 08/28/2007 |
| 7245330 | Electrooptic device, liquid crystal device, and projection display device with line defects To provide an electrooptic device which can reliably suppress a substrate floating effect, such as a parasitic bipolar phenomenon, in an SOI-MIS transistor, and which has superior electrical characteristics. An electrooptic device (liquid crystal light valve) of the... | 07/17/2007 |
| 7244957 | Group III nitride compound semiconductor light-emitting device and method for producing the same In a Group III nitride compound semiconductor light-emitting device which outputs lights from a semiconductor plane, about 1.5 μm in height of a Group III nitride compound semiconductor projection part 150, which is made of Mg-doped p-type GaN having Mg dopi... | 07/17/2007 |
| 7242075 | Silicon wafers and method of fabricating the same By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. ... | 07/10/2007 |
| 7235863 | Silicon wafer and process for producing it A process for producing a single-crystal silicon wafer, comprises the following steps: producing a layer on the front surface of the silicon wafer by epitaxial deposition or production of a layer whose electrical resistance differs... | 06/26/2007 |
| 7199448 | Integrated circuit configuration comprising a sheet-like substrate An integrated circuit is formed on a non-planar substrate. The integrated circuit is formed over a plurality of layers. Chemical or physical changes in the microstructure of the substrate cause the bending of the substrate, in one or more propagation directions.... | 04/03/2007 |
| 7187057 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor Known techniques to improve metal-oxide-semiconductor field effect transistor (MOSFET) performance is to add a high stress dielectric layer to the MOSFET. The high stress dielectric layer introduces stress in the MOSFET that causes electron mobility drive current to... | 03/06/2007 |
| 7164187 | Semiconductor and semiconductor substrate, method of manufacturing the same, and semiconductor device Provided are a semiconductor and semiconductor substrate exhibiting low resistance on the substrate side while exhibiting high resistivity in an epitaxially grown layer formed thereover; a method of manufacturing the same; and a semiconductor device employing this s... | 01/16/2007 |
| 7129138 | Methods of implementing and enhanced silicon-on-insulator (SOI) box structures Enhanced silicon-on-insulator (SOI) buried oxide (BOX) structures and methods are provided for implementing enhanced SOI BOX structures. An oxygen implant step is performed from a backside into a thinned silicon substrate layer. An anneal step forms thick buried oxi... | 10/31/2006 |
| 7129521 | Semiconductor device and manufacture method thereof The problem is to provide a technology to reduce a light leakage current in order to obtain a good display. One kind or plurality kinds of elements chosen from argon, germanium, silicon, helium, neon, krypton, and xenon are implanted in a crystalline semiconductor l... | 10/31/2006 |
| 7112509 | Method of producing a high resistivity SIMOX silicon substrate The present invention provides a method for generating silicon-on-insulator (SOI) wafers that exhibit a high electrical resistivity. In one embodiment of a method according to the teachings of the invention, a SIMOX process is sandwiched between two Full Oxygen Prec... | 09/26/2006 |
| 7098504 | Nonvolatile semiconductor storage device and production method therefor There is provided a nonvolatile semiconductor storage device less subject to variances of electric characteristics among memory cells. A floating gate electrode provided on a substrate is made of two or more materials different in carrier trapping efficiency so as t... | 08/29/2006 |
| 7071079 | Epitaxial wafer and a method for producing it The present invention provides an epitaxial wafer wherein a silicon epitaxial layer is formed on a surface of a silicon single crystal wafer in which nitrogen is doped, and a density of oxide precipitates having such a size that a gettering capability can be achieve... | 07/04/2006 |
| 7067404 | Thin film semiconductor device having a gate electrode insulator formed through high-heat oxidization A thin film semiconductor device includes a gate electrode insulator formed through high-heat oxidization of a semiconductor film. The high-heat oxidization of semiconductor film is carried out, in the process of crystallization or recrystallization of non-single-cr... | 06/27/2006 |
| 7037371 | Method for fabricating semiconductor device After distributing a nonmetal element in a region in the vicinity of a surface portion of a semiconductor layer, a metal film is deposited on the semiconductor layer. Next, a semiconductor-metal compound layer is epitaxially grown in the surface portion of the semic... | 05/02/2006 |
| 7037814 | Single mask control of doping levels In an integrated circuit, dopant concentration levels are adjusted by making use of a perforated mask. Doping levels for different regions across an integrated circuit can be differently defined by making use of varying size and spacings to the perforations in the m... | 05/02/2006 |
| 7038300 | Apparatus with improved layers of group III-nitride semiconductor An apparatus includes a crystalline substrate having a top surface, a crystalline semiconductor layer located on the top surface, and a plurality of dielectric regions. The crystalline semiconductor layer includes group III-nitride and has first and second surfaces.... | 05/02/2006 |
| 7015517 | Semiconductor device incorporating a defect controlled strained channel structure and method of making the same A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that a... | 03/21/2006 |
| 6991976 | Method for manufacturing a semiconductor thin film A little amount of nickel is introduced into an amorphous silicon film formed on a glass substrate to crystallize the amorphous silicon film by heating. In this situation, nickel elements remain in a crystallized silicon film. An amorphous silicon film is formed on ... | 01/31/2006 |
| 6933196 | Isolation structure and method for semiconductor device A device isolation structure and method for a semiconductor device according to the present invention includes forming first and second trenches by etching predetermined regions of a semiconductor substrate, forming a buried insulating film in the trenches, filling ... | 08/23/2005 |
| 6924216 | Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device A method of forming the active regions of field effect transistors is proposed. According to the proposed method, shallow implanting profiles for both the halo structures and the source and drain regions can be obtained by carrying out a two-step damaging and amorph... | 08/02/2005 |
