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| Number | Title | Issue Date |
| 7989922 | Highly tunable metal-on-semiconductor trench varactor An array of deep trenches is formed in a doped portion of the semiconductor substrate, which forms a lower electrode. A dielectric layer is formed on the sidewalls of the array of deep trenches. The array of deep trenches is filled with a doped semiconductor materia... | 08/02/2011 |
| 7304358 | MOS transistor with a deformable gate A MOS transistor with a deformable gate formed in a semiconductor substrate, including source and drain areas separated by a channel area extending in a first direction from the source to the drain and in a second direction perpendicular to the first one, a conducti... | 12/04/2007 |
| 7250330 | Method of making an electronic package A method of making an electronic package is described, wherein a substrate is provided with a pattern of conductive pads and a portion of solder positioned on selected ones of the pattern of copper pads. The solder is then reflowed to form partial hemispherically sh... | 07/31/2007 |
| 7157766 | Variable capactor structure and method of manufacture A variable capacitor comprising a substrate having a first type ion-doped buried layer, a first type ion-doped well, a second type ion-doped region and a conductive layer thereon. The first type ion-doped well is formed within the substrate. The first type ion-doped... | 01/02/2007 |
| 7141864 | Grouped capacitive element There is disclosed a semiconductor device comprising at least one capacitive element group having a plurality of unit capacitive elements. At least one lead-out electrode for bottom electrodes of the unit capacitive elements of the capacitive element group is provid... | 11/28/2006 |
| 7060610 | Method for forming contact in semiconductor device The present invention relates to a method for forming a contact in a semiconductor device. The method includes the steps of: forming a P-type source/drain junction in a substrate; forming an inter-layer insulation layer on the substrate; forming a contact hole expos... | 06/13/2006 |
| 6933796 | Voltage controlled oscillating circuit A voltage controlled oscillating circuit operable to output a variable frequency, includes a variable capacitance element with the variable frequency varying with a variation in capacitance of the variable capacitance element. The variable capacitance element is pro... | 08/23/2005 |
| 6882029 | Junction varactor with high Q factor and wide tuning range A PN-junction varactor includes a first ion well of first conductivity type formed on a semiconductor substrate of second conductivity type. A first dummy gate is formed over the first ion well. A first gate dielectric layer is formed between the first dummy gate an... | 04/19/2005 |
| 6855596 | Method for manufacturing a trench capacitor having an isolation trench A method for manufacturing a trench capacitor includes the step of etching a shallow isolation trench in a two-step process flow. During a first etching step, an etch chemistry based on chlorine or bromine performs a highly selective etch for silicon. During a secon... | 02/15/2005 |
| 6835977 | Variable capactor structure A variable capacitor comprising a substrate having a first type ion-doped buried layer, a first type ion-doped well, a second type ion-doped region and a conductive layer thereon. The first type ion-doped well is formed within the substrate. The first type ion-doped... | 12/28/2004 |
| 6825089 | Increased quality factor of a varactor in an integrated circuit via a high conductive region in a well The present invention provides an varactor, a method of manufacture thereof. In an exemplary embodiment, the varactor includes a semiconductor substrate and well of a first and second conductivity type, respectively. A conductive region in the well has a same conduc... | 11/30/2004 |
| 6787882 | Semiconductor varactor diode with doped heterojunction A semiconductor device includes a plurality of barrier layers and a plurality of quantum well layers which are alternately interleaved with each other and disposed on a substrate of semiconductor material so as to form a multiple-heterojunction varactor diode. The b... | 09/07/2004 |
| 6703681 | Variable-capacitance capacitor The invention concerns a variable capacitance capacitor comprising a periodic structure of raised zones (5) separated by recesses (6) formed in a type N semiconductor substrate (1). The walls of the raised zones and the base of the recesses are coated wit... | 03/09/2004 |
| 6661069 | Micro-electromechanical varactor with enhanced tuning range A three-dimensional micro- electromechanical (MEM) varactor is described wherein a movable beam and fixed electrode are respectively fabricated on separate substrates coupled to each other. The movable beam with comb-drive electrodes are fabricated on the... | 12/09/2003 |
| 6489666 | Semiconductor device with improved heat suppression in peripheral regions A semiconductor device (102) comprises an N type semiconductor substrate (1). A P layer (22) is formed in a first surface (S1) of the semiconductor substrate (1), and a P layer (23) is formed in the semiconductor substrate (1) and in contact with the firs... | 12/03/2002 |
| 6369671 | Voltage controlled transmission line with real-time adaptive control A semiconductor structure having a substrate, an insulator above a portion of the substrate, a conductor above the insulator; and at least two contact regions in the substrate on opposite sides of the portion of the substrate, wherein a voltage between th... | 04/09/2002 |
| 6316819 | Multilayer ZnO polycrystalline diode A multilayer ZnO polycrystalline diode that protects against electrostatic discharges, over-current, and voltage surges is provided. The polycrystalline diode includes a block having a plurality of polycrystalline layers in parallel having a first lateral... | 11/13/2001 |
| 6018175 | Gapped-plate capacitor In a semiconductor device, a capacitor is provided which has a gap in at least one of its plates. The gap is small enough so that fringe capacitance between the sides of this gap and the opposing plate at least compensates, if not overcompensates, for the... | 01/25/2000 |
| 5747865 | Varactor diode controllable by surface layout design An area-variable varactor diode is disclosed, in which the capacitance can be arbitrarily varied under an applied bias voltage. The area-variable varactor diode is characterized in that, in order to ensure freedom to designing the epi-layer, to obtain the... | 05/05/1998 |
| 5663584 | Schottky barrier MOSFET systems and fabrication thereof (MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricat... | 09/02/1997 |
| 4694561 | Method of making high-performance trench capacitors for DRAM cells A trench version of a high-capacitance (Hi-C) capacitor for a dynamic random-access-memory (DRAM) cell is made utilizing a modified version of the doping technique described in U.S. Pat. No. 4,471,524 and 4,472,212. A shallow highly doped trench region is... | 09/22/1987 |
| 4675624 | Electrical phase shifter controlled by light A TEM-mode transmission line such as a microstrip or coplanar line includes a pair of conductors, at least one of which is elongated. A semiconductor junction or junctions are coupled across the conductors. If a single junction is used, the junction may b... | 06/23/1987 |
| 4663648 | Three dimensional structures of active and passive semiconductor components The disclosure relates to a three dimensional semiconductor structure formed in a semiconductor substrate wherein electrical components, both active and passive, are formed on the substrate surface as well as in grooves formed in the substrate at an angle... | 05/05/1987 |
| 4427457 | Method of making depthwise-oriented integrated circuit capacitors A depthwise-oriented capacitor comprises a cluster of separate, parallel, narrow elongated oppositely-doped conductive regions extending depthwise into a semiconductor substrate, for example, in an integrated circuit. The conductive regions can be paralle... | 01/24/1984 |
| 4397075 | FET Memory cell structure and process A dense, vertical MOS FET memory cell has a high charge storage capacitance per unit area of substrate surface. The charge storage capacitor structure is formed within a well etched in the silicon semiconductor substrate by a combination of reactive ion e... | 08/09/1983 |
| 4371847 | Data transmission link A method and apparatus for altering the apparent electrical characteristic of a distributed electrical component in an integrated circuit is disclosed. In one form a distributed load resistor is sunk into a parallel distributed guard resistor. The mutual ... | 02/01/1983 |
| 4272882 | Method of laying out an integrated circuit with specific alignment of the collector contact with the emitter region The method entails laying out NPN transistors in a bipolar integrated circuit in a manner which prevents crystal dislocations from making the transistor unreliable. The long edges of the collector contacts are aligned in a direction substantially perpendi... | 06/16/1981 |
| 3969750 | Diffused junction capacitor and process for producing the same A diffused junction capacitor having two P+ N+ junctions, one in the semiconductor substrate and one in an epitaxial layer thereon and exhibiting high capacitance per unit area. A method for forming such a capacitor makes use of the fact ... | 07/13/1976 |
| 3962713 | Large value capacitor Disclosed is a semiconductor capacitor which utilizes the volume of the semiconductor substrate in which it is formed to create increased surface area and thereby to provide increased capacitance. The surface area is increased by forming selectively space... | 06/08/1976 |