A haircutting appliance comprises an enclosed housing having a hollow handle connecting the housing to a vacuum source to carry away cut hairs from a subject's head.
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| Number | Title | Issue Date |
| 8169052 | Semiconductor device A metal electrode is disposed on each of a plurality of resistor groups which are made of polycrystalline silicon resistors and constitute a resistor circuit. The metal electrode is connected to an end of the resistor via another interconnecting layer. Accordingly, ... | 05/01/2012 |
| 8154104 | Semiconductor device having a resistor and methods of forming the same In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure i... | 04/10/2012 |
| 8120146 | Protected semiconductor device and method of manufacturing thereof The semiconductor device (100) comprises at least one semiconductor element (20), a metallization structure comprising a first (31) and a second line (32) and extending thereon a resistor. An electrically insulating protection layer (3... | 02/21/2012 |
| 8115278 | Manufacturing method of semiconductor device, evaluation method of semiconductor device, and semiconductor device A semiconductor element formed over the same substrate as a TFT, includes a semiconductor film having an impurity region; an insulating film formed over the semiconductor film; an electrode divided into a plurality of parts over the insulating film by spacing a dist... | 02/14/2012 |
| 8093681 | Semiconductor integrated circuit device and process for manufacturing the same A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer consti... | 01/10/2012 |
| 8089136 | Semiconductor device A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the el... | 01/03/2012 |
| 8084842 | Thermally stabilized electrode structure Memory devices and methods for manufacturing are described herein. A memory device as described herein includes a first electrode layer, a second electrode layer, and a thermal isolation structure including a layer of thermal isolation material between the first and... | 12/27/2011 |
| 7999352 | Semiconductor device A semiconductor device equipped with a metal thin film resistor is disclosed. The semiconductor device includes a second interlayer insulating film formed on a first interlayer insulating film including a formation area of a wiring pattern. Connecting holes are form... | 08/16/2011 |
| 7989920 | Phase change memory A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is fo... | 08/02/2011 |
| 7986027 | Encapsulated metal resistor The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is re... | 07/26/2011 |
| 7986028 | Semiconductor device having metal thin film resistance element A semiconductor device, includes a lower layer side insulation film; a wiring pattern formed on the lower layer side insulation film; a base insulation film formed on the lower layer side insulation film and the wiring pattern; and a plurality of metal thin film res... | 07/26/2011 |
| 7982287 | System and method for faceting the corners of a resistor protect layer to reduce vertical step height A system and method is disclosed for providing a resistor protect layer to protect a thin film resistor in a semiconductor device. A thin film resistor is formed on a dielectric layer and a resistor protect layer is placed over the thin film resistor. An etch proced... | 07/19/2011 |
| 7960813 | Programmable resistance memory devices and systems using the same and methods of forming the same A programmable resistance memory element and method of forming the same. The memory element includes a first electrode, a dielectric layer over the first electrode and a second electrode over the dielectric layer. The dielectric layer and the second electrode each h... | 06/14/2011 |
| 7952163 | Nonvolatile memory devices that use resistance materials and internal electrodes, and related methods and processing systems A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially ... | 05/31/2011 |
| 7952164 | Semiconductor device The semiconductor device includes a resistor cell that includes a diffused layer resistor, a P-well contact and an N-well contact. The diffused layer resistor is arranged on a semiconductor substrate and is formed by a diffused layer. The P-well contact surrounds an... | 05/31/2011 |
| 7911030 | Resistive memory device and method of fabricating the same A resistive memory device includes: a substrate, an insulation layer arranged over the substrate, a first electrode plug penetrating the insulation layer from the substrate, having a portion protruded out of an upper portion of the insulation layer, and having peaks... | 03/22/2011 |
| 7855432 | Integrated thermal characterization and trim of polysilicon resistive elements Devices, systems, and methods for providing an on-chip, temperature-stable resistance network for generating a precision current or precision resistance are disclosed. The resistance network includes a first resistance material having a linear, negative temperature ... | 12/21/2010 |
| 7855433 | Semiconductor device A semiconductor device has a semiconductor substrate having a first conductivity type and a resistor having a substantially U-shaped contour and being formed from an epitaxial layer disposed on the semiconductor substrate and having a second conductivity type differ... | 12/21/2010 |
| 7851887 | Phase change memory device with heater electrodes having fine contact area and method for manufacturing the same A phase change memory device includes a semiconductor substrate having a conductive region, a heater electrode formed on the semiconductor substrate and including a connection element which is composed of carbon nanotubes electrically connected with the conductive r... | 12/14/2010 |
| 7843037 | High level integration phase change memory device having an increased diode junction area and method for manufacturing the same A phase change memory device includes a semiconductor substrate active region, a plurality of first conductivity type silicon pillars, and a plurality of second conductivity type silicon patterns. The plurality of first conductivity type silicon pillars is formed on... | 11/30/2010 |
| 7838966 | Semiconductor devices including resistor elements comprising a bridge and base elements and related methods A semiconductor device may include a resistance pattern including a resistance material on a substrate. The resistance pattern may include first and second spaced apart base elements, a bridge element, and first, second, third, and fourth extension elements. The fir... | 11/23/2010 |
| 7834420 | Semiconductor integrated circuit device and process for manufacturing the same A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer consti... | 11/16/2010 |
| 7804154 | Semiconductor device structure and fabricating method thereof A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resisto... | 09/28/2010 |
| 7804155 | Vertical resistors A vertical resistor. A substrate includes a trench filled by an isolation layer. A first doped-type region and a second doped-type region are formed on both sides of the trench. The first doped-type region receives a control bias, the second doped-type region receiv... | 09/28/2010 |
| 7800200 | Wireless IC tag and method for manufacturing same A wireless IC tag is provided with a memory circuit including a ROM in which an identification number is written, and a pulse width detection circuit having divided resistors and a capacitor for detecting a signal waveform from a reader. In order to prevent the incr... | 09/21/2010 |
| 7759770 | Integrated circuit including memory element with high speed low current phase change material An integrated circuit includes a first electrode, a second electrode, and a memory element coupled to the first electrode and to the second electrode, the memory element includes fast-operation resistance changing material doped with dielectric material. ... | 07/20/2010 |
| 7714411 | Electro-optical device, method of manufacturing the same, and electronic apparatus An electro-optical device includes: a substrate; a plurality of wiring lines which is formed on the substrate; and an IC which is mounted on the substrate so as to be electrically connected to the plurality of wiring lines. At least a pair of wiring lines among the ... | 05/11/2010 |
| 7705424 | Phase change memory A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is fo... | 04/27/2010 |
| 7667293 | Resistive random access memory and method for manufacturing the same A resistive random access memory including, an insulating layer, a hard mask layer, a bottom electrode, a memory cell and a top electrode is provided. The insulating layer is disposed on the bottom electrode. The insulating layer has a contact hole having a first wi... | 02/23/2010 |
| 7656008 | Semiconductor devices and methods of forming the same Semiconductor devices are disclose that include a first doped region and a second doped region spaced apart from each other and defined within a same well of a semiconductor substrate. A gate insulating layer and a gate electrode are stacked on a channel region betw... | 02/02/2010 |
| 7642620 | Semiconductor apparatus It is an object of the present invention to provide a semiconductor apparatus for solving a trade-off between the area, power consumption, noise and accuracy of correction of a variation correction circuit that corrects variations in resistance and threshold voltage... | 01/05/2010 |
| 7615844 | Semiconductor device A semiconductor device is provided that includes: a base insulating film; a metal thin-film resistor that is provided on the base insulating film; a lower-layer insulating film that is formed under the base insulating film; and a wiring pattern that is formed on the... | 11/10/2009 |
| 7612429 | Chip resistor, process for producing the same, and frame for use therein A chip resistor (A1) comprises a first insulation layer (2A) covering the regions between a plurality of electrodes (3) on a rear surface (10a) of a resistor (1), and a second insulation layer covering a pair of side faces o... | 11/03/2009 |
| 7557429 | Semiconductor device with resistor element and dummy active region A first well is formed in the surface layer of a semiconductor substrate, the first layer being of a first conductivity type, the first well being of a second conductivity type opposite to the first conductivity type. A pair of current input/output ports are connect... | 07/07/2009 |
| 7554173 | Semiconductor device A semiconductor device accurately monitoring temperature of a semiconductor chip even in a noisy environment, while not requiring a highly accurate detection circuit. A PTC element is bonded onto an IGBT chip. Then, a constant current flows from a constant current s... | 06/30/2009 |
| 7550819 | Metal thin-film resistance element on an insulation film A semiconductor device having a metal thin-film resistance on an insulation film includes first and second contact holes formed in the insulation film, a first conductive plug formed in the first contact hole, a second conductive plug formed in the second contact ho... | 06/23/2009 |
| 7538411 | Integrated circuit including resistivity changing memory cells Wordline stacks are arranged parallel at a distance from one another on a substrate surface. Bitlines are arranged transversely to the wordline stacks at a distance from one another. Source/drain regions are formed as doped regions in the vicinity of the wordline st... | 05/26/2009 |
| 7525176 | Phase change memory cell design with adjusted seam location A memory cell comprises a lower electrode, a phase change feature, a spacer feature, and a dielectric layer. The lower electrode comprises a first surface region as well as a second surface region that is raised in relation to the first surface region. The phase cha... | 04/28/2009 |
| 7498657 | Vertical resistors and band-gap voltage reference circuits A vertical resistor. A substrate includes a trench filled by an isolation layer. A first doped-type region and a second doped-type region are formed on both sides of the trench. The first doped-type region receives a control bias, the second doped-type region receiv... | 03/03/2009 |
| 7492033 | Semiconductor memory device A semiconductor memory device includes a plurality of active regions, and a gate electrode in a fish bone shape arranged on each active region. In each active region, a plurality of source regions and a plurality of drain regions are arranged in a matrix manner. The... | 02/17/2009 |