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| Number | Title | Issue Date |
| 8125050 | Semiconductor device having a mim capacitor and method of manufacturing the same A semiconductor device is described includes a wiring layer, an insulating layer stacked on the wiring layer, a trench formed by digging down the insulating layer from the surface thereof, a film-shaped lower electrode formed along the inner surface of the trench, a... | 02/28/2012 |
| 7872329 | Semiconductor device and method of manufacturing the same Effective area of a capacitor is to be increased while suppressing increase in number of manufacturing steps. In a semiconductor device, a silicon substrate includes a plurality of first recessed portions having a first depth from the main surface thereof, a second ... | 01/18/2011 |
| 7859081 | Capacitor, method of increasing a capacitance area of same, and system containing same A capacitor includes a substrate (110, 210), a first electrically insulating layer (120, 220) over the substrate, and a fin (130, 231) including a semiconducting material (135) over the first electrically insulating layer. A first electri... | 12/28/2010 |
| 7816762 | On-chip decoupling capacitor structures The present disclosure provides on-chip decoupling capacitor structures having trench capacitors integrated with planar capacitors to provide an improved overall capacitance density. In some embodiments, the structure includes at least one deep trench capacitor, at ... | 10/19/2010 |
| 7812425 | Semiconductor device with lower capacitor electrode that includes islands of conductive oxide films arranged on a noble metal film A semiconductor device has a semiconductor substrate, and a capacitor which is provided on the upper side of the semiconductor substrate and composed of a lower electrode, an upper electrode and a dielectric film, the dielectric film being placed in between the lowe... | 10/12/2010 |
| 7598592 | Capacitor structure for integrated circuit A capacitor structure for an integrated circuit. An insulating layer is disposed on a substrate. A first conductive line is embedded in a first level of the insulating layer. A second conductive line is embedded in a second level of the insulating layer lower than t... | 10/06/2009 |
| 7573121 | Method for enhancing electrode surface area in DRAM cell capacitors Methods for forming the lower electrode of a capacitor in a semiconductor circuit, and the capacitors formed by such methods are provided. The lower electrode is fabricated by forming a texturizing underlayer and then depositing a conductive material thereover. In o... | 08/11/2009 |
| 7414296 | Method of manufacturing a metal-insulator-metal capacitor The present invention provides method of manufacturing a metal-insulator-metal capacitor (100). A method of manufacturing includes depositing a first refractory metal layer (105) over a semiconductor substrate (110). The first refractory metal l... | 08/19/2008 |
| 7414297 | Capacitor constructions The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is form... | 08/19/2008 |
| 7400008 | Semiconductor device and manufacturing process therefor An objective of this invention is to provide a semiconductor device comprising a less bias-dependent capacitative element with a large capacity per a unit area, having a configuration which can be manufactured using an existing structure in a semiconductor device. T... | 07/15/2008 |
| 7385241 | Vertical-type capacitor structure Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at least one dielectric layer on the substrate to insulate the first ele... | 06/10/2008 |
| 7375413 | Trench widening without merging A semiconductor fabrication method comprises steps of providing a semiconductor structure. The semiconductor structure includes a semiconductor substrate, a trench in the semiconductor substrate. The trench comprises a side wall which includes {100} side wall surfac... | 05/20/2008 |
| 7368343 | Low leakage MIM capacitor Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures ... | 05/06/2008 |
| 7365412 | Vertical parallel plate capacitor using spacer shaped electrodes and method for fabrication thereof A capacitor structure uses an aperture located within a dielectric layer in turn located over a substrate. A pair of conductor interconnection layers embedded within the dielectric layer terminates at a pair of opposite sidewalls of the aperture. A pair of capacitor... | 04/29/2008 |
| 7350292 | Method for affecting impedance of an electrical apparatus A method for affecting an impedance of a portion of an electrical circuit loop in an electrical circuit apparatus includes providing an electrical circuit apparatus having at least a portion of an electrical circuit loop including at least one of at least one trace ... | 04/01/2008 |
| 7342314 | Device having a useful structure and an auxiliary structure The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the substrate adjacent to the useful structure, the auxiliary structure having... | 03/11/2008 |
| 7342292 | Capacitor assembly having a contact electrode encircling or enclosing in rectangular shape an effective capacitor area A capacitor assembly has a substrate, a first conductive auxiliary layer on the substrate, a capacitor dielectric, a second conductive auxiliary layer and a contact electrode. Thereby the first conductive auxiliary layer is connected to the capacitor dielectric with... | 03/11/2008 |
| 7329939 | Metal-insulator-metal capacitor and method of fabricating same A metal-insulator-metal (MIM) capacitor including a metal layer, an insulating layer formed on the metal layer, at least a first opening and at least a second opening formed in the first insultaing layer, a dielectric layer formed in the first opening, a conductive ... | 02/12/2008 |
| 7327011 | Multi-surfaced plate-to-plate capacitor and method of forming same A plate to plate capacitor has a first plate, a second plate, and an insulating medium separating the first plate from the second plate. The first plate and the second plate are adapted and arranged to form an interlaced structure in which multiple capacitance surfa... | 02/05/2008 |
| 7317238 | Intrinsic decoupling capacitor A plurality of N-doped strip portions are formed alternating with a plurality of P-doped regions. When a voltage is applied to the N-doped strip portions, a capacitance is created between the N-doped strip portions and the P-doped strip portions. A capacitance is al... | 01/08/2008 |
| 7309906 | Apparatus and methods for providing highly effective and area efficient decoupling capacitance in programmable logic devices Improved decoupling capacitor designs and layout schemes are provided that generate high effective capacitance and high area efficiency at higher frequencies than that of previously known decoupling capacitor designs. The improved decoupling capacitor designs utiliz... | 12/18/2007 |
| 7298019 | Capacitor of semiconductor device and method of manufacturing the same A MIM capacitor includes a lower electrode disposed on a semiconductor substrate. A dielectric layer is disposed on the lower electrode to completely cover an exposed surface of the lower electrode. An upper electrode is disposed on the dielectric layer. A method fo... | 11/20/2007 |
| 7298002 | Hemispherical silicon grain capacitor with variable grain size A semiconductor device includes cylindrical capacitors each including corresponding cylindrical electrodes. Each cylindrical electrode includes hemispherical silicon grains. The hemispherical silicon grains protruding from an upper region of the cylindrical electrod... | 11/20/2007 |
| 7294544 | Method of making a metal-insulator-metal capacitor in the CMOS process A method for fabricating an improved metal-insulator-metal capacitor is achieved. An insulating layer is provided overlying conducting lines on a semiconductor substrate. Via openings through the insulating layer to the conducting lines are filled with metal plugs. ... | 11/13/2007 |
| 7291896 | Voltage droop suppressing active interposer The invention proposes an interposer assembly architecture for noise suppression circuits on the package of a CPU or high power, high frequency VLSI device. In this architecture, charge is stored on dedicated capacitors at a voltage substantially higher than the ope... | 11/06/2007 |
| 7276776 | Semiconductor device A semiconductor device includes a semiconductor substrate including a main surface; a plurality of first interconnections formed in a capacitance forming region defined on the main surface and extending in a predetermined direction; a plurality of second interconnec... | 10/02/2007 |
| 7268382 | DRAM cells The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is ... | 09/11/2007 |
| 7259956 | Scalable integrated circuit high density capacitors The present invention provides several scalable integrated circuit high density capacitors and their layout techniques. The capacitors are scaled, for example, by varying the number of metal layers and/or the area of the metal layers used to from the capacitors. The... | 08/21/2007 |
| 7233053 | Integrated semiconductor product with metal-insulator-metal capacitor To fabricate an integrated semiconductor product with integrated metal-insulator-metal capacitor, first of all a dielectric auxiliary layer (6) is deposited on a first electrode (2, 3, 5). This auxiliary layer (6) is then opened up (15) v... | 06/19/2007 |
| 7232728 | High quality oxide on an epitaxial layer This invention improves the quality of gate oxide dielectric layers using a two-pronged approach, thus permitting the use of much thinner silicon dioxide gate dielectric layers required for lower-voltage, ultra-dense integrated circuits. In order to eliminate defect... | 06/19/2007 |
| 7227736 | Capacitor device and method of manufacturing the same A capacitor device includes a capacitor Q constituted by a lower electrode (12) formed an a substrate (10), a dielectric film (14), and an upper electrode (16); an insulating film (18) covering the capacitor Q; a first contact hole... | 06/05/2007 |
| 7224017 | Device with integrated capacitance structure The present invention relates to a device with integrated capacitance structure has at least one first and an adjacent second rewiring plane, each of which comprises at least one first partial structure and a second partial structure, which is different from the fir... | 05/29/2007 |
| 7224014 | Semiconductor device and method for fabricating the same A semiconductor device includes a first insulating film having a cavity, a second insulating film formed on the first insulating film and having an opening exposing the cavity, a lower electrode of a concave shape in cross section formed on the bottom and sides of t... | 05/29/2007 |
| 7220287 | Method for tuning an embedded capacitor in a multilayer circuit board Exemplary techniques for tuning the effective capacitance provided by an embedded capacitor are disclosed. The techniques may be realized by modifying one or more conductive features of one or more vias connected to the embedded capacitor to adjust the capacitance c... | 05/22/2007 |
| 7220670 | Method of producing rough polysilicon by the use of pulsed plasma chemical vapor deposition and products produced by same A method for depositing a rough polysilicon film on a substrate is disclosed. The method includes introducing the reactant gases argon and silane into a deposition chamber and enabling and disabling a plasma at various times during the deposition process. ... | 05/22/2007 |
| 7199445 | Integrated capacitor on packaging substrate An integrated capacitor on a packaging substrate. The integrated capacitor comprises a conductor plane, a first dielectric layer and a signal transmission layer. The conductor plane has an extrusion layer of a first thickness. The first extrusion layer and the condu... | 04/03/2007 |
| 7199415 | Conductive container structures having a dielectric cap Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of container-to-container shorting by insulating against bridging of conducti... | 04/03/2007 |
| 7199016 | Integrated circuit resistor An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses | 04/03/2007 |
| 7180120 | Semiconductor device having dual stacked MIM capacitor and method of fabricating the same Semiconductor devices having a dual stacked MIM capacitor and methods of fabricating the same are disclosed. The semiconductor device includes a dual stacked MIM capacitor formed on the semiconductor substrate. The dual stacked MIM capacitor includes a lower plate p... | 02/20/2007 |
| 7176552 | Semiconductor memory device having a decoupling capacitor A semiconductor memory device comprises a cell capacitor having a first buried contact connected with a semiconductor substrate of a cell region and a first storage node connected with the first buried contact, and a decoupling capacitor for reducing a coupling nois... | 02/13/2007 |
