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| Number | Title | Issue Date |
| 8076750 | Linearity improvements of semiconductor substrate based radio frequency devices The present invention relates to using a trap-rich layer, such as a polycrystalline Silicon layer, over a semiconductor substrate to substantially immobilize a surface conduction layer at the surface of the semiconductor substrate at radio frequency (RF) frequencies... | 12/13/2011 |
| 8067814 | Semiconductor device and method of manufacturing the same In the present invention, a first circuit pattern 3 composing a semiconductor element is formed on the front side of a substrate 1, a first insulating layer 2 is formed on the first circuit pattern 3, solder electrodes 5 for extern... | 11/29/2011 |
| 7986023 | Semiconductor device with inductor One or more embodiments are directed to a semiconductor structure, comprising: a support; a semiconductor chip at least partially embedded within the support; and an inductor electrically coupled to the chip, at least a portion of the inductor overlying the support ... | 07/26/2011 |
| 7936043 | Integrated passive device substrates The specification describes an integrated passive device (IPD) that is formed on a silicon substrate covered with an oxide layer. Unwanted accumulated charge at the silicon/oxide interface are rendered immobile by creating trapping centers in the silicon surface. Th... | 05/03/2011 |
| 7915706 | Linearity improvements of semiconductor substrate using passivation The present invention relates to using a potentially trap-rich layer, such as a polycrystalline Silicon layer, over a passivation region of a semiconductor substrate or a Silicon-on-insulator (SOI) device layer to substantially immobilize a surface conduction layer ... | 03/29/2011 |
| 7915707 | Deformable integrated circuit device An integrated-circuit device includes a rigid substrate island having a main substrate surface with a circuit region circuit elements and at least one fold structure. The fold structure is attached to the substrate island and is unfoldable from a relaxed, folded sta... | 03/29/2011 |
| 7884442 | Integrated circuit resistor An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses | 02/08/2011 |
| 7880265 | Packaged integrated circuit A packaged integrated circuit includes an integrated circuit and a package substrate. A trace in the package substrate includes a first portion and a second, high-inductance, portion. The high-inductance portion of the trace is proximate to a port of the integrated ... | 02/01/2011 |
| 7863706 | Circuit system with circuit element A circuit system includes: forming a first electrode over a substrate; applying a dielectric layer over the first electrode and the substrate; forming a second electrode over the dielectric layer; and forming a dielectric structure from the dielectric layer with the... | 01/04/2011 |
| 7838962 | Semiconductor device having capacitor, transistor and diffusion resistor and manufacturing method thereof In manufacturing a semiconductor device including a substrate having a (111)-plane orientation and an off-set angle in a range between 3 degrees and 4 degrees, a capacitor, a transistor and a diffusion resistor are formed in the substrate, each of which are separate... | 11/23/2010 |
| 7808075 | Integrated circuit devices with ESD and I/O protection The integrated circuit devices disclosed herein generally include two semiconductor dies. The first die generally has little or no I/O or ESD protection and includes a first plurality of exposed terminals (e.g., bump pads). The second die generally includes (i) a se... | 10/05/2010 |
| 7808074 | Advanced leadframe having predefined bases for attaching passive components A leadframe includes at least one lead extending from an integrated circuit and terminating at a connector pin. The lead includes multiple predefined bases to connect to one or more components external to the integrated circuit. ... | 10/05/2010 |
| 7808073 | Network electronic component, semiconductor device incorporating network electronic component, and methods of manufacturing both A network electronic component comprises a network-electronic-component substrate, a thin-film passive element provided on the substrate, and a plurality of external connection electrodes provided on the substrate in connection with the thin-film passive element. | 10/05/2010 |
| 7786548 | Electric element, memory device, and semiconductor integrated circuit An electric element includes a first electrode (1), a second electrode (3), and a variable-resistance film (2) connected between the first electrode (1) and the second electrode (3). The variable-resistance film (2) contains... | 08/31/2010 |
| 7728405 | Carbon memory An integrated circuit including a memory cell and methods of manufacturing the integrated circuit are described. The memory cell includes a resistive memory element including a top contact, a bottom contact, and a carbon storage layer disposed between the top contac... | 06/01/2010 |
| 7723819 | Granular magnetic layer with planar insulating layer An embodiment of the present invention is a technique to fabricate a device using a magnetic layer. A magnetic layer having granular magnetic particles is formed. A planar insulating layer is deposited on the magnetic layer. The planar insulating layer has a planar ... | 05/25/2010 |
| 7675136 | Thin-film device including a terminal electrode connected to respective end faces of conductor layers A thin-film device incorporates a device main body and four terminal electrodes. The device main body has four side surfaces. The terminal electrodes are disposed to touch respective portions of the side surfaces. The device main body includes a lower conductor laye... | 03/09/2010 |
| 7659600 | Semiconductor device and method of manufacturing such a device The invention relates to a semiconductor device (10) with a semiconductor body (1) comprising a high-ohmic semiconductor substrate (2) which is covered with a dielectric layer (3) containing charges, on which dielectric layer one or more ... | 02/09/2010 |
| 7652347 | Semiconductor package having embedded passive elements and method for manufacturing the same A semiconductor package includes a base substrate on which a semiconductor chip is placed so that a first surface thereof faces the base substrate. A circuit section is formed adjacent to the first surface. An insulation layer is formed on a second surface of the se... | 01/26/2010 |
| 7573117 | Post last wiring level inductor using patterned plate process A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above the substrate; an insulative layer on and above the capping layer; a first layer of photo-imagable material on... | 08/11/2009 |
| 7557423 | Semiconductor structure with a discontinuous material density for reducing eddy currents A semiconductor structure includes an inductor; and a semiconductor substrate underlying the inductor, having a discontinuous material density across a plane underneath and in parallel with the inductor, thereby reducing eddy currents induced by an electrical curren... | 07/07/2009 |
| 7554172 | Multi-directional multiplexing radius convergence electrode An electrode plate for an electricity storage and discharge device, which includes a plurality of I/O convergence terminals evenly distributed along a periphery of the electrode plate, and a plurality of conductive structures, each conductive structure for one of th... | 06/30/2009 |
| 7528460 | Semiconductor device sealed with electrical insulation sealing member A semiconductor device capable of preventing contact between electrode terminals and a die pad as well as capable of surely performing wire bonding to the electrode terminals. A passive component is formed such that a vertical height of each electrode terminal is hi... | 05/05/2009 |
| 7459761 | High performance system-on-chip using post passivation process The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In ad... | 12/02/2008 |
| 7446388 | Integrated thin film capacitor/inductor/interconnect system and method A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. ... | 11/04/2008 |
| 7439606 | Method for manufacturing a passive integrated matching network for power amplifiers An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a first inductor bridging between the first and second dies, a second ... | 10/21/2008 |
| 7436069 | Semiconductor device, having a through electrode semiconductor module employing thereof and method for manufacturing semiconductor device having a through electrode The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film 105 is buried within the through hole 103. A ... | 10/14/2008 |
| 7436042 | Circuit for driving gate of power MOSFET A circuit for driving a gate of a power metal-oxide semiconductor field effect transistor (MOSFET), which uses a higher voltage than a gate controller is provided. The circuit is able to safely and effectively transmits an output signal of a gate controller irrespec... | 10/14/2008 |
| 7432555 | Testable electrostatic discharge protection circuits A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding... | 10/07/2008 |
| 7429779 | Semiconductor device having gate electrode connection to wiring layer A semiconductor device includes a semiconductor substrate having an electrode formed above a surface thereof; a first insulating resin layer that is provided over the semiconductor substrate and has a first opening defined at a position corresponding to the electrod... | 09/30/2008 |
| 7427801 | Integrated circuit transformer devices for on-chip millimeter-wave applications Methods are provided for building integrated circuit transformer devices having compact and optimized architectures for use in MMW (millimeter-wave) applications. The integrated circuit transformer devices have universal and scalable architectures that can be used a... | 09/23/2008 |
| 7425747 | Semiconductor device The present invention provides a miniaturized semiconductor device at low-cost having high integration density and for restraining an increase of an insertion loss and a deterioration of an isolation characteristic of a circuit resulting from parasitic inductance of... | 09/16/2008 |
| 7417300 | Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabrication thereof Electrically programmable fuse structures and methods of fabrication thereof are presented, wherein a fuse includes first and second terminal portions interconnected by an elongate fuse element. The first terminal portion has a maximum width greater than a maximum w... | 08/26/2008 |
| 7417299 | Direct connection multi-chip semiconductor element structure A direct connection multi-chip semiconductor element structure is proposed. A plurality of semiconductor chips are mounted and supported on a metal heat sink, such that heat generated by the chips during operation can be dissipated via the heat sink. A circuit struc... | 08/26/2008 |
| 7411270 | Composite capacitor and method for forming the same An electronic assembly (98) includes a substrate (20), a capacitor having first and second conductors (38,54) formed over the substrate, a first set of conductive members (76) formed over the substrate and being electrically connected to ... | 08/12/2008 |
| 7405138 | Manufacturing method of stack-type semiconductor device A semiconductor device capable mounting semiconductor elements having different functions without increasing the area of the semiconductor device, and its manufacturing method are presented. A part if wiring 104 is formed al so at the side surface of a semico... | 07/29/2008 |
| 7400035 | Semiconductor device having multilayer printed wiring board A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed ... | 07/15/2008 |
| 7394145 | Methods of fabricating passive element without planarizing and related semiconductor device Methods of fabricating a passive element and a semiconductor device including the passive element are disclosed including the use of a dummy passive element. A dummy passive element is a passive element or wire which is added to the chip layout to aid in planarizati... | 07/01/2008 |
| 7391110 | Apparatus for providing capacitive decoupling between on-die power and ground conductors One embodiment of the present invention provides capacitive decoupling on the surface of a semiconductor die, instead of providing the decoupling on a package or printed circuit board to which the semiconductor die is attached. In this embodiment, a surface of a sem... | 06/24/2008 |
| 7388274 | Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors Disclosed is a semiconductor structure that incorporates a capacitor for reducing the soft error rate of a device within the structure. The multi-layer semiconductor structure includes an insulator-filled deep trench isolation structure that is formed through an act... | 06/17/2008 |
