...that the Eveready Battery began as an invention called the "electric flowerpot," which was a tube with a battery and light bulb inside? The idea was to fasten this gizmo to the side of a flowerpot so it would illuminate the flowers from the bottom. The idea died on the vine and the businessman who licensed the flower pot, Conrad Huber, was left with a pile of useless tubes -- until he found a way to market them as batteries to light the world!
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| Number | Title | Issue Date |
| 8154103 | Semiconductor device A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a... | 04/10/2012 |
| 8125047 | Semiconductor device and method of manufacturing the same A semiconductor device comprises a buffer layer 16 of an i-InAlAs layer formed over an SI-InP substrate 14, insulating films 24, 36 of BCB formed over the buffer layer 16, and a coplanar interconnection including a signal line 52 a... | 02/28/2012 |
| 8125046 | Micro-electromechanical system devices Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first side... | 02/28/2012 |
| 8084840 | Interposer including air gap structure, methods of forming the same, semiconductor device including the interposer, and multi-chip package including the interposer Example embodiments of the present invention relate to an interposer of a semiconductor device having an air gap structure, a semiconductor device using the interposer, a multi-chip package using the interposer and methods of forming the interposer. The interposer i... | 12/27/2011 |
| 8080859 | Reducing stress between a substrate and a projecting electrode on the substrate The present invention relates to a semiconductor component that has a substrate and a projecting electrode. The projecting electrode has a substrate face, which faces the substrate and which comprises a first substrate-face section separated from the substrate by a ... | 12/20/2011 |
| 8022501 | Semiconductor device and method for isolating the same The present invention relates to a semiconductor device and a method for isolating the same. The semiconductor device includes: a silicon substrate provided with a trench including at least one silicon pillar at a bottom portion of the trench, wherein the silicon pi... | 09/20/2011 |
| 7956439 | Void boundary structures, semiconductor devices having the void boundary structures and methods of forming the same Void boundary structures, semiconductor devices having the void boundary structures, and methods of forming the same are provided. The structures, semiconductor devices and methods present a way for reducing parasitic capacitance between interconnections by forming ... | 06/07/2011 |
| 7944018 | Semiconductor devices with sealed, unlined trenches and methods of forming same A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor m... | 05/17/2011 |
| 7898057 | Radio frequency power semiconductor device package comprising dielectric platform and shielding plate A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region ove... | 03/01/2011 |
| 7868415 | Integrated circuit with an active area line having at least one form-supporting element and corresponding method of making an integrated circuit An integrated circuit is described. The integrated circuit may have: an active area line formed of a material of a semiconductor substrate with a first longitudinal direction parallel to an upper surface of the semiconductor substrate; wherein the active area line h... | 01/11/2011 |
| 7868416 | Semiconductor device A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a... | 01/11/2011 |
| 7847369 | Radio frequency power semiconductor device comprising matrix of cavities as dielectric isolation structure A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region ove... | 12/07/2010 |
| 7777295 | Semiconductor structure and method of manufacture In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a structure includes a dielectric material and a void below a surface of a substrate. The structure further includes a doped dielectric mat... | 08/17/2010 |
| 7732891 | Semiconductor device A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a... | 06/08/2010 |
| 7692264 | Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same are provided. A gate insulating film is formed under a vacuum condition to prevent deterioration of reliability of the device due to degradation of a gate insulating material and to have stable operating... | 04/06/2010 |
| 7671442 | Air-gap insulated interconnections Air-gap insulated interconnection structures and methods of fabricating the structures, the methods including: forming a dielectric layer on a substrate; forming a capping layer on a top surface of the dielectric layer; forming a trench through the capping layer, th... | 03/02/2010 |
| 7649239 | Dielectric spacers for metal interconnects and method to form the same A plurality of metal interconnects incorporating dielectric spacers and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers adjacent to neighboring metal interconnects are discontiguous from one another. In another embod... | 01/19/2010 |
| 7608909 | Suspended transmission line structures in back end of line processing A method for forming a transmission line structure for a semiconductor device includes forming an interlevel dielectric layer over a first metallization level, removing a portion of the interlevel dielectric layer and forming a sacrificial material within one or mor... | 10/27/2009 |
| 7605443 | Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods The present invention relates to a method of manufacturing a semiconductor substrate, which enables a semiconductor device to have high speed operating characteristics and high performance characteristics such as lower electrical power consumption, and a method of m... | 10/20/2009 |
| 7602038 | Damascene structure having a reduced permittivity and manufacturing method thereof A semiconductor device includes a damascene structure and an air gap embedded in the damascene dielectric layer. A method of manufacturing a semiconductor device includes depositing a metal barrier in advance as an etch stop, forming a copper damascene interconnect ... | 10/13/2009 |
| 7592685 | Device and methodology for reducing effective dielectric constant in semiconductor devices Semiconductor structure includes an insulator layer having at least one interconnect feature and at least one gap formed in the insulator layer spanning more than a minimum spacing of interconnects. ... | 09/22/2009 |
| 7569906 | Method for fabricating condenser microphone and condenser microphone A first semiconductor chip includes a fixed electrode formed on a first semiconductor substrate and a plurality of first metal spacers formed on a first interlayer dielectric. A second semiconductor chip includes a vibrating electrode formed on a second semiconducto... | 08/04/2009 |
| 7566945 | Semiconductor devices including nanotubes Nano semiconductor switch devices are provided that include a semiconductor substrate and a conductive layer on the semiconductor substrate. A first insulating layer is provided on the conductive layer and the semiconductor substrate. The first insulating layer defi... | 07/28/2009 |
| 7492030 | Techniques to create low K ILD forming voids between metal lines One aspect of the present subject matter relates to a method for forming an interlayer dielectric (ILD). In various embodiments of the method, an insulator layer is formed, at least one trench is formed in the insulator layer, and a metal layer is formed in the at l... | 02/17/2009 |
| 7439605 | Semiconductor device and method for manufacturing the same A semiconductor device include a plurality of active element cells including first element regions of a first conductivity type and second element regions of a second conductivity type, the second element regions disposed between the first element regions; and isola... | 10/21/2008 |
| 7404247 | Method for making a pressure sensor A method for making a pressure sensor including the steps of providing a substrate and forming or locating a pressure sensing component on the substrate. The method further includes the step of, after the forming or locating step, etching a cavity in the substrate b... | 07/29/2008 |
| 7405459 | Semiconductor device comprising porous film The present invention provides a zeolite sol which can be formed into a porous film that can be thinned to an intended thickness by a method used in the ordinary semiconductor process, that excels in dielectric properties, adhesion, film consistency and mechanical s... | 07/29/2008 |
| 7402886 | Memory with self-aligned trenches for narrow gap isolation regions Self-aligned trench filling is used to isolate devices in high-density integrated circuits. A deep, narrow trench isolation region is formed in a substrate between devices. The trench region includes two trench portions. A first trench portion, located above a secon... | 07/22/2008 |
| 7400024 | Formation of deep trench airgaps and related applications A method for forming deep trench or via airgaps in a semiconductor substrate is disclosed comprising the steps of patterning a hole in the substrate, partly fill said hole with a sacrificial material (e.g. poly-Si), depositing spacers on the sidewalls of the unfille... | 07/15/2008 |
| 7394144 | Trench semiconductor device and method of manufacturing it Consistent with an example embodiment, a reduced surface field effect type (RESURF) semiconductor device is manufactured having a drift region over a drain region. Trenches are formed through openings in mask. A trench insulating layer is deposited on the sidewalls ... | 07/01/2008 |
| 7372155 | Top layers of metal for high performance IC's A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length-by making efficient use of polyimide or polymer as an ... | 05/13/2008 |
| 7372085 | Top layers of metal for high performance IC's A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an ... | 05/13/2008 |
| 7361452 | Methods for forming a metal line in a semiconductor manufacturing process In a disclosed method for manufacturing a semiconductor device, a lower insulating layer, a lower metal line and an upper insulating layer are sequentially stacked. A first photosensitive film is patterned on the upper insulating layer and the upper insulating layer... | 04/22/2008 |
| 7361991 | Closed air gap interconnect structure A closed air gap interconnect structure is described. The structure includes discrete regions of a permanent support dielectric under the interconnect lines so that the lines are substantially surrounded by air except for the discrete regions of the support dielectr... | 04/22/2008 |
| 7351354 | Tungsten metal removing solution and method for removing tungsten metal by use thereof A removing solution for removing tungsten metal which causes a film formation on a semiconductor substrate or adheres to it, wherein orthoperiodic acid and water are contained. ... | 04/01/2008 |
| 7352019 | Capacitance reduction by tunnel formation for use with a semiconductor device A method used during the manufacture of a semiconductor device comprises providing at least first, second, and third spaced conductive structures, where the second conductive structure is interposed between the first and third conductive structures. A first dielectr... | 04/01/2008 |
| 7351661 | Semiconductor device having trench isolation layer and a method of forming the same A semiconductor device having a trench isolation layer in a semiconductor substrate is provided, wherein the trench isolation layer includes a silicon nitride liner, a silicon oxide liner; and a buried layer, wherein the buried layer includes a first buried layer fo... | 04/01/2008 |
| 7339253 | Retrograde trench isolation structures Methods are provided for making retrograde trench isolation structures with improved electrical insulation properties. One method comprises the steps of: forming a retrograde trench in a silicon substrate, and forming a layer of silicon oxide on the walls of the tre... | 03/04/2008 |
| 7335931 | Monolithic microwave integrated circuit compatible FET structure A field effect transistor structure includes a single crystal substrate having: a source, gate and drain electrodes disposed on an upper surface of the substrate, the gate electrode having a region thereof disposed between a region of the drain electrode and a regio... | 02/26/2008 |
| 7335965 | Packaging of electronic chips with air-bridge structures A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A circuit assembly comprises an electronic chip and a conductive structur... | 02/26/2008 |