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| Number | Title | Issue Date |
| 8188566 | Semiconductor integrated circuit device The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming portion is provided on the second P type epitaxial layer. A first P t... | 05/29/2012 |
| 8093679 | Integrated BEOL thin film resistor In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a controllable amount, so that the top of a resistor layer deposited in th... | 01/10/2012 |
| 7977763 | Chip package with die and substrate A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glass sandwiche... | 07/12/2011 |
| 7973383 | Semiconductor integrated circuit device having a decoupling capacitor The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming portion is provided on the second P type epitaxial layer. A first P t... | 07/05/2011 |
| 7956438 | Integrated capacitor with interlinked lateral fins A capacitor in an integrated circuit (“IC”) has a first node conductor formed in a first metal layer of the IC with a first spine extending along a first direction, a first vertical element extending from the first spine along a second direction perpendicular to... | 06/07/2011 |
| 7948053 | Semiconductor device and method of fabricating the same A semiconductor device includes a first insulating film, paired resistance elements each of which includes a first conductive film formed on the first insulating film, a second insulating film formed on the first conductive film and a second conductive film formed o... | 05/24/2011 |
| 7902629 | Integrated BEOL thin film resistor In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a controllable amount, so that the top of a resistor layer deposited in th... | 03/08/2011 |
| 7821099 | Structure for low capacitance ESD robust diodes A diode having a capacitance below 0.1 pF and a breakdown voltage of at least 500V. The diode has an anode of a first conductivity type and a cathode of a second conductivity type disposed below the anode. At least one of the cathode and anode have multiple, vertica... | 10/26/2010 |
| 7432580 | Semiconductor device with a substrate having a spiral shaped coil A semiconductor apparatus comprises a substrate, a semiconductor chip fixedly secured on one side of the substrate, a spirally shaped coil formed on the other side of the substrate and electrically connected to the semiconductor chip, and a conductive pattern formed... | 10/07/2008 |
| 7432555 | Testable electrostatic discharge protection circuits A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding... | 10/07/2008 |
| 7425744 | Fabricating logic and memory elements using multiple gate layers Various embodiments are directed to different methods and systems relating to design and implementation of memory cells such as, for example, static random access memory (SRAM) cells. In one embodiment, a memory cell may include a first layer of conductive material ... | 09/16/2008 |
| 7408239 | Capture of residual refractory metal within semiconductor device There is provided a semiconductor device with a configuration in which a dummy silicide area 11 is provided in the vicinity of a non-silicide area 2 to easily capture residual refractory metals, resulting in an improved yield by preventing the trapping... | 08/05/2008 |
| 7400027 | Nonvolatile memory device having two or more resistance elements and methods of forming and using the same A nonvolatile memory device having two or more resistors and methods of forming and using the same. A nonvolatile memory device having two resistance layers, and more particularly, to a nonvolatile memory device formed and operated using a resistance layer having me... | 07/15/2008 |
| 7397105 | Apparatus to passivate inductively or capacitively coupled surface currents under capacitor structures A deep n-well is formed beneath the area of a capacitor structure. The use of a deep n-well lessens the parasitic capacitance by placing a diode in series with the interlayer dielectric cap. The deep n-well also reduces substrate noise. Once the n-well is implanted ... | 07/08/2008 |
| 7394110 | Planar vertical resistor and bond pad resistor Resistors that avoid the problems of miniaturization of semiconductor devices and a related method are disclosed. In one embodiment, a resistor includes a planar resistor material that extends vertically within at least one metal layer of a semiconductor device. In ... | 07/01/2008 |
| 7391082 | Semiconductor integrated circuit having resistor A semiconductor integrated circuit having a resistor is disclosed in which the resistor is formed by a series connection of one element having a positive temperature coefficient and another element having a negative temperature coefficient. ... | 06/24/2008 |
| 7358591 | Capacitor device and semiconductor device having the same, and capacitor device manufacturing method In a capacitor device of the present invention, a capacitor parts that has a pair of terminals on both end sides respectively is embedded in an insulating film in a state that a lower surface of the capacitor parts is not covered with the insulating film, then upper... | 04/15/2008 |
| 7355265 | Semiconductor integrated circuit A semiconductor integrated circuit comprising a power supply wiring and a ground wiring and a decoupling capacitor formed between the power supply wiring and the ground wiring, wherein at least one electrode of the decoupling capacitor consists of a shield layer for... | 04/08/2008 |
| 7348653 | Resistive memory cell, method for forming the same and resistive memory array using the same A resistive memory cell employs a photoimageable switchable material, which is patternable by actinic irradiation and is reversibly switchable between distinguishable resistance states, as a memory element. Thus, the photoimageable switchable material is directly pa... | 03/25/2008 |
| 7345573 | Integration of thin film resistors having different TCRs into single die An integrated circuit structure including multiple thin film resistors having different sheet resistances and TCRs includes a first oxide layer (2) formed on a semiconductor substrate (1), a first thin film resistor (3) disposed on the first oxi... | 03/18/2008 |
| 7321149 | Capacitor structures, and DRAM arrays A patterned mask can be formed as follows. A first patterned photoresist is formed over a masking layer and utilized during a first etch into the masking layer. The first etch extends to a depth in the masking layer that is less than entirely through the masking lay... | 01/22/2008 |
| 7319254 | Semiconductor memory device having resistor and method of fabricating the same A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form first molding holes and a second molding hole in the mold layer. A stor... | 01/15/2008 |
| 7317221 | High density MIM capacitor structure and fabrication process A stacked integrated circuit (IC) MIM capacitor structure and method for forming the same the MIM capacitor structure including a first MIM capacitor structure formed in a first IMD layer comprising an first upper and first lower electrode portions; at least a secon... | 01/08/2008 |
| 7310595 | Numerically modeling inductive circuit elements A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces model simulation time by a factor of 3000. In one embodiment, simulat... | 12/18/2007 |
| 7298018 | PLT/PZT ferroelectric structure An electrically stable PbLa0.5TiO3/PbZr0.52Ti0.48O3 (PLT/PZT) ferroelectric structure may fabricated using precursor solutions formed using a simple sol-gel process. The PLT/PZT ferroelectric structure may be ex... | 11/20/2007 |
| 7288826 | Semiconductor integrated circuit device The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming portion is provided on the second P type epitaxial layer. A first P t... | 10/30/2007 |
| 7282803 | Integrated electronic circuit comprising a capacitor and a planar interference inhibiting metallic screen An electronic circuit includes a substrate. A capacitor and at least one semiconductor component are supported by a surface of the substrate. A substantially planar screen, oriented parallel to the surface of the substrate and made of metallic material, is placed be... | 10/16/2007 |
| 7279765 | Transparent electrode made from indium-zinc-oxide and etchant for etching the same A pixel electrode employs a transparent electrode made from indium-zinc-oxide (IZO) that is capable of preventing damage and bending thereof. In a liquid crystal display device containing pixel electrodes, the transparent electrode is made from indium-zinc-oxide (IZ... | 10/09/2007 |
| 7279771 | Wiring board mounting a capacitor In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via conductors formed to pierce the insulating layers in the direction of ... | 10/09/2007 |
| 7276767 | Thin film resistor device and a method of manufacture therefor The present invention provides a thin film resistor and method of manufacture therefor. The thin film resistor comprises a resistive layer located on a first dielectric layer, first and second contact pads located on the resistive layer, and a second dielectric laye... | 10/02/2007 |
| 7268410 | Integrated switching voltage regulator using copper process technology Improvements in the level of integration of a core buck and/or boost DC-DC voltage regulator sub-circuit lead to a lower manufacturing cost structure, an improved performance from lessened intrinsic parasitic resistance, a smaller die size and, thus, higher wafer yi... | 09/11/2007 |
| 7262481 | Fill structures for use with a semiconductor integrated circuit inductor A semiconductor integrated circuit includes an inductor formed by a conductive loop that is fabricated on one or more metal layers. The inductor also includes a dielectric region provided adjacent to the conductive loop. The semiconductor integrated circuit may also... | 08/28/2007 |
| 7247922 | Inductor energy loss reduction techniques An inductive device including an inductor coil located over a substrate, at least one electrically insulating layer interposing the inductor coil and the substrate, and a plurality of current interrupters each extending into the substrate, wherein a first aggregate ... | 07/24/2007 |
| 7242087 | Flexible printed circuit board A flexible printed circuit board includes a substrate layer composed of insulating material, a protection circuit of a thin-film capacitor element, the protection circuit including a first wiring layer on the substrate layer, a dielectric layer, and a counter electr... | 07/10/2007 |
| 7227212 | Method of forming a floating metal structure in an integrated circuit In one embodiment, a sacrificial layer is deposited over a base layer. The sacrificial layer is used to define a subsequently formed floating metal structure. The floating metal structure may be anchored into the base layer. Once the floating metal structure is form... | 06/05/2007 |
| 7224232 | RF power amplifier and method for packaging the same A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switchi... | 05/29/2007 |
| 7220921 | Sheet-like board member and method of manufacturing a semiconductor device In the present invention there is formed a sheet-like board member 50 having conductive coating films, such as first pads 55 and die pads 59, formed thereon or a sheet-like board member 50 which has been half-etched by using conductive co... | 05/22/2007 |
| 7208931 | Constant current generating circuit using resistor formed of metal thin film A circuit for generating a constant current includes a reference voltage generating circuit configured to generate a reference voltage and a constant current circuit including one or more resistors configured to determine an amount of an electric current generated i... | 04/24/2007 |
| 7208814 | Resistive device and method for its production A resistive device includes a resistive region of a semiconductor material that includes a first region and a second region, wherein the first region has a higher dopant concentration than the second region, and wherein a resistance-determining width of a current pa... | 04/24/2007 |
| 7208789 | DRAM cell structure with buried surrounding capacitor and process for manufacturing the same A memory device that includes a semiconductor substrate, and an array of memory cells, each cell being electrically isolated from adjacent cells and including an island formed from the substrate, the island having a top portion and at least one sidewall portion, and... | 04/24/2007 |
