Class 257/508 - With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein a metallic (metal or metal-like)
No. of patents: 414
Last issue date: 05/29/2012

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Number	Title	Issue Date
8188565	Semiconductor chip and shielding structure thereof A semiconductor chip including a substrate, a metal interconnection structure and a circuit region is provided. The substrate has at least one dielectric ring on a substrate surface of the substrate. The metal interconnection structure is disposed on the substrate s...	05/29/2012
8093677	Semiconductor device and manufacturing method A semiconductor device and manufacturing method is disclosed. One embodiment provides a common substrate of a first conductivity type and at least two wells of a second conductivity type. A buried high resistivity region and at least an insulating structure is provi...	01/10/2012
8084839	Circuit board having conductive shield member and semiconductor package using the same A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents disto...	12/27/2011
8049296	Semiconductor wafer A deep isolation trench extending from the main surface of a substrate to a desired depth is formed on the substrate with an insulating film in buried in it to form a through isolation portion. Subsequently, after a MOSFET is formed on the main surface of the substr...	11/01/2011
8018023	Trench sidewall protection by a carbon-rich layer in a semiconductor device When forming a trench in a porous low-K dielectric (such as an ILD) of a semiconductor device, a carbon-rich layer is formed in the sidewalls of the trench during trench etching. This carbon-rich layer may protect the trench from being excessively etched, which woul...	09/13/2011
8008744	Selective STI stress relaxation through ion implantation A first example embodiment comprises the following steps and the structure formed therefrom. A trench having opposing sidewalls is formed within a substrate. A stress layer having an inherent stress is formed over the opposing trench sidewalls. The stress layer havi...	08/30/2011
7994606	De-coupling capacitors produced by utilizing dummy conductive structures integrated circuits A de-coupling capacitor module using dummy conductive elements in an integrated circuit is disclosed. The de-coupling module comprises at least one circuit module having one or more active nodes, and at least one dummy conductive element unconnected to any active no...	08/09/2011
7982281	Method of manufacturing a semiconductor device, method of manufacturing a SOI device, semiconductor device, and SOI device According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer being disposed on or above the substrate layer, a buried layer being disposed on or above the substrate i...	07/19/2011
7968965	Semiconductor device and method for fabricating the same Embodiments relate to a semiconductor device and a method for fabricating the same. According to embodiments, a semiconductor device may include a first device, a silicon epitaxial layer formed on and/or over the first device, a second device formed on and/or over t...	06/28/2011
7939908	High-voltage transistor having shielding gate A semiconductor device includes a plurality of high-voltage insulated-gate field-effect transistors arranged in a matrix form on the main surface of a semiconductor substrate and each having a gate electrode, a gate electrode contact formed on the gate electrode, an...	05/10/2011
7923808	Structure of very high insertion loss of the substrate noise decoupling A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region...	04/12/2011
7923809	Semiconductor device having shield structure A semiconductor device comprises a semiconductor substrate; a diffusion layer formed on the semiconductor substrate; at least two wiring layers formed opposite to each other over the semiconductor substrate; signal lines for transmitting a signal maintaining a prede...	04/12/2011
7911022	Isolation structure in field device A semiconductor device. The semiconductor device comprises an isolation structure and two heavily doped regions of a second conductivity type spaced apart from each other by the isolation structure. The isolation structure comprises an isolation region in a semicond...	03/22/2011
7868413	Semiconductor device It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention ...	01/11/2011
7868412	Semiconductor device and method of fabricating the same A semiconductor device according to an embodiment of the invention includes: a semiconductor substrate; a well, having a well contact connection region, formed in the semiconductor substrate; a transistor formed on the well; an isolation region formed between the tr...	01/11/2011
7855428	Conductive liner at an interface between a shallow trench isolation structure and a buried oxide layer The invention relates to a design structure, and more particularly, to a design structure for a conductive liner for rad hard total dose immunity and a structure thereof. The structure includes at least one shallow trench isolation structure having oxide material an...	12/21/2010
7847368	Multilayer film with stack of nanometer-scale thicknesses This disclosure describes system(s) and/or method(s) enabling contacts for individual nanometer-scale-thickness layers of a multilayer film. ...	12/07/2010
7847367	Semiconductor devices having a gate electrode and methods of fabricating the same An integrated circuit device includes an integrated circuit substrate and a first gate pattern on the substrate. A non-conductive barrier layer pattern is on the first gate pattern. The barrier layer pattern has openings at selected locations therein extending to th...	12/07/2010
7843033	Shielded integrated circuit pad structure An integrated circuit pad structure includes a ground strip (206) positioned below a pad (101). In one example a conductive element (102) is coupled to the pad (101), and at least two tiled layers, positioned below the first conductive el...	11/30/2010
7808072	Circuit board having conductive shield member and semiconductor package using the same A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents disto...	10/05/2010
7800197	Semiconductor device and method of fabricating the same The present invention relates to a semiconductor device and a method of manufacture thereof, being capable of improving the high integration by increasing a cell region while securing the reliability of device and the process margin through forming a cell region and...	09/21/2010
7786546	System-on-chip with shield rings for shielding functional blocks therein from electromagnetic interference A system-on-chip (SoC) that is immune to electromagnetic interference has block shield rings fabricated therein. The SoC includes a microprocessor core; an on-chip bus interface; an embedded memory block; and an analog/mixed-signal integrated circuit shielded by an ...	08/31/2010
7755160	Plasma excited chemical vapor deposition method silicon/oxygen/nitrogen-containing-material and layered assembly A method for producing a layer arrangement is disclosed. A layer of oxygen material and nitrogen material is formed over a substrate that has a plurality of electrically conductive structures and/or over a part of a surface of the electrically conductive structures....	07/13/2010
7741696	Semiconductor integrated circuit including metal mesh structure A metal mesh structure for use in an integrated circuit is described. In one embodiment, a semiconductor integrated circuit includes a first region including, for example, a device layer having one or more active semiconductor devices. The circuit also includes a se...	06/22/2010
7719079	Chip carrier substrate capacitor and method for fabrication thereof A chip carrier substrate includes a capacitor aperture and a laterally separated via aperture, each located within a substrate. The capacitor aperture is formed with a narrower linewidth and shallower depth than the via aperture incident to a microloading effect wit...	05/18/2010
7701034	Dummy patterns in integrated circuit fabrication An embodiment of the invention provides a semiconductor integrated circuit device having a dummy pattern for improving micro-loading effects. The device comprises an active region in a substrate and an isolation region in the substrate adjacent the active region. A ...	04/20/2010
7687877	Interconnect structure with a mushroom-shaped oxide capping layer and method for fabricating same An interconnect structure is provided that includes a dielectric material 52′ having a dielectric constant of 4.0 or less and including a plurality of conductive features 56 embedded therein. The dielectric material 52′ has an upper surface ...	03/30/2010
7659598	Semiconductor ground shield A ground shield is disclosed that includes a ‘cheesed’ metal positioned within a dielectric layer and a metal region positioned within a first metal level over the cheesed metal. The ground shield can have different forms depending on the metal used, and provisi...	02/09/2010
7659597	Integrated circuit wire patterns including integral plug portions An integrated circuit device includes a substrate including a trench therein and a conductive plug wire pattern in the trench. The conductive plug wire pattern includes a recessed portion that exposes portions of opposing sidewalls of the trench, and an integral plu...	02/09/2010
7652344	Semiconductor device A semiconductor device that can suppress noise transmission through a seal ring provided between two device regions. The semiconductor device includes a logic unit and an analog unit. The semiconductor device further includes a silicon substrate, an insulating inter...	01/26/2010
7638854	Semiconductor device, display module, and manufacturing method of semiconductor device A semiconductor device is provided that includes wiring patterns on a substrate formed of an organic insulating film, and a semiconductor chip mounted on the substrate. A liquid crystal display panel and a PW board are electrically connected to each other with an an...	12/29/2009
7615841	Design structure for coupling noise prevention A semiconductor structure for preventing coupling noise in integrated circuits and a method of forming the same are provided. The semiconductor structure includes a signal-grounded seal ring. The seal ring includes a plurality of metal lines, each in a respective me...	11/10/2009
7564115	Tapered through-silicon via structure An integrated circuit structure includes a substrate; a through-silicon via (TSV) in the substrate, the TSV being tapered; a hard mask region extending from a top surface of the substrate into the substrate, wherein the hard mask encircles a top portion of the TSV; ...	07/21/2009
7525174	High performance system-on-chip using post passivation process The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In ad...	04/28/2009
7501690	Semiconductor ground shield method A ground shield is disclosed that includes a ‘cheesed’ metal positioned within a dielectric layer and a metal region positioned within a first metal level over the cheesed metal. The ground shield can have different forms depending on the metal used, and provisi...	03/10/2009
7479687	Deep via seed repair using electroless plating chemistry Methods of forming a continuous seed layer in a high aspect via and its associated structures are described. Those methods comprise forming a recess in a substrate, forming a non-continuous metal layer within the recess, activating the non-continuous metal layer and...	01/20/2009
7466007	Post passivation interconnection schemes on top of IC chip A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over...	12/16/2008
7439604	Method of forming dual gate dielectric layer A semiconductor device includes a dual gate dielectric layer that increases a performance of a semiconductor device. The semiconductor device includes a first dielectric layer having a predetermined thickness on a semiconductor substrate. The first dielectric layer ...	10/21/2008
7382015	Semiconductor device including an element isolation portion having a recess A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isol...	06/03/2008
7375411	Method and structure for forming relatively dense conductive layers A region of high metal density may be placed in metal layers proximate to an area of low metal density below an inductor on an integrated circuit without violating manufacturing design rules for reducing manufacturing defects and without substantially impacting perf...	05/20/2008

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Class 257/508 - With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)