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Napoleon Bonaparte ; When told of the Robert Fulton steamboat
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| Number | Title | Issue Date |
| 8138570 | Isolated junction field-effect transistor An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This str... | 03/20/2012 |
| 8129815 | High-voltage transistor device with integrated resistor A high-voltage device structure comprises a resistor coupled to a tap transistor that includes a JFET in a configuration wherein a voltage provided at a terminal of the JFET is substantially proportional to an external voltage when the external voltage is less than ... | 03/06/2012 |
| 8125044 | Semiconductor structure having a unidirectional and a bidirectional device and method of manufacture In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor... | 02/28/2012 |
| 8044487 | Semiconductor device and method of manufacturing the same A semiconductor device including a high voltage element and a low voltage element, including: a semiconductor substrate having high voltage element region where the high voltage element is formed, and a low voltage element region where the low voltage element is for... | 10/25/2011 |
| 8013416 | Semiconductor device This semiconductor device includes a first device and a second device provided on a semiconductor substrate and having different breakdown voltages. More specifically, the semiconductor device includes a semiconductor substrate, a first region defined on the semicon... | 09/06/2011 |
| 7994603 | Semiconductor device and a method of manufacturing the same Disclosed herein is a semiconductor device, including: a first group of transistors formed on a semiconductor substrate; and a second group of transistors formed on the semiconductor substrate, each of which is lower in operating voltage than each of the transistors... | 08/09/2011 |
| 7939907 | Semiconductor device including a digital semiconductor element and an analog semiconductor element in a common semiconductor device High density mounting and power source sharing are achieved by a digital semiconductor element and an analog semiconductor element provided in a common semiconductor device. A power layer for analog operation is connected to one end of an EBG (Electromagnetic Band G... | 05/10/2011 |
| 7923805 | Semiconductor device including high voltage and low voltage MOS devices Methods and devices for forming both high-voltage and low-voltage transistors on a common substrate using a reduced number of processing steps are disclosed. An exemplary method includes forming at least a first high-voltage transistor well and a first low-voltage t... | 04/12/2011 |
| 7906828 | High-voltage integrated circuit device including high-voltage resistant diode A high-voltage integrated circuit includes a low-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a ground voltage, a high-voltage circuit region having a plurality of semiconductor devices, which operate with respect... | 03/15/2011 |
| 7893517 | Semiconductor device with block layer and method of manufacturing the same A semiconductor memory device includes a well layer having a first conductivity type and formed in a semiconductor substrate, a block layer formed in a trench and formed of an insulating layer, a gate electrode formed on the semiconductor substrate apart from the bl... | 02/22/2011 |
| 7888768 | Power integrated circuit device having embedded high-side power switch In one embodiment, a power integrated circuit device is provided. The power integrated circuit device includes a high-side power switch having a high voltage transistor and a low voltage transistor. The high voltage transistor has a gate, a source, and a drain, and ... | 02/15/2011 |
| 7859078 | Thin film transistor device and method of manufacturing the same A first insulating film is formed. Then, a gate electrode of a low voltage drive thin film transistor and a mask film for covering a region constituting a channel of a high voltage drive thin film transistor are formed with a molybdenum film on the first insulating ... | 12/28/2010 |
| 7847365 | MOSFET with isolation structure for monolithic integration and fabrication method thereof A MOSFET device with an isolation structure for a monolithic integration is provided. A P-type MOSFET includes a first N-well disposed in a P-type substrate, a first P-type region disposed in the first N-well, a P+ drain region disposed in the first P-type region, a... | 12/07/2010 |
| 7838960 | Integrated circuit device and electronic instrument An integrated circuit device includes a high-speed I/F circuit block which transfers data through a serial bus, and a driver logic circuit block which generates a display control signal. A first-conductivity-type transistor included in the high-speed I/F circuit blo... | 11/23/2010 |
| 7825488 | Isolation structures for integrated circuits and modular methods of forming the same A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be ... | 11/02/2010 |
| 7816757 | Semiconductor device including a digital semiconductor element and an analog semiconductor element in a common semiconductor device High density mounting and power source sharing are achieved by a digital semiconductor element and an analog semiconductor element provided in a common semiconductor device. A power layer for analog operation is connected to one end of an EBG (Electromagnetic Band G... | 10/19/2010 |
| 7808071 | Semiconductor device having improved oxide thickness at a shallow trench isolation edge and method of manufacture thereof One aspect of a semiconductor device includes an active region located in a semiconductor substrate and having an isolation region located therebetween. The active regions have corners adjacent the isolation region. An oxide layer is located over the active regions ... | 10/05/2010 |
| 7808070 | Power semiconductor component A power semiconductor component is disclosed. One embodiment provides a semiconductor body, in which at least two vertical power semiconductor components are arranged. Each of the vertical power semiconductor components has a first load terminal arranged at a front ... | 10/05/2010 |
| 7768094 | Semiconductor integrated circuit and wafer having diffusion regions differing in thickness and method for manufacturing the same A semiconductor integrated circuit includes a rectangular low speed circuit area including a low speed circuit comprising a low speed transistor having a first source extension region and a first drain extension region, and a rectangular high speed circuit area adja... | 08/03/2010 |
| 7745902 | System and method for providing improved trench isolation of semiconductor devices A system and method is disclosed for providing improved trench isolation of semiconductor devices. An isolation trench of the present invention is manufactured as follows. A substrate of a semiconductor device is provided and a trench is etched in the substrate. The... | 06/29/2010 |
| 7741694 | Semiconductor integrated circuit device A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion reg... | 06/22/2010 |
| 7732890 | Integrated circuit with high voltage junction structure The high voltage integrated circuit comprises a P substrate. An N well barrier is disposed in the substrate. Separated P diffusion regions forming P wells are disposed in the substrate for serving as the isolation structures. The low voltage control circuit is locat... | 06/08/2010 |
| 7719077 | Method for the production of a semiconductor component Disclosed is a method for the production of a semiconductor component provided with at least one first vertical power component (5,9) and at least one lateral, active component (6) and/or at least one second vertical power component (10) between... | 05/18/2010 |
| 7671441 | Trench MOSFET with sidewall spacer gates A semiconductor power device includes a semiconductor body with a plurality of gate trenches formed therein. Disposed within each gate trench is a spacer gate that extends along at least a portion of the sidewalls of the gate trench but not along at least a portion ... | 03/02/2010 |
| 7656004 | Display device A display device includes a display panel, first and second gate drivers and a data driver. The display panel includes pixel regions respectively having first, second and third pixels. The first pixel is coupled to first, second gate lines and a data line. The secon... | 02/02/2010 |
| 7592684 | Semiconductor device and method for manufacturing the same A semiconductor device is provided in which high breakdown voltage transistors and low voltage driving transistors are formed on the same substrate. The device includes a semiconductor layer, first element isolation regions for defining a high breakdown voltage tran... | 09/22/2009 |
| 7560792 | Reliable high voltage gate dielectric layers using a dual nitridation process Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric laye... | 07/14/2009 |
| 7545018 | High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof A high voltage operating field effect transistor has a substrate, a source region and a drain region which are spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the s... | 06/09/2009 |
| 7525172 | Semiconductor device Disclosed is a semiconductor device has a semiconductor substrate of a first conductivity type in which at least a first element-forming region and a second element-forming region are formed. Wells are formed in respective ones of the element-forming regions of the ... | 04/28/2009 |
| 7518209 | Isolation of a high-voltage diode between a high-voltage region and a low-voltage region of an integrated circuit Provided is a high-voltage integrated circuit device including a high-voltage resistant diode. The device includes a low-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a ground voltage, a high-voltage circuit region... | 04/14/2009 |
| 7514761 | Triple operation voltage device A triple operation voltage device including a first type substrate, a high voltage (HV) first type well, a second type well, a low voltage (LV) device well, and a middle voltage (MV) device well is provided. The HV first type well is disposed inside the first type s... | 04/07/2009 |
| 7508048 | Methods of fabricating a semiconductor device having multi-gate insulation layers and semiconductor devices fabricated thereby Methods of fabricating a semiconductor device having multi-gate insulation layers and semiconductor devices fabricated thereby are provided. The method includes forming a pad insulation layer and an initial high voltage gate insulation layer on a first region and a ... | 03/24/2009 |
| 7498653 | Semiconductor structure for isolating integrated circuits of various operating voltages A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits on a semiconductor substrate. A buried layer continuously extending underneath the fi... | 03/03/2009 |
| 7489016 | Trench-constrained isolation diffusion for integrated circuit die A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices ... | 02/10/2009 |
| 7439134 | Method for process integration of non-volatile memory cell transistors with transistors of another type A method for making a semiconductor device having non-volatile memory cell transistors and transistors of another type is provided. In the method, a substrate is provided having an NVM region, a high voltage (HV) region, and a low voltage (LV) region. The method inc... | 10/21/2008 |
| 7436043 | N-well and Nburied layer isolation by auto doping to reduce chip size A semiconductor device includes multiple low voltage N-well (LVNW) areas biased at different potentials and isolated from a substrate by a common N+ buried layer (NBL) and at least one high voltage N-well (HVNW) area. The LVNW areas are coupled to the com... | 10/14/2008 |
| 7417296 | Dielectric isolation type semiconductor device A dielectric isolation type semiconductor device can achieve high dielectric resistance while preventing the dielectric strength thereof from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A drift N | 08/26/2008 |
| 7405460 | Semiconductor device having a plurality of kinds of wells and manufacturing method thereof A semiconductor device has a configuration in which more than three kinds of wells are formed with small level differences. One kind of well from among the more than three kinds of wells has a surface level higher than other kinds of wells from among the more than t... | 07/29/2008 |
| 7402884 | Low crosstalk substrate for mixed-signal integrated circuits An integrated circuit laminate with a metal substrate for use with high performance mixed signal integrated circuit applications. The metal substrate provides substantially improved crosstalk isolation, enhanced heat sinking and an easy access to a true low impedanc... | 07/22/2008 |
| 7400013 | High-voltage transistor having a U-shaped gate and method for forming same According to one exemplary embodiment, a method includes forming first, second, and third shallow trench isolation regions in a substrate, wherein the second shallow trench isolation region is situated between the first and the third shallow trench isolation regions... | 07/15/2008 |
