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| Number | Title | Issue Date |
| 8080858 | Semiconductor component having a space saving edge structure A Semiconductor component having a space saving edge structure is disclosed. One embodiment provides a first side, a second side, an inner region, an edge region adjoining the inner region in a lateral direction of the semiconductor body, and a first semiconductor l... | 12/20/2011 |
| 8076748 | Semiconductor device A semiconductor device is provided having a high performance resistance element. In an N-type well isolated by an insulating film, two higher concentration N-type regions are formed. An interlayer insulating film is also formed. In a plurality of openings in the int... | 12/13/2011 |
| 8049295 | Coupling well structure for improving HVMOS performance A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and ad... | 11/01/2011 |
| 7973382 | Semiconductor device A gate electrode 20 and first field plates 22a to 22d and 23 are provided on a field oxide film 19. The gate electrode 20 and first field plates 22a to 22d and 23 are covered ... | 07/05/2011 |
| 7936042 | Field effect transistor containing a wide band gap semiconductor material in a drain A field effect transistor comprising a silicon containing body is provided. After formation of a gate dielectric, gate electrode, and a first gate spacer, a drain side trench is formed and filled with a wide band gap semiconductor material. Optionally, a source side... | 05/03/2011 |
| 7911020 | Semiconductor device having breakdown voltage maintaining structure and its manufacturing method A semiconductor device has an active portion having at least one well region in a semiconductor layer, and a breakdown voltage maintaining structure surrounding the active portion. The maintaining structure includes a conductor layer over each of a plurality of guar... | 03/22/2011 |
| 7888767 | Structures of high-voltage MOS devices with improved electrical performance A semiconductor structure includes a first high-voltage well (HVW) region of a first conductivity type overlying a substrate, a second HVW region of a second conductivity type opposite the first conductivity type overlying the substrate and laterally adjoining the f... | 02/15/2011 |
| 7855427 | Semiconductor device with a plurality of isolated conductive films A semiconductor layer provided on a BOX (buried oxide) layer includes a first P-type region, an N+-type region, and an N−-type region which together form a diode. A plurality of second P-type regions are provided on a bottom part of the semic... | 12/21/2010 |
| 7592683 | Semiconductor device with improved electrostatic tolerance A semiconductor device comprises a P−-type semiconductor substrate (15), an N−-type semiconductor substrate (21) formed on the P−-type semiconductor substrate (15), an upper P-type semiconductor region (... | 09/22/2009 |
| 7411272 | Semiconductor device and method of forming a semiconductor device A power semiconductor device has an active region that includes a drift region. At least a portion of the drift region is provided in a membrane which has opposed top and bottom surfaces. In one embodiment, the top surface of the membrane has electrical terminals co... | 08/12/2008 |
| 7358567 | High-voltage MOS device and fabrication thereof A HV-MOS device is described, including a substrate, a gate dielectric layer and a gate, a channel region, two doped regions as a source and a drain, a field isolation layer between the gate and at least one of the two doped regions, a drift region and a modifying d... | 04/15/2008 |
| 7355257 | Semiconductor superjunction device A semiconductor superjunction device has a superjunction structure formed in a drift region of the device. The superjunction structure has alternately arranged n-type regions and p-type semiconductor regions layered parallel with the drift direction of carriers, per... | 04/08/2008 |
| 7355261 | Thin film device, thin film device module, and method of forming thin film device module A thin film device includes a thin film element disposed on a surface of a substrate for high voltage formed of a material having an electric resistivity in the range of 108 Ω·cm to 1010 Ω·cm, with an adhesive layer in between. The substrat... | 04/08/2008 |
| 7339243 | Isolating substrate noise by forming semi-insulating regions An integrated circuit structure for isolating substrate noise and a method of forming the same are provided. In the preferred embodiment of the present invention, a semi-insulating region is formed using proton bombardment in a substrate between a first circuit regi... | 03/04/2008 |
| 7327007 | Semiconductor device with high breakdown voltage A technique is provided which allows easy achievement of a semiconductor device with desired breakdown voltage. In a high-potential island region defined by a p impurity region, an n+ impurity region is formed in an n− semiconductor layer, an... | 02/05/2008 |
| 7327008 | Structure and method for mixed-substrate SIMOX technology The present invention provides a semiconductor structure that includes a substrate having a crystal lattice; a first structure formed in a first region of the substrate, the first structure includes at least a heterostructure that generates a lattice stress in said ... | 02/05/2008 |
| 7321142 | Field effect transistor On an SiC single crystal substrate, an electric field relaxation layer and a p− type buffer layer are formed. The electric field relaxation layer is formed between the p− type buffer layer and the SiC single crystal substrate to contact SiC single crystal substr... | 01/22/2008 |
| 7304356 | IGBT or like semiconductor device of high voltage-withstanding capability A multiple-cell insulated-gate-bipolar-transistor chip is disclosed which includes a semiconductor substrate having formed therein a p+-type collector region and an n−-type base region, with a pn junction therebetween. An annular trench is et... | 12/04/2007 |
| 7301179 | Semiconductor device having a high breakdown voltage transistor formed thereon An ion-through region 100, 102 is provided as a first opening in a passivation film 90 on a source electrode 70 and a drain electrode 80. The passivation film 90 is coated with a sealing resin to package the semiconductor device. A... | 11/27/2007 |
| 7279768 | Semiconductor device for overvoltage protection In a semiconductor device of the present invention, an N-type buried diffusion layer is formed across a substrate and an epitaxial layer. A P-type buried diffusion layer is formed across an upper surface of the N-type buried diffusion layer over a wide range to form... | 10/09/2007 |
| 7279767 | Semiconductor structure with high-voltage sustaining capability and fabrication method of the same A semiconductor structure with high-voltage sustaining capability. A semiconductor structure with high-voltage sustaining capability includes a first well region of a first conductivity type. A pair of second well regions of a second conductivity type opposite to th... | 10/09/2007 |
| 7259440 | Fast switching diode with low leakage current A fast switching diode includes an n− layer having an upper surface and a lower surface and a first edge and a second edge, the second edge provided on an opposing side of the first edge. A converted region is provided proximate the upper surface of the n− layer... | 08/21/2007 |
| 7253042 | Method of fabricating a high-voltage transistor with an extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls; then partially fil... | 08/07/2007 |
| 7247923 | Semiconductor device having a lateral MOSFET and combined IC using the same A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and... | 07/24/2007 |
| 7244975 | High-voltage device structure A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage device is disposed in the active region. The high-voltage device structure... | 07/17/2007 |
| 7230310 | Super-junction voltage sustaining layer with alternating semiconductor and High-K dielectric regions A semiconductor power device includes a device feature layer, a substrate contact layer and a voltage-sustaining layer between them. The voltage-sustaining layer includes alternating semiconductor and high permittivity dielectric regions, where each region extends f... | 06/12/2007 |
| 7221036 | BJT with ESD self protection A ballasting region is placed between the base region and the collector contact of a bipolar junction transistor to relocate a hot spot away from the collector contact of the transistor. Relocating the hot spot away from the collector contact prevents the collector ... | 05/22/2007 |
| 7205581 | Thyristor structure and overvoltage protection configuration having the thyristor structure A thyristor structure having a first terminal, formed as a first region with a first conductivity type, is provided. A second region of a second conductivity type adjoins the first region. A third region of the first conductivity type, which adjoins the second regio... | 04/17/2007 |
| 7192872 | Method of manufacturing semiconductor device having composite buffer layer The present invention relates to a method of manufacturing semiconductor device with composite buffer layers. The method includes etching grooves in n type and p type semiconductor wafers respectively. The areas of grooves in n type wafer just correspond to the area... | 03/20/2007 |
| 7180133 | Method and structure for addressing hot carrier degradation in high voltage devices In a method and structure for a high voltage LDMOS with reduced hot carrier degradation, the thick field oxide is eliminated and a reduced surface field achieved instead by including adjacent p+ and n+ regions in the drain well and shorting these regions to each oth... | 02/20/2007 |
| 7154129 | Semiconductor arrangement with a p-n transition and method for the production of a semiconductor arrangement A semiconductor system (200), particularly a diode, having a p-n junction is proposed, that is formed as a chip having an edge area, which includes a first layer (2) of a first conductivity type and a second layer (1, 3) of a second conductivity... | 12/26/2006 |
| 7135751 | High breakdown voltage junction terminating structure A high breakdown voltage junction terminating structure having a loop-like RESURF structure formed on a SOI substrate is disclosed. A lateral IGBT, a lateral FWD, an output stage element and a driving circuit are formed in the inside region of the structure. The lat... | 11/14/2006 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 7119393 | Transistor having fully-depleted junctions to reduce capacitance and increase radiation immunity in an integrated circuit A floating-gate transistor for an integrated circuit is formed on a p-type substrate. An n-type region is disposed over the p-type substrate. A p-type region is disposed over the n-type region. Spaced apart n-type source and drain regions are disposed in the p-type ... | 10/10/2006 |
| 7106628 | Semiconductor device having enhanced breakdown voltage A semiconductor device has: a main circuit including a plurality of MOS transistors operating at a first voltage; a memory requiring an operation at a second voltage higher than the first voltage; and a drive circuit for driving the memory, the drive circuit compris... | 09/12/2006 |
| 7091080 | Depletion implant for power MOSFET A vertical MOSFET has a substrate of a first conductivity type. A channel region of a second conductivity type is diffused into the substrate. A gate is disposed at least partially over the channel region. A source region of a second conductivity type is disposed pr... | 08/15/2006 |
| 7081656 | CMOS constructions The invention includes methods of forming circuit devices. A metal-containing material comprising a thickness of no more than 20 Å (or alternatively comprising a thickness resulting from no more than 70 ALD cycles) is formed between conductively-doped silicon and ... | 07/25/2006 |
| 7078296 | Self-aligned trench MOSFETs and methods for making the same Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOS... | 07/18/2006 |
| 7074681 | Semiconductor component and method of manufacturing A semiconductor component includes a substrate (110) having a surface, a channel region (120, 220) located in the substrate, a non-electrically conductive region (130) substantially located below a substantially planar plane defined by the surfa... | 07/11/2006 |
| 7064399 | Advanced CMOS using super steep retrograde wells The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS tran... | 06/20/2006 |
